arch/arm/dts/hihope-rzg2-ex.dtsi

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Device Tree Source for the RZ/G2[HMN] HiHope sub board common parts
   4  *
   5  * Copyright (C) 2019 Renesas Electronics Corp.
   6  */
   7
   8 / {
   9         aliases {
  10                 ethernet0 = &avb;
  11         };
  12
  13         chosen {
  14                 bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
  15         };
  16 };
  17
  18 &avb {
  19         pinctrl-0 = <&avb_pins>;
  20         pinctrl-names = "default";
  21         phy-handle = <&phy0>;
  22         tx-internal-delay-ps = <2000>;
  23         rx-internal-delay-ps = <1800>;
  24         status = "okay";
  25
  26         phy0: ethernet-phy@0 {
  27                 compatible = "ethernet-phy-id001c.c915",
  28                              "ethernet-phy-ieee802.3-c22";
  29                 reg = <0>;
  30                 interrupt-parent = <&gpio2>;
  31                 interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
  32                 reset-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>;
  33         };
  34 };
  35
  36 &can0 {
  37         pinctrl-0 = <&can0_pins>;
  38         pinctrl-names = "default";
  39         status = "okay";
  40 };
  41
  42 &can1 {
  43         pinctrl-0 = <&can1_pins>;
  44         pinctrl-names = "default";
  45         status = "okay";
  46 };
  47
  48 &pciec0 {
  49         status = "okay";
  50 };
  51
  52 &pfc {
  53         pinctrl-0 = <&scif_clk_pins>;
  54         pinctrl-names = "default";
  55
  56         avb_pins: avb {
  57                 mux {
  58                         groups = "avb_link", "avb_mdio", "avb_mii";
  59                         function = "avb";
  60                 };
  61
  62                 pins_mdio {
  63                         groups = "avb_mdio";
  64                         drive-strength = <24>;
  65                 };
  66
  67                 pins_mii_tx {
  68                         pins = "PIN_AVB_TX_CTL", "PIN_AVB_TXC", "PIN_AVB_TD0",
  69                                "PIN_AVB_TD1", "PIN_AVB_TD2", "PIN_AVB_TD3";
  70                         drive-strength = <12>;
  71                 };
  72         };
  73
  74         can0_pins: can0 {
  75                 groups = "can0_data_a";
  76                 function = "can0";
  77         };
  78
  79         can1_pins: can1 {
  80                 groups = "can1_data";
  81                 function = "can1";
  82         };
  83
  84         pwm0_pins: pwm0 {
  85                 groups = "pwm0";
  86                 function = "pwm0";
  87         };
  88 };
  89
  90 &pwm0 {
  91         pinctrl-0 = <&pwm0_pins>;
  92         pinctrl-names = "default";
  93
  94         status = "okay";
  95 };