arch/arm/mach-at91/spl_atmel.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * Copyright (C) 2013 Atmel Corporation
   4  *                    Bo Shen <[email protected]>
   5  */
   6
   7 #include <common.h>
   8 #include <hang.h>
   9 #include <asm/io.h>
  10 #include <asm/arch/at91_common.h>
  11 #include <asm/arch/at91_pit.h>
  12 #include <asm/arch/at91_pmc.h>
  13 #include <asm/arch/at91_rstc.h>
  14 #include <asm/arch/at91_wdt.h>
  15 #include <asm/arch/clk.h>
  16 #include <spl.h>
  17
  18 static void switch_to_main_crystal_osc(void)
  19 {
  20         struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
  21         u32 tmp;
  22
  23         tmp = readl(&pmc->mor);
  24         tmp &= ~AT91_PMC_MOR_OSCOUNT(0xff);
  25         tmp &= ~AT91_PMC_MOR_KEY(0xff);
  26         tmp |= AT91_PMC_MOR_MOSCEN;
  27         tmp |= AT91_PMC_MOR_OSCOUNT(8);
  28         tmp |= AT91_PMC_MOR_KEY(0x37);
  29         writel(tmp, &pmc->mor);
  30         while (!(readl(&pmc->sr) & AT91_PMC_IXR_MOSCS))
  31                 ;
  32
  33 #if defined(CONFIG_SAMA5D2)
  34         /* Enable a measurement of the external oscillator */
  35         tmp = readl(&pmc->mcfr);
  36         tmp |= AT91_PMC_MCFR_CCSS_XTAL_OSC;
  37         tmp |= AT91_PMC_MCFR_RCMEAS;
  38         writel(tmp, &pmc->mcfr);
  39
  40         while (!(readl(&pmc->mcfr) & AT91_PMC_MCFR_MAINRDY))
  41                 ;
  42
  43         if (!(readl(&pmc->mcfr) & AT91_PMC_MCFR_MAINF_MASK))
  44                 hang();
  45 #endif
  46
  47         tmp = readl(&pmc->mor);
  48 /*
  49  * some boards have an external oscillator with driving.
  50  * in this case we need to disable the internal SoC driving (bypass mode)
  51  */
  52 #if defined(CONFIG_SPL_AT91_MCK_BYPASS)
  53         tmp |= AT91_PMC_MOR_OSCBYPASS;
  54 #else
  55         tmp &= ~AT91_PMC_MOR_OSCBYPASS;
  56 #endif
  57         tmp &= ~AT91_PMC_MOR_KEY(0xff);
  58         tmp |= AT91_PMC_MOR_KEY(0x37);
  59         writel(tmp, &pmc->mor);
  60
  61         tmp = readl(&pmc->mor);
  62         tmp |= AT91_PMC_MOR_MOSCSEL;
  63         tmp &= ~AT91_PMC_MOR_KEY(0xff);
  64         tmp |= AT91_PMC_MOR_KEY(0x37);
  65         writel(tmp, &pmc->mor);
  66
  67         while (!(readl(&pmc->sr) & AT91_PMC_IXR_MOSCSELS))
  68                 ;
  69
  70 #if !defined(CONFIG_SAMA5D2)
  71         /* Wait until MAINRDY field is set to make sure main clock is stable */
  72         while (!(readl(&pmc->mcfr) & AT91_PMC_MAINRDY))
  73                 ;
  74 #endif
  75
  76 #if !defined(CONFIG_SAMA5D4) && !defined(CONFIG_SAMA5D2)
  77         tmp = readl(&pmc->mor);
  78         tmp &= ~AT91_PMC_MOR_MOSCRCEN;
  79         tmp &= ~AT91_PMC_MOR_KEY(0xff);
  80         tmp |= AT91_PMC_MOR_KEY(0x37);
  81         writel(tmp, &pmc->mor);
  82 #endif
  83 }
  84
  85 __weak void matrix_init(void)
  86 {
  87         /* This only be used for sama5d4 soc now */
  88 }
  89
  90 __weak void redirect_int_from_saic_to_aic(void)
  91 {
  92         /* This only be used for sama5d4 soc now */
  93 }
  94
  95 /* empty stub to satisfy current lowlevel_init, can be removed any time */
  96 void s_init(void)
  97 {
  98 }
  99
 100 void board_init_f(ulong dummy)
 101 {
 102         int ret;
 103
 104         switch_to_main_crystal_osc();
 105
 106 #ifdef CONFIG_SAMA5D2
 107         configure_2nd_sram_as_l2_cache();
 108 #endif
 109
 110 #if !defined(CONFIG_WDT_AT91)
 111         /* disable watchdog */
 112         at91_disable_wdt();
 113 #endif
 114
 115         /* PMC configuration */
 116         at91_pmc_init();
 117
 118         at91_clock_init(CONFIG_SYS_AT91_MAIN_CLOCK);
 119
 120         matrix_init();
 121
 122         redirect_int_from_saic_to_aic();
 123
 124         timer_init();
 125
 126         board_early_init_f();
 127
 128         mem_init();
 129
 130         ret = spl_init();
 131         if (ret) {
 132                 debug("spl_init() failed: %d\n", ret);
 133                 hang();
 134         }
 135
 136         preloader_console_init();
 137
 138 }