arch/arm/mach-rockchip/tpl.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * (C) Copyright 2019 Rockchip Electronics Co., Ltd
   4  */
   5
   6 #include <common.h>
   7 #include <debug_uart.h>
   8 #include <dm.h>
   9 #include <ram.h>
  10 #include <spl.h>
  11 #include <version.h>
  12 #include <asm/io.h>
  13 #include <asm/arch-rockchip/bootrom.h>
  14
  15 #define TIMER_LOAD_COUNT_L      0x00
  16 #define TIMER_LOAD_COUNT_H      0x04
  17 #define TIMER_CONTROL_REG       0x10
  18 #define TIMER_EN        0x1
  19 #define TIMER_FMODE     BIT(0)
  20 #define TIMER_RMODE     BIT(1)
  21
  22 __weak void rockchip_stimer_init(void)
  23 {
  24         /* If Timer already enabled, don't re-init it */
  25         u32 reg = readl(CONFIG_ROCKCHIP_STIMER_BASE + TIMER_CONTROL_REG);
  26
  27         if (reg & TIMER_EN)
  28                 return;
  29
  30 #ifndef CONFIG_ARM64
  31         asm volatile("mcr p15, 0, %0, c14, c0, 0"
  32                      : : "r"(COUNTER_FREQUENCY));
  33 #endif
  34
  35         writel(0, CONFIG_ROCKCHIP_STIMER_BASE + TIMER_CONTROL_REG);
  36         writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE);
  37         writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE + 4);
  38         writel(TIMER_EN | TIMER_FMODE, CONFIG_ROCKCHIP_STIMER_BASE +
  39                TIMER_CONTROL_REG);
  40 }
  41
  42 void board_init_f(ulong dummy)
  43 {
  44         struct udevice *dev;
  45         int ret;
  46
  47 #ifdef CONFIG_DEBUG_UART
  48         /*
  49          * Debug UART can be used from here if required:
  50          *
  51          * debug_uart_init();
  52          * printch('a');
  53          * printhex8(0x1234);
  54          * printascii("string");
  55          */
  56         debug_uart_init();
  57         printascii("\nU-Boot TPL " PLAIN_VERSION " (" U_BOOT_DATE " - " \
  58                                 U_BOOT_TIME ")\n");
  59 #endif
  60         ret = spl_early_init();
  61         if (ret) {
  62                 debug("spl_early_init() failed: %d\n", ret);
  63                 hang();
  64         }
  65
  66         /* Init secure timer */
  67         rockchip_stimer_init();
  68         /* Init ARM arch timer in arch/arm/cpu/ */
  69         timer_init();
  70
  71         ret = uclass_get_device(UCLASS_RAM, 0, &dev);
  72         if (ret) {
  73                 printf("DRAM init failed: %d\n", ret);
  74                 return;
  75         }
  76 }
  77
  78 void board_return_to_bootrom(void)
  79 {
  80         back_to_bootrom(BROM_BOOT_NEXTSTAGE);
  81 }
  82
  83 u32 spl_boot_device(void)
  84 {
  85         return BOOT_DEVICE_BOOTROM;
  86 }