1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
4 $id: http://devicetree.org/schemas/remoteproc/qcom,sa8775p-pas.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm SA8775p Peripheral Authentication Service
13 Qualcomm SA8775p SoC Peripheral Authentication Service loads and boots firmware
14 on the Qualcomm DSP Hexagon cores.
19 - qcom,sa8775p-adsp-pas
20 - qcom,sa8775p-cdsp0-pas
21 - qcom,sa8775p-cdsp1-pas
22 - qcom,sa8775p-gpdsp0-pas
23 - qcom,sa8775p-gpdsp1-pas
30 - description: XO clock
37 $ref: /schemas/types.yaml#/definitions/phandle
38 description: Reference to the AOSS side-channel message RAM.
41 $ref: /schemas/types.yaml#/definitions/string-array
43 - description: Firmware name of the Hexagon core
47 - description: Memory region for main Firmware authentication
61 - $ref: /schemas/remoteproc/qcom,pas-common.yaml#
67 - qcom,sa8775p-adsp-pas
72 - description: LCX power domain
73 - description: LMX power domain
83 - qcom,sa8775p-cdsp0-pas
84 - qcom,sa8775p-cdsp1-pas
89 - description: CX power domain
90 - description: MXC power domain
91 - description: NSP0 power domain
102 - qcom,sa8775p-gpdsp0-pas
103 - qcom,sa8775p-gpdsp1-pas
108 - description: CX power domain
109 - description: MXC power domain
115 unevaluatedProperties: false
119 #include <dt-bindings/clock/qcom,rpmh.h>
120 #include <dt-bindings/interconnect/qcom,sa8775p-rpmh.h>
121 #include <dt-bindings/interrupt-controller/irq.h>
122 #include <dt-bindings/mailbox/qcom-ipcc.h>
123 #include <dt-bindings/power/qcom,rpmhpd.h>
125 remoteproc@30000000 {
126 compatible = "qcom,sa8775p-adsp-pas";
127 reg = <0x30000000 0x100>;
129 interrupts-extended = <&pdc 6 IRQ_TYPE_EDGE_RISING>,
130 <&smp2p_adsp_in 0 IRQ_TYPE_EDGE_RISING>,
131 <&smp2p_adsp_in 2 IRQ_TYPE_EDGE_RISING>,
132 <&smp2p_adsp_in 1 IRQ_TYPE_EDGE_RISING>,
133 <&smp2p_adsp_in 3 IRQ_TYPE_EDGE_RISING>;
134 interrupt-names = "wdog", "fatal", "ready", "handover", "stop-ack";
136 clocks = <&rpmhcc RPMH_CXO_CLK>;
139 power-domains = <&rpmhpd RPMHPD_LCX>, <&rpmhpd RPMHPD_LMX>;
140 power-domain-names = "lcx", "lmx";
142 interconnects = <&lpass_ag_noc MASTER_LPASS_PROC 0 &mc_virt SLAVE_EBI1 0>;
144 memory-region = <&pil_adsp_mem>;
146 qcom,qmp = <&aoss_qmp>;
148 qcom,smem-states = <&smp2p_adsp_out 0>;
149 qcom,smem-state-names = "stop";
152 interrupts-extended = <&ipcc IPCC_CLIENT_LPASS
153 IPCC_MPROC_SIGNAL_GLINK_QMP
154 IRQ_TYPE_EDGE_RISING>;
155 mboxes = <&ipcc IPCC_CLIENT_LPASS IPCC_MPROC_SIGNAL_GLINK_QMP>;
158 qcom,remote-pid = <2>;