drivers/mmc/mmc.c

   1 /*
   2  * Copyright 2008, Freescale Semiconductor, Inc
   3  * Andy Fleming
   4  *
   5  * Based vaguely on the Linux code
   6  *
   7  * SPDX-License-Identifier:     GPL-2.0+
   8  */
   9
  10 #include <config.h>
  11 #include <common.h>
  12 #include <command.h>
  13 #include <dm.h>
  14 #include <dm/device-internal.h>
  15 #include <errno.h>
  16 #include <mmc.h>
  17 #include <part.h>
  18 #include <power/regulator.h>
  19 #include <malloc.h>
  20 #include <memalign.h>
  21 #include <linux/list.h>
  22 #include <div64.h>
  23 #include "mmc_private.h"
  24
  25 static const unsigned int sd_au_size[] = {
  26         0,              SZ_16K / 512,           SZ_32K / 512,
  27         SZ_64K / 512,   SZ_128K / 512,          SZ_256K / 512,
  28         SZ_512K / 512,  SZ_1M / 512,            SZ_2M / 512,
  29         SZ_4M / 512,    SZ_8M / 512,            (SZ_8M + SZ_4M) / 512,
  30         SZ_16M / 512,   (SZ_16M + SZ_8M) / 512, SZ_32M / 512,   SZ_64M / 512,
  31 };
  32
  33 #if CONFIG_IS_ENABLED(MMC_TINY)
  34 static struct mmc mmc_static;
  35 struct mmc *find_mmc_device(int dev_num)
  36 {
  37         return &mmc_static;
  38 }
  39
  40 void mmc_do_preinit(void)
  41 {
  42         struct mmc *m = &mmc_static;
  43 #ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT
  44         mmc_set_preinit(m, 1);
  45 #endif
  46         if (m->preinit)
  47                 mmc_start_init(m);
  48 }
  49
  50 struct blk_desc *mmc_get_blk_desc(struct mmc *mmc)
  51 {
  52         return &mmc->block_dev;
  53 }
  54 #endif
  55
  56 #if !CONFIG_IS_ENABLED(DM_MMC)
  57 __weak int board_mmc_getwp(struct mmc *mmc)
  58 {
  59         return -1;
  60 }
  61
  62 int mmc_getwp(struct mmc *mmc)
  63 {
  64         int wp;
  65
  66         wp = board_mmc_getwp(mmc);
  67
  68         if (wp < 0) {
  69                 if (mmc->cfg->ops->getwp)
  70                         wp = mmc->cfg->ops->getwp(mmc);
  71                 else
  72                         wp = 0;
  73         }
  74
  75         return wp;
  76 }
  77
  78 __weak int board_mmc_getcd(struct mmc *mmc)
  79 {
  80         return -1;
  81 }
  82 #endif
  83
  84 #ifdef CONFIG_MMC_TRACE
  85 void mmmc_trace_before_send(struct mmc *mmc, struct mmc_cmd *cmd)
  86 {
  87         printf("CMD_SEND:%d\n", cmd->cmdidx);
  88         printf("\t\tARG\t\t\t 0x%08X\n", cmd->cmdarg);
  89 }
  90
  91 void mmmc_trace_after_send(struct mmc *mmc, struct mmc_cmd *cmd, int ret)
  92 {
  93         int i;
  94         u8 *ptr;
  95
  96         if (ret) {
  97                 printf("\t\tRET\t\t\t %d\n", ret);
  98         } else {
  99                 switch (cmd->resp_type) {
 100                 case MMC_RSP_NONE:
 101                         printf("\t\tMMC_RSP_NONE\n");
 102                         break;
 103                 case MMC_RSP_R1:
 104                         printf("\t\tMMC_RSP_R1,5,6,7 \t 0x%08X \n",
 105                                 cmd->response[0]);
 106                         break;
 107                 case MMC_RSP_R1b:
 108                         printf("\t\tMMC_RSP_R1b\t\t 0x%08X \n",
 109                                 cmd->response[0]);
 110                         break;
 111                 case MMC_RSP_R2:
 112                         printf("\t\tMMC_RSP_R2\t\t 0x%08X \n",
 113                                 cmd->response[0]);
 114                         printf("\t\t          \t\t 0x%08X \n",
 115                                 cmd->response[1]);
 116                         printf("\t\t          \t\t 0x%08X \n",
 117                                 cmd->response[2]);
 118                         printf("\t\t          \t\t 0x%08X \n",
 119                                 cmd->response[3]);
 120                         printf("\n");
 121                         printf("\t\t\t\t\tDUMPING DATA\n");
 122                         for (i = 0; i < 4; i++) {
 123                                 int j;
 124                                 printf("\t\t\t\t\t%03d - ", i*4);
 125                                 ptr = (u8 *)&cmd->response[i];
 126                                 ptr += 3;
 127                                 for (j = 0; j < 4; j++)
 128                                         printf("%02X ", *ptr--);
 129                                 printf("\n");
 130                         }
 131                         break;
 132                 case MMC_RSP_R3:
 133                         printf("\t\tMMC_RSP_R3,4\t\t 0x%08X \n",
 134                                 cmd->response[0]);
 135                         break;
 136                 default:
 137                         printf("\t\tERROR MMC rsp not supported\n");
 138                         break;
 139                 }
 140         }
 141 }
 142
 143 void mmc_trace_state(struct mmc *mmc, struct mmc_cmd *cmd)
 144 {
 145         int status;
 146
 147         status = (cmd->response[0] & MMC_STATUS_CURR_STATE) >> 9;
 148         printf("CURR STATE:%d\n", status);
 149 }
 150 #endif
 151
 152 #if CONFIG_IS_ENABLED(MMC_VERBOSE) || defined(DEBUG)
 153 const char *mmc_mode_name(enum bus_mode mode)
 154 {
 155         static const char *const names[] = {
 156               [MMC_LEGACY]      = "MMC legacy",
 157               [SD_LEGACY]       = "SD Legacy",
 158               [MMC_HS]          = "MMC High Speed (26MHz)",
 159               [SD_HS]           = "SD High Speed (50MHz)",
 160               [UHS_SDR12]       = "UHS SDR12 (25MHz)",
 161               [UHS_SDR25]       = "UHS SDR25 (50MHz)",
 162               [UHS_SDR50]       = "UHS SDR50 (100MHz)",
 163               [UHS_SDR104]      = "UHS SDR104 (208MHz)",
 164               [UHS_DDR50]       = "UHS DDR50 (50MHz)",
 165               [MMC_HS_52]       = "MMC High Speed (52MHz)",
 166               [MMC_DDR_52]      = "MMC DDR52 (52MHz)",
 167               [MMC_HS_200]      = "HS200 (200MHz)",
 168         };
 169
 170         if (mode >= MMC_MODES_END)
 171                 return "Unknown mode";
 172         else
 173                 return names[mode];
 174 }
 175 #endif
 176
 177 static uint mmc_mode2freq(struct mmc *mmc, enum bus_mode mode)
 178 {
 179         static const int freqs[] = {
 180               [SD_LEGACY]       = 25000000,
 181               [MMC_HS]          = 26000000,
 182               [SD_HS]           = 50000000,
 183               [UHS_SDR12]       = 25000000,
 184               [UHS_SDR25]       = 50000000,
 185               [UHS_SDR50]       = 100000000,
 186               [UHS_SDR104]      = 208000000,
 187               [UHS_DDR50]       = 50000000,
 188               [MMC_HS_52]       = 52000000,
 189               [MMC_DDR_52]      = 52000000,
 190               [MMC_HS_200]      = 200000000,
 191         };
 192
 193         if (mode == MMC_LEGACY)
 194                 return mmc->legacy_speed;
 195         else if (mode >= MMC_MODES_END)
 196                 return 0;
 197         else
 198                 return freqs[mode];
 199 }
 200
 201 static int mmc_select_mode(struct mmc *mmc, enum bus_mode mode)
 202 {
 203         mmc->selected_mode = mode;
 204         mmc->tran_speed = mmc_mode2freq(mmc, mode);
 205         debug("selecting mode %s (freq : %d MHz)\n", mmc_mode_name(mode),
 206               mmc->tran_speed / 1000000);
 207         return 0;
 208 }
 209
 210 #if !CONFIG_IS_ENABLED(DM_MMC)
 211 int mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data)
 212 {
 213         int ret;
 214
 215         mmmc_trace_before_send(mmc, cmd);
 216         ret = mmc->cfg->ops->send_cmd(mmc, cmd, data);
 217         mmmc_trace_after_send(mmc, cmd, ret);
 218
 219         return ret;
 220 }
 221 #endif
 222
 223 int mmc_send_status(struct mmc *mmc, int timeout)
 224 {
 225         struct mmc_cmd cmd;
 226         int err, retries = 5;
 227
 228         cmd.cmdidx = MMC_CMD_SEND_STATUS;
 229         cmd.resp_type = MMC_RSP_R1;
 230         if (!mmc_host_is_spi(mmc))
 231                 cmd.cmdarg = mmc->rca << 16;
 232
 233         while (1) {
 234                 err = mmc_send_cmd(mmc, &cmd, NULL);
 235                 if (!err) {
 236                         if ((cmd.response[0] & MMC_STATUS_RDY_FOR_DATA) &&
 237                             (cmd.response[0] & MMC_STATUS_CURR_STATE) !=
 238                              MMC_STATE_PRG)
 239                                 break;
 240                         else if (cmd.response[0] & MMC_STATUS_MASK) {
 241 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
 242                                 printf("Status Error: 0x%08X\n",
 243                                         cmd.response[0]);
 244 #endif
 245                                 return -ECOMM;
 246                         }
 247                 } else if (--retries < 0)
 248                         return err;
 249
 250                 if (timeout-- <= 0)
 251                         break;
 252
 253                 udelay(1000);
 254         }
 255
 256         mmc_trace_state(mmc, &cmd);
 257         if (timeout <= 0) {
 258 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
 259                 printf("Timeout waiting card ready\n");
 260 #endif
 261                 return -ETIMEDOUT;
 262         }
 263
 264         return 0;
 265 }
 266
 267 int mmc_set_blocklen(struct mmc *mmc, int len)
 268 {
 269         struct mmc_cmd cmd;
 270
 271         if (mmc->ddr_mode)
 272                 return 0;
 273
 274         cmd.cmdidx = MMC_CMD_SET_BLOCKLEN;
 275         cmd.resp_type = MMC_RSP_R1;
 276         cmd.cmdarg = len;
 277
 278         return mmc_send_cmd(mmc, &cmd, NULL);
 279 }
 280
 281 static int mmc_read_blocks(struct mmc *mmc, void *dst, lbaint_t start,
 282                            lbaint_t blkcnt)
 283 {
 284         struct mmc_cmd cmd;
 285         struct mmc_data data;
 286
 287         if (blkcnt > 1)
 288                 cmd.cmdidx = MMC_CMD_READ_MULTIPLE_BLOCK;
 289         else
 290                 cmd.cmdidx = MMC_CMD_READ_SINGLE_BLOCK;
 291
 292         if (mmc->high_capacity)
 293                 cmd.cmdarg = start;
 294         else
 295                 cmd.cmdarg = start * mmc->read_bl_len;
 296
 297         cmd.resp_type = MMC_RSP_R1;
 298
 299         data.dest = dst;
 300         data.blocks = blkcnt;
 301         data.blocksize = mmc->read_bl_len;
 302         data.flags = MMC_DATA_READ;
 303
 304         if (mmc_send_cmd(mmc, &cmd, &data))
 305                 return 0;
 306
 307         if (blkcnt > 1) {
 308                 cmd.cmdidx = MMC_CMD_STOP_TRANSMISSION;
 309                 cmd.cmdarg = 0;
 310                 cmd.resp_type = MMC_RSP_R1b;
 311                 if (mmc_send_cmd(mmc, &cmd, NULL)) {
 312 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
 313                         printf("mmc fail to send stop cmd\n");
 314 #endif
 315                         return 0;
 316                 }
 317         }
 318
 319         return blkcnt;
 320 }
 321
 322 #if CONFIG_IS_ENABLED(BLK)
 323 ulong mmc_bread(struct udevice *dev, lbaint_t start, lbaint_t blkcnt, void *dst)
 324 #else
 325 ulong mmc_bread(struct blk_desc *block_dev, lbaint_t start, lbaint_t blkcnt,
 326                 void *dst)
 327 #endif
 328 {
 329 #if CONFIG_IS_ENABLED(BLK)
 330         struct blk_desc *block_dev = dev_get_uclass_platdata(dev);
 331 #endif
 332         int dev_num = block_dev->devnum;
 333         int err;
 334         lbaint_t cur, blocks_todo = blkcnt;
 335
 336         if (blkcnt == 0)
 337                 return 0;
 338
 339         struct mmc *mmc = find_mmc_device(dev_num);
 340         if (!mmc)
 341                 return 0;
 342
 343         if (CONFIG_IS_ENABLED(MMC_TINY))
 344                 err = mmc_switch_part(mmc, block_dev->hwpart);
 345         else
 346                 err = blk_dselect_hwpart(block_dev, block_dev->hwpart);
 347
 348         if (err < 0)
 349                 return 0;
 350
 351         if ((start + blkcnt) > block_dev->lba) {
 352 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
 353                 printf("MMC: block number 0x" LBAF " exceeds max(0x" LBAF ")\n",
 354                         start + blkcnt, block_dev->lba);
 355 #endif
 356                 return 0;
 357         }
 358
 359         if (mmc_set_blocklen(mmc, mmc->read_bl_len)) {
 360                 debug("%s: Failed to set blocklen\n", __func__);
 361                 return 0;
 362         }
 363
 364         do {
 365                 cur = (blocks_todo > mmc->cfg->b_max) ?
 366                         mmc->cfg->b_max : blocks_todo;
 367                 if (mmc_read_blocks(mmc, dst, start, cur) != cur) {
 368                         debug("%s: Failed to read blocks\n", __func__);
 369                         return 0;
 370                 }
 371                 blocks_todo -= cur;
 372                 start += cur;
 373                 dst += cur * mmc->read_bl_len;
 374         } while (blocks_todo > 0);
 375
 376         return blkcnt;
 377 }
 378
 379 static int mmc_go_idle(struct mmc *mmc)
 380 {
 381         struct mmc_cmd cmd;
 382         int err;
 383
 384         udelay(1000);
 385
 386         cmd.cmdidx = MMC_CMD_GO_IDLE_STATE;
 387         cmd.cmdarg = 0;
 388         cmd.resp_type = MMC_RSP_NONE;
 389
 390         err = mmc_send_cmd(mmc, &cmd, NULL);
 391
 392         if (err)
 393                 return err;
 394
 395         udelay(2000);
 396
 397         return 0;
 398 }
 399
 400 static int sd_send_op_cond(struct mmc *mmc)
 401 {
 402         int timeout = 1000;
 403         int err;
 404         struct mmc_cmd cmd;
 405
 406         while (1) {
 407                 cmd.cmdidx = MMC_CMD_APP_CMD;
 408                 cmd.resp_type = MMC_RSP_R1;
 409                 cmd.cmdarg = 0;
 410
 411                 err = mmc_send_cmd(mmc, &cmd, NULL);
 412
 413                 if (err)
 414                         return err;
 415
 416                 cmd.cmdidx = SD_CMD_APP_SEND_OP_COND;
 417                 cmd.resp_type = MMC_RSP_R3;
 418
 419                 /*
 420                  * Most cards do not answer if some reserved bits
 421                  * in the ocr are set. However, Some controller
 422                  * can set bit 7 (reserved for low voltages), but
 423                  * how to manage low voltages SD card is not yet
 424                  * specified.
 425                  */
 426                 cmd.cmdarg = mmc_host_is_spi(mmc) ? 0 :
 427                         (mmc->cfg->voltages & 0xff8000);
 428
 429                 if (mmc->version == SD_VERSION_2)
 430                         cmd.cmdarg |= OCR_HCS;
 431
 432                 err = mmc_send_cmd(mmc, &cmd, NULL);
 433
 434                 if (err)
 435                         return err;
 436
 437                 if (cmd.response[0] & OCR_BUSY)
 438                         break;
 439
 440                 if (timeout-- <= 0)
 441                         return -EOPNOTSUPP;
 442
 443                 udelay(1000);
 444         }
 445
 446         if (mmc->version != SD_VERSION_2)
 447                 mmc->version = SD_VERSION_1_0;
 448
 449         if (mmc_host_is_spi(mmc)) { /* read OCR for spi */
 450                 cmd.cmdidx = MMC_CMD_SPI_READ_OCR;
 451                 cmd.resp_type = MMC_RSP_R3;
 452                 cmd.cmdarg = 0;
 453
 454                 err = mmc_send_cmd(mmc, &cmd, NULL);
 455
 456                 if (err)
 457                         return err;
 458         }
 459
 460         mmc->ocr = cmd.response[0];
 461
 462         mmc->high_capacity = ((mmc->ocr & OCR_HCS) == OCR_HCS);
 463         mmc->rca = 0;
 464
 465         return 0;
 466 }
 467
 468 static int mmc_send_op_cond_iter(struct mmc *mmc, int use_arg)
 469 {
 470         struct mmc_cmd cmd;
 471         int err;
 472
 473         cmd.cmdidx = MMC_CMD_SEND_OP_COND;
 474         cmd.resp_type = MMC_RSP_R3;
 475         cmd.cmdarg = 0;
 476         if (use_arg && !mmc_host_is_spi(mmc))
 477                 cmd.cmdarg = OCR_HCS |
 478                         (mmc->cfg->voltages &
 479                         (mmc->ocr & OCR_VOLTAGE_MASK)) |
 480                         (mmc->ocr & OCR_ACCESS_MODE);
 481
 482         err = mmc_send_cmd(mmc, &cmd, NULL);
 483         if (err)
 484                 return err;
 485         mmc->ocr = cmd.response[0];
 486         return 0;
 487 }
 488
 489 static int mmc_send_op_cond(struct mmc *mmc)
 490 {
 491         int err, i;
 492
 493         /* Some cards seem to need this */
 494         mmc_go_idle(mmc);
 495
 496         /* Asking to the card its capabilities */
 497         for (i = 0; i < 2; i++) {
 498                 err = mmc_send_op_cond_iter(mmc, i != 0);
 499                 if (err)
 500                         return err;
 501
 502                 /* exit if not busy (flag seems to be inverted) */
 503                 if (mmc->ocr & OCR_BUSY)
 504                         break;
 505         }
 506         mmc->op_cond_pending = 1;
 507         return 0;
 508 }
 509
 510 static int mmc_complete_op_cond(struct mmc *mmc)
 511 {
 512         struct mmc_cmd cmd;
 513         int timeout = 1000;
 514         uint start;
 515         int err;
 516
 517         mmc->op_cond_pending = 0;
 518         if (!(mmc->ocr & OCR_BUSY)) {
 519                 /* Some cards seem to need this */
 520                 mmc_go_idle(mmc);
 521
 522                 start = get_timer(0);
 523                 while (1) {
 524                         err = mmc_send_op_cond_iter(mmc, 1);
 525                         if (err)
 526                                 return err;
 527                         if (mmc->ocr & OCR_BUSY)
 528                                 break;
 529                         if (get_timer(start) > timeout)
 530                                 return -EOPNOTSUPP;
 531                         udelay(100);
 532                 }
 533         }
 534
 535         if (mmc_host_is_spi(mmc)) { /* read OCR for spi */
 536                 cmd.cmdidx = MMC_CMD_SPI_READ_OCR;
 537                 cmd.resp_type = MMC_RSP_R3;
 538                 cmd.cmdarg = 0;
 539
 540                 err = mmc_send_cmd(mmc, &cmd, NULL);
 541
 542                 if (err)
 543                         return err;
 544
 545                 mmc->ocr = cmd.response[0];
 546         }
 547
 548         mmc->version = MMC_VERSION_UNKNOWN;
 549
 550         mmc->high_capacity = ((mmc->ocr & OCR_HCS) == OCR_HCS);
 551         mmc->rca = 1;
 552
 553         return 0;
 554 }
 555
 556
 557 static int mmc_send_ext_csd(struct mmc *mmc, u8 *ext_csd)
 558 {
 559         struct mmc_cmd cmd;
 560         struct mmc_data data;
 561         int err;
 562
 563         /* Get the Card Status Register */
 564         cmd.cmdidx = MMC_CMD_SEND_EXT_CSD;
 565         cmd.resp_type = MMC_RSP_R1;
 566         cmd.cmdarg = 0;
 567
 568         data.dest = (char *)ext_csd;
 569         data.blocks = 1;
 570         data.blocksize = MMC_MAX_BLOCK_LEN;
 571         data.flags = MMC_DATA_READ;
 572
 573         err = mmc_send_cmd(mmc, &cmd, &data);
 574
 575         return err;
 576 }
 577
 578 int mmc_switch(struct mmc *mmc, u8 set, u8 index, u8 value)
 579 {
 580         struct mmc_cmd cmd;
 581         int timeout = 1000;
 582         int retries = 3;
 583         int ret;
 584
 585         cmd.cmdidx = MMC_CMD_SWITCH;
 586         cmd.resp_type = MMC_RSP_R1b;
 587         cmd.cmdarg = (MMC_SWITCH_MODE_WRITE_BYTE << 24) |
 588                                  (index << 16) |
 589                                  (value << 8);
 590
 591         while (retries > 0) {
 592                 ret = mmc_send_cmd(mmc, &cmd, NULL);
 593
 594                 /* Waiting for the ready status */
 595                 if (!ret) {
 596                         ret = mmc_send_status(mmc, timeout);
 597                         return ret;
 598                 }
 599
 600                 retries--;
 601         }
 602
 603         return ret;
 604
 605 }
 606
 607 static int mmc_change_freq(struct mmc *mmc)
 608 {
 609         ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN);
 610         char cardtype;
 611         int err;
 612
 613         mmc->card_caps = 0;
 614
 615         if (mmc_host_is_spi(mmc))
 616                 return 0;
 617
 618         /* Only version 4 supports high-speed */
 619         if (mmc->version < MMC_VERSION_4)
 620                 return 0;
 621
 622         mmc->card_caps |= MMC_MODE_4BIT | MMC_MODE_8BIT;
 623
 624         err = mmc_send_ext_csd(mmc, ext_csd);
 625
 626         if (err)
 627                 return err;
 628
 629         cardtype = ext_csd[EXT_CSD_CARD_TYPE] & 0xf;
 630
 631         err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_HS_TIMING, 1);
 632
 633         if (err)
 634                 return err;
 635
 636         /* Now check to see that it worked */
 637         err = mmc_send_ext_csd(mmc, ext_csd);
 638
 639         if (err)
 640                 return err;
 641
 642         /* No high-speed support */
 643         if (!ext_csd[EXT_CSD_HS_TIMING])
 644                 return 0;
 645
 646         /* High Speed is set, there are two types: 52MHz and 26MHz */
 647         if (cardtype & EXT_CSD_CARD_TYPE_52) {
 648                 if (cardtype & EXT_CSD_CARD_TYPE_DDR_1_8V)
 649                         mmc->card_caps |= MMC_MODE_DDR_52MHz;
 650                 mmc->card_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS;
 651         } else {
 652                 mmc->card_caps |= MMC_MODE_HS;
 653         }
 654
 655         return 0;
 656 }
 657
 658 static int mmc_set_capacity(struct mmc *mmc, int part_num)
 659 {
 660         switch (part_num) {
 661         case 0:
 662                 mmc->capacity = mmc->capacity_user;
 663                 break;
 664         case 1:
 665         case 2:
 666                 mmc->capacity = mmc->capacity_boot;
 667                 break;
 668         case 3:
 669                 mmc->capacity = mmc->capacity_rpmb;
 670                 break;
 671         case 4:
 672         case 5:
 673         case 6:
 674         case 7:
 675                 mmc->capacity = mmc->capacity_gp[part_num - 4];
 676                 break;
 677         default:
 678                 return -1;
 679         }
 680
 681         mmc_get_blk_desc(mmc)->lba = lldiv(mmc->capacity, mmc->read_bl_len);
 682
 683         return 0;
 684 }
 685
 686 int mmc_switch_part(struct mmc *mmc, unsigned int part_num)
 687 {
 688         int ret;
 689
 690         ret = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_PART_CONF,
 691                          (mmc->part_config & ~PART_ACCESS_MASK)
 692                          | (part_num & PART_ACCESS_MASK));
 693
 694         /*
 695          * Set the capacity if the switch succeeded or was intended
 696          * to return to representing the raw device.
 697          */
 698         if ((ret == 0) || ((ret == -ENODEV) && (part_num == 0))) {
 699                 ret = mmc_set_capacity(mmc, part_num);
 700                 mmc_get_blk_desc(mmc)->hwpart = part_num;
 701         }
 702
 703         return ret;
 704 }
 705
 706 int mmc_hwpart_config(struct mmc *mmc,
 707                       const struct mmc_hwpart_conf *conf,
 708                       enum mmc_hwpart_conf_mode mode)
 709 {
 710         u8 part_attrs = 0;
 711         u32 enh_size_mult;
 712         u32 enh_start_addr;
 713         u32 gp_size_mult[4];
 714         u32 max_enh_size_mult;
 715         u32 tot_enh_size_mult = 0;
 716         u8 wr_rel_set;
 717         int i, pidx, err;
 718         ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN);
 719
 720         if (mode < MMC_HWPART_CONF_CHECK || mode > MMC_HWPART_CONF_COMPLETE)
 721                 return -EINVAL;
 722
 723         if (IS_SD(mmc) || (mmc->version < MMC_VERSION_4_41)) {
 724                 printf("eMMC >= 4.4 required for enhanced user data area\n");
 725                 return -EMEDIUMTYPE;
 726         }
 727
 728         if (!(mmc->part_support & PART_SUPPORT)) {
 729                 printf("Card does not support partitioning\n");
 730                 return -EMEDIUMTYPE;
 731         }
 732
 733         if (!mmc->hc_wp_grp_size) {
 734                 printf("Card does not define HC WP group size\n");
 735                 return -EMEDIUMTYPE;
 736         }
 737
 738         /* check partition alignment and total enhanced size */
 739         if (conf->user.enh_size) {
 740                 if (conf->user.enh_size % mmc->hc_wp_grp_size ||
 741                     conf->user.enh_start % mmc->hc_wp_grp_size) {
 742                         printf("User data enhanced area not HC WP group "
 743                                "size aligned\n");
 744                         return -EINVAL;
 745                 }
 746                 part_attrs |= EXT_CSD_ENH_USR;
 747                 enh_size_mult = conf->user.enh_size / mmc->hc_wp_grp_size;
 748                 if (mmc->high_capacity) {
 749                         enh_start_addr = conf->user.enh_start;
 750                 } else {
 751                         enh_start_addr = (conf->user.enh_start << 9);
 752                 }
 753         } else {
 754                 enh_size_mult = 0;
 755                 enh_start_addr = 0;
 756         }
 757         tot_enh_size_mult += enh_size_mult;
 758
 759         for (pidx = 0; pidx < 4; pidx++) {
 760                 if (conf->gp_part[pidx].size % mmc->hc_wp_grp_size) {
 761                         printf("GP%i partition not HC WP group size "
 762                                "aligned\n", pidx+1);
 763                         return -EINVAL;
 764                 }
 765                 gp_size_mult[pidx] = conf->gp_part[pidx].size / mmc->hc_wp_grp_size;
 766                 if (conf->gp_part[pidx].size && conf->gp_part[pidx].enhanced) {
 767                         part_attrs |= EXT_CSD_ENH_GP(pidx);
 768                         tot_enh_size_mult += gp_size_mult[pidx];
 769                 }
 770         }
 771
 772         if (part_attrs && ! (mmc->part_support & ENHNCD_SUPPORT)) {
 773                 printf("Card does not support enhanced attribute\n");
 774                 return -EMEDIUMTYPE;
 775         }
 776
 777         err = mmc_send_ext_csd(mmc, ext_csd);
 778         if (err)
 779                 return err;
 780
 781         max_enh_size_mult =
 782                 (ext_csd[EXT_CSD_MAX_ENH_SIZE_MULT+2] << 16) +
 783                 (ext_csd[EXT_CSD_MAX_ENH_SIZE_MULT+1] << 8) +
 784                 ext_csd[EXT_CSD_MAX_ENH_SIZE_MULT];
 785         if (tot_enh_size_mult > max_enh_size_mult) {
 786                 printf("Total enhanced size exceeds maximum (%u > %u)\n",
 787                        tot_enh_size_mult, max_enh_size_mult);
 788                 return -EMEDIUMTYPE;
 789         }
 790
 791         /* The default value of EXT_CSD_WR_REL_SET is device
 792          * dependent, the values can only be changed if the
 793          * EXT_CSD_HS_CTRL_REL bit is set. The values can be
 794          * changed only once and before partitioning is completed. */
 795         wr_rel_set = ext_csd[EXT_CSD_WR_REL_SET];
 796         if (conf->user.wr_rel_change) {
 797                 if (conf->user.wr_rel_set)
 798                         wr_rel_set |= EXT_CSD_WR_DATA_REL_USR;
 799                 else
 800                         wr_rel_set &= ~EXT_CSD_WR_DATA_REL_USR;
 801         }
 802         for (pidx = 0; pidx < 4; pidx++) {
 803                 if (conf->gp_part[pidx].wr_rel_change) {
 804                         if (conf->gp_part[pidx].wr_rel_set)
 805                                 wr_rel_set |= EXT_CSD_WR_DATA_REL_GP(pidx);
 806                         else
 807                                 wr_rel_set &= ~EXT_CSD_WR_DATA_REL_GP(pidx);
 808                 }
 809         }
 810
 811         if (wr_rel_set != ext_csd[EXT_CSD_WR_REL_SET] &&
 812             !(ext_csd[EXT_CSD_WR_REL_PARAM] & EXT_CSD_HS_CTRL_REL)) {
 813                 puts("Card does not support host controlled partition write "
 814                      "reliability settings\n");
 815                 return -EMEDIUMTYPE;
 816         }
 817
 818         if (ext_csd[EXT_CSD_PARTITION_SETTING] &
 819             EXT_CSD_PARTITION_SETTING_COMPLETED) {
 820                 printf("Card already partitioned\n");
 821                 return -EPERM;
 822         }
 823
 824         if (mode == MMC_HWPART_CONF_CHECK)
 825                 return 0;
 826
 827         /* Partitioning requires high-capacity size definitions */
 828         if (!(ext_csd[EXT_CSD_ERASE_GROUP_DEF] & 0x01)) {
 829                 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
 830                                  EXT_CSD_ERASE_GROUP_DEF, 1);
 831
 832                 if (err)
 833                         return err;
 834
 835                 ext_csd[EXT_CSD_ERASE_GROUP_DEF] = 1;
 836
 837                 /* update erase group size to be high-capacity */
 838                 mmc->erase_grp_size =
 839                         ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] * 1024;
 840
 841         }
 842
 843         /* all OK, write the configuration */
 844         for (i = 0; i < 4; i++) {
 845                 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
 846                                  EXT_CSD_ENH_START_ADDR+i,
 847                                  (enh_start_addr >> (i*8)) & 0xFF);
 848                 if (err)
 849                         return err;
 850         }
 851         for (i = 0; i < 3; i++) {
 852                 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
 853                                  EXT_CSD_ENH_SIZE_MULT+i,
 854                                  (enh_size_mult >> (i*8)) & 0xFF);
 855                 if (err)
 856                         return err;
 857         }
 858         for (pidx = 0; pidx < 4; pidx++) {
 859                 for (i = 0; i < 3; i++) {
 860                         err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
 861                                          EXT_CSD_GP_SIZE_MULT+pidx*3+i,
 862                                          (gp_size_mult[pidx] >> (i*8)) & 0xFF);
 863                         if (err)
 864                                 return err;
 865                 }
 866         }
 867         err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
 868                          EXT_CSD_PARTITIONS_ATTRIBUTE, part_attrs);
 869         if (err)
 870                 return err;
 871
 872         if (mode == MMC_HWPART_CONF_SET)
 873                 return 0;
 874
 875         /* The WR_REL_SET is a write-once register but shall be
 876          * written before setting PART_SETTING_COMPLETED. As it is
 877          * write-once we can only write it when completing the
 878          * partitioning. */
 879         if (wr_rel_set != ext_csd[EXT_CSD_WR_REL_SET]) {
 880                 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
 881                                  EXT_CSD_WR_REL_SET, wr_rel_set);
 882                 if (err)
 883                         return err;
 884         }
 885
 886         /* Setting PART_SETTING_COMPLETED confirms the partition
 887          * configuration but it only becomes effective after power
 888          * cycle, so we do not adjust the partition related settings
 889          * in the mmc struct. */
 890
 891         err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
 892                          EXT_CSD_PARTITION_SETTING,
 893                          EXT_CSD_PARTITION_SETTING_COMPLETED);
 894         if (err)
 895                 return err;
 896
 897         return 0;
 898 }
 899
 900 #if !CONFIG_IS_ENABLED(DM_MMC)
 901 int mmc_getcd(struct mmc *mmc)
 902 {
 903         int cd;
 904
 905         cd = board_mmc_getcd(mmc);
 906
 907         if (cd < 0) {
 908                 if (mmc->cfg->ops->getcd)
 909                         cd = mmc->cfg->ops->getcd(mmc);
 910                 else
 911                         cd = 1;
 912         }
 913
 914         return cd;
 915 }
 916 #endif
 917
 918 static int sd_switch(struct mmc *mmc, int mode, int group, u8 value, u8 *resp)
 919 {
 920         struct mmc_cmd cmd;
 921         struct mmc_data data;
 922
 923         /* Switch the frequency */
 924         cmd.cmdidx = SD_CMD_SWITCH_FUNC;
 925         cmd.resp_type = MMC_RSP_R1;
 926         cmd.cmdarg = (mode << 31) | 0xffffff;
 927         cmd.cmdarg &= ~(0xf << (group * 4));
 928         cmd.cmdarg |= value << (group * 4);
 929
 930         data.dest = (char *)resp;
 931         data.blocksize = 64;
 932         data.blocks = 1;
 933         data.flags = MMC_DATA_READ;
 934
 935         return mmc_send_cmd(mmc, &cmd, &data);
 936 }
 937
 938
 939 static int sd_change_freq(struct mmc *mmc)
 940 {
 941         int err;
 942         struct mmc_cmd cmd;
 943         ALLOC_CACHE_ALIGN_BUFFER(__be32, scr, 2);
 944         ALLOC_CACHE_ALIGN_BUFFER(__be32, switch_status, 16);
 945         struct mmc_data data;
 946         int timeout;
 947
 948         mmc->card_caps = 0;
 949
 950         if (mmc_host_is_spi(mmc))
 951                 return 0;
 952
 953         /* Read the SCR to find out if this card supports higher speeds */
 954         cmd.cmdidx = MMC_CMD_APP_CMD;
 955         cmd.resp_type = MMC_RSP_R1;
 956         cmd.cmdarg = mmc->rca << 16;
 957
 958         err = mmc_send_cmd(mmc, &cmd, NULL);
 959
 960         if (err)
 961                 return err;
 962
 963         cmd.cmdidx = SD_CMD_APP_SEND_SCR;
 964         cmd.resp_type = MMC_RSP_R1;
 965         cmd.cmdarg = 0;
 966
 967         timeout = 3;
 968
 969 retry_scr:
 970         data.dest = (char *)scr;
 971         data.blocksize = 8;
 972         data.blocks = 1;
 973         data.flags = MMC_DATA_READ;
 974
 975         err = mmc_send_cmd(mmc, &cmd, &data);
 976
 977         if (err) {
 978                 if (timeout--)
 979                         goto retry_scr;
 980
 981                 return err;
 982         }
 983
 984         mmc->scr[0] = __be32_to_cpu(scr[0]);
 985         mmc->scr[1] = __be32_to_cpu(scr[1]);
 986
 987         switch ((mmc->scr[0] >> 24) & 0xf) {
 988         case 0:
 989                 mmc->version = SD_VERSION_1_0;
 990                 break;
 991         case 1:
 992                 mmc->version = SD_VERSION_1_10;
 993                 break;
 994         case 2:
 995                 mmc->version = SD_VERSION_2;
 996                 if ((mmc->scr[0] >> 15) & 0x1)
 997                         mmc->version = SD_VERSION_3;
 998                 break;
 999         default:
1000                 mmc->version = SD_VERSION_1_0;
1001                 break;
1002         }
1003
1004         if (mmc->scr[0] & SD_DATA_4BIT)
1005                 mmc->card_caps |= MMC_MODE_4BIT;
1006
1007         /* Version 1.0 doesn't support switching */
1008         if (mmc->version == SD_VERSION_1_0)
1009                 return 0;
1010
1011         timeout = 4;
1012         while (timeout--) {
1013                 err = sd_switch(mmc, SD_SWITCH_CHECK, 0, 1,
1014                                 (u8 *)switch_status);
1015
1016                 if (err)
1017                         return err;
1018
1019                 /* The high-speed function is busy.  Try again */
1020                 if (!(__be32_to_cpu(switch_status[7]) & SD_HIGHSPEED_BUSY))
1021                         break;
1022         }
1023
1024         /* If high-speed isn't supported, we return */
1025         if (!(__be32_to_cpu(switch_status[3]) & SD_HIGHSPEED_SUPPORTED))
1026                 return 0;
1027
1028         /*
1029          * If the host doesn't support SD_HIGHSPEED, do not switch card to
1030          * HIGHSPEED mode even if the card support SD_HIGHSPPED.
1031          * This can avoid furthur problem when the card runs in different
1032          * mode between the host.
1033          */
1034         if (!((mmc->cfg->host_caps & MMC_MODE_HS_52MHz) &&
1035                 (mmc->cfg->host_caps & MMC_MODE_HS)))
1036                 return 0;
1037
1038         err = sd_switch(mmc, SD_SWITCH_SWITCH, 0, 1, (u8 *)switch_status);
1039
1040         if (err)
1041                 return err;
1042
1043         if ((__be32_to_cpu(switch_status[4]) & 0x0f000000) == 0x01000000)
1044                 mmc->card_caps |= MMC_MODE_HS;
1045
1046         return 0;
1047 }
1048
1049 static int sd_read_ssr(struct mmc *mmc)
1050 {
1051         int err, i;
1052         struct mmc_cmd cmd;
1053         ALLOC_CACHE_ALIGN_BUFFER(uint, ssr, 16);
1054         struct mmc_data data;
1055         int timeout = 3;
1056         unsigned int au, eo, et, es;
1057
1058         cmd.cmdidx = MMC_CMD_APP_CMD;
1059         cmd.resp_type = MMC_RSP_R1;
1060         cmd.cmdarg = mmc->rca << 16;
1061
1062         err = mmc_send_cmd(mmc, &cmd, NULL);
1063         if (err)
1064                 return err;
1065
1066         cmd.cmdidx = SD_CMD_APP_SD_STATUS;
1067         cmd.resp_type = MMC_RSP_R1;
1068         cmd.cmdarg = 0;
1069
1070 retry_ssr:
1071         data.dest = (char *)ssr;
1072         data.blocksize = 64;
1073         data.blocks = 1;
1074         data.flags = MMC_DATA_READ;
1075
1076         err = mmc_send_cmd(mmc, &cmd, &data);
1077         if (err) {
1078                 if (timeout--)
1079                         goto retry_ssr;
1080
1081                 return err;
1082         }
1083
1084         for (i = 0; i < 16; i++)
1085                 ssr[i] = be32_to_cpu(ssr[i]);
1086
1087         au = (ssr[2] >> 12) & 0xF;
1088         if ((au <= 9) || (mmc->version == SD_VERSION_3)) {
1089                 mmc->ssr.au = sd_au_size[au];
1090                 es = (ssr[3] >> 24) & 0xFF;
1091                 es |= (ssr[2] & 0xFF) << 8;
1092                 et = (ssr[3] >> 18) & 0x3F;
1093                 if (es && et) {
1094                         eo = (ssr[3] >> 16) & 0x3;
1095                         mmc->ssr.erase_timeout = (et * 1000) / es;
1096                         mmc->ssr.erase_offset = eo * 1000;
1097                 }
1098         } else {
1099                 debug("Invalid Allocation Unit Size.\n");
1100         }
1101
1102         return 0;
1103 }
1104
1105 /* frequency bases */
1106 /* divided by 10 to be nice to platforms without floating point */
1107 static const int fbase[] = {
1108         10000,
1109         100000,
1110         1000000,
1111         10000000,
1112 };
1113
1114 /* Multiplier values for TRAN_SPEED.  Multiplied by 10 to be nice
1115  * to platforms without floating point.
1116  */
1117 static const u8 multipliers[] = {
1118         0,      /* reserved */
1119         10,
1120         12,
1121         13,
1122         15,
1123         20,
1124         25,
1125         30,
1126         35,
1127         40,
1128         45,
1129         50,
1130         55,
1131         60,
1132         70,
1133         80,
1134 };
1135
1136 #if !CONFIG_IS_ENABLED(DM_MMC)
1137 static void mmc_set_ios(struct mmc *mmc)
1138 {
1139         if (mmc->cfg->ops->set_ios)
1140                 mmc->cfg->ops->set_ios(mmc);
1141 }
1142 #endif
1143
1144 void mmc_set_clock(struct mmc *mmc, uint clock)
1145 {
1146         if (clock > mmc->cfg->f_max)
1147                 clock = mmc->cfg->f_max;
1148
1149         if (clock < mmc->cfg->f_min)
1150                 clock = mmc->cfg->f_min;
1151
1152         mmc->clock = clock;
1153
1154         mmc_set_ios(mmc);
1155 }
1156
1157 static void mmc_set_bus_width(struct mmc *mmc, uint width)
1158 {
1159         mmc->bus_width = width;
1160
1161         mmc_set_ios(mmc);
1162 }
1163
1164 #if CONFIG_IS_ENABLED(MMC_VERBOSE) || defined(DEBUG)
1165 /*
1166  * helper function to display the capabilities in a human
1167  * friendly manner. The capabilities include bus width and
1168  * supported modes.
1169  */
1170 void mmc_dump_capabilities(const char *text, uint caps)
1171 {
1172         enum bus_mode mode;
1173
1174         printf("%s: widths [", text);
1175         if (caps & MMC_MODE_8BIT)
1176                 printf("8, ");
1177         if (caps & MMC_MODE_4BIT)
1178                 printf("4, ");
1179         printf("1] modes [");
1180
1181         for (mode = MMC_LEGACY; mode < MMC_MODES_END; mode++)
1182                 if (MMC_CAP(mode) & caps)
1183                         printf("%s, ", mmc_mode_name(mode));
1184         printf("\b\b]\n");
1185 }
1186 #endif
1187
1188 static int sd_select_bus_freq_width(struct mmc *mmc)
1189 {
1190         int err;
1191         struct mmc_cmd cmd;
1192
1193         err = sd_change_freq(mmc);
1194         if (err)
1195                 return err;
1196
1197         /* Restrict card's capabilities by what the host can do */
1198         mmc->card_caps &= mmc->cfg->host_caps;
1199
1200         if (mmc->card_caps & MMC_MODE_4BIT) {
1201                 cmd.cmdidx = MMC_CMD_APP_CMD;
1202                 cmd.resp_type = MMC_RSP_R1;
1203                 cmd.cmdarg = mmc->rca << 16;
1204
1205                 err = mmc_send_cmd(mmc, &cmd, NULL);
1206                 if (err)
1207                         return err;
1208
1209                 cmd.cmdidx = SD_CMD_APP_SET_BUS_WIDTH;
1210                 cmd.resp_type = MMC_RSP_R1;
1211                 cmd.cmdarg = 2;
1212                 err = mmc_send_cmd(mmc, &cmd, NULL);
1213                 if (err)
1214                         return err;
1215
1216                 mmc_set_bus_width(mmc, 4);
1217         }
1218
1219         err = sd_read_ssr(mmc);
1220         if (err)
1221                 return err;
1222
1223         if (mmc->card_caps & MMC_MODE_HS)
1224                 mmc_select_mode(mmc, SD_HS);
1225         else
1226                 mmc_select_mode(mmc, SD_LEGACY);
1227
1228         return 0;
1229 }
1230
1231 /*
1232  * read the compare the part of ext csd that is constant.
1233  * This can be used to check that the transfer is working
1234  * as expected.
1235  */
1236 static int mmc_read_and_compare_ext_csd(struct mmc *mmc)
1237 {
1238         int err;
1239         const u8 *ext_csd = mmc->ext_csd;
1240         ALLOC_CACHE_ALIGN_BUFFER(u8, test_csd, MMC_MAX_BLOCK_LEN);
1241
1242         err = mmc_send_ext_csd(mmc, test_csd);
1243         if (err)
1244                 return err;
1245
1246         /* Only compare read only fields */
1247         if (ext_csd[EXT_CSD_PARTITIONING_SUPPORT]
1248                 == test_csd[EXT_CSD_PARTITIONING_SUPPORT] &&
1249             ext_csd[EXT_CSD_HC_WP_GRP_SIZE]
1250                 == test_csd[EXT_CSD_HC_WP_GRP_SIZE] &&
1251             ext_csd[EXT_CSD_REV]
1252                 == test_csd[EXT_CSD_REV] &&
1253             ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE]
1254                 == test_csd[EXT_CSD_HC_ERASE_GRP_SIZE] &&
1255             memcmp(&ext_csd[EXT_CSD_SEC_CNT],
1256                    &test_csd[EXT_CSD_SEC_CNT], 4) == 0)
1257                 return 0;
1258
1259         return -EBADMSG;
1260 }
1261
1262 static int mmc_select_bus_freq_width(struct mmc *mmc)
1263 {
1264         /* An array of possible bus widths in order of preference */
1265         static const unsigned int ext_csd_bits[] = {
1266                 EXT_CSD_DDR_BUS_WIDTH_8,
1267                 EXT_CSD_DDR_BUS_WIDTH_4,
1268                 EXT_CSD_BUS_WIDTH_8,
1269                 EXT_CSD_BUS_WIDTH_4,
1270                 EXT_CSD_BUS_WIDTH_1,
1271         };
1272         /* An array to map CSD bus widths to host cap bits */
1273         static const unsigned int ext_to_hostcaps[] = {
1274                 [EXT_CSD_DDR_BUS_WIDTH_4] =
1275                         MMC_MODE_DDR_52MHz | MMC_MODE_4BIT,
1276                 [EXT_CSD_DDR_BUS_WIDTH_8] =
1277                         MMC_MODE_DDR_52MHz | MMC_MODE_8BIT,
1278                 [EXT_CSD_BUS_WIDTH_4] = MMC_MODE_4BIT,
1279                 [EXT_CSD_BUS_WIDTH_8] = MMC_MODE_8BIT,
1280         };
1281         /* An array to map chosen bus width to an integer */
1282         static const unsigned int widths[] = {
1283                 8, 4, 8, 4, 1,
1284         };
1285         int err;
1286         int idx;
1287
1288         err = mmc_change_freq(mmc);
1289         if (err)
1290                 return err;
1291
1292         /* Restrict card's capabilities by what the host can do */
1293         mmc->card_caps &= mmc->cfg->host_caps;
1294
1295         /* Only version 4 of MMC supports wider bus widths */
1296         if (mmc->version < MMC_VERSION_4)
1297                 return 0;
1298
1299         if (!mmc->ext_csd) {
1300                 debug("No ext_csd found!\n"); /* this should enver happen */
1301                 return -ENOTSUPP;
1302         }
1303
1304         for (idx = 0; idx < ARRAY_SIZE(ext_csd_bits); idx++) {
1305                 unsigned int extw = ext_csd_bits[idx];
1306                 unsigned int caps = ext_to_hostcaps[extw];
1307                 /*
1308                  * If the bus width is still not changed,
1309                  * don't try to set the default again.
1310                  * Otherwise, recover from switch attempts
1311                  * by switching to 1-bit bus width.
1312                  */
1313                 if (extw == EXT_CSD_BUS_WIDTH_1 &&
1314                     mmc->bus_width == 1) {
1315                         err = 0;
1316                         break;
1317                 }
1318
1319                 /*
1320                  * Check to make sure the card and controller support
1321                  * these capabilities
1322                  */
1323                 if ((mmc->card_caps & caps) != caps)
1324                         continue;
1325
1326                 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
1327                                  EXT_CSD_BUS_WIDTH, extw);
1328
1329                 if (err)
1330                         continue;
1331
1332                 mmc->ddr_mode = (caps & MMC_MODE_DDR_52MHz) ? 1 : 0;
1333                 mmc_set_bus_width(mmc, widths[idx]);
1334
1335                 err = mmc_read_and_compare_ext_csd(mmc);
1336                 if (!err)
1337                         break;
1338         }
1339
1340         if (err)
1341                 return err;
1342
1343         if (mmc->card_caps & MMC_MODE_HS_52MHz) {
1344                 if (mmc->ddr_mode)
1345                         mmc_select_mode(mmc, MMC_DDR_52);
1346                 else
1347                         mmc_select_mode(mmc, MMC_HS_52);
1348         } else if (mmc->card_caps & MMC_MODE_HS)
1349                 mmc_select_mode(mmc, MMC_HS);
1350
1351         return err;
1352 }
1353
1354 static int mmc_startup_v4(struct mmc *mmc)
1355 {
1356         int err, i;
1357         u64 capacity;
1358         bool has_parts = false;
1359         bool part_completed;
1360         u8 *ext_csd;
1361
1362         if (IS_SD(mmc) || (mmc->version < MMC_VERSION_4))
1363                 return 0;
1364
1365         ext_csd = malloc_cache_aligned(MMC_MAX_BLOCK_LEN);
1366         if (!ext_csd)
1367                 return -ENOMEM;
1368
1369         mmc->ext_csd = ext_csd;
1370
1371         /* check  ext_csd version and capacity */
1372         err = mmc_send_ext_csd(mmc, ext_csd);
1373         if (err)
1374                 return err;
1375         if (ext_csd[EXT_CSD_REV] >= 2) {
1376                 /*
1377                  * According to the JEDEC Standard, the value of
1378                  * ext_csd's capacity is valid if the value is more
1379                  * than 2GB
1380                  */
1381                 capacity = ext_csd[EXT_CSD_SEC_CNT] << 0
1382                                 | ext_csd[EXT_CSD_SEC_CNT + 1] << 8
1383                                 | ext_csd[EXT_CSD_SEC_CNT + 2] << 16
1384                                 | ext_csd[EXT_CSD_SEC_CNT + 3] << 24;
1385                 capacity *= MMC_MAX_BLOCK_LEN;
1386                 if ((capacity >> 20) > 2 * 1024)
1387                         mmc->capacity_user = capacity;
1388         }
1389
1390         switch (ext_csd[EXT_CSD_REV]) {
1391         case 1:
1392                 mmc->version = MMC_VERSION_4_1;
1393                 break;
1394         case 2:
1395                 mmc->version = MMC_VERSION_4_2;
1396                 break;
1397         case 3:
1398                 mmc->version = MMC_VERSION_4_3;
1399                 break;
1400         case 5:
1401                 mmc->version = MMC_VERSION_4_41;
1402                 break;
1403         case 6:
1404                 mmc->version = MMC_VERSION_4_5;
1405                 break;
1406         case 7:
1407                 mmc->version = MMC_VERSION_5_0;
1408                 break;
1409         case 8:
1410                 mmc->version = MMC_VERSION_5_1;
1411                 break;
1412         }
1413
1414         /* The partition data may be non-zero but it is only
1415          * effective if PARTITION_SETTING_COMPLETED is set in
1416          * EXT_CSD, so ignore any data if this bit is not set,
1417          * except for enabling the high-capacity group size
1418          * definition (see below).
1419          */
1420         part_completed = !!(ext_csd[EXT_CSD_PARTITION_SETTING] &
1421                             EXT_CSD_PARTITION_SETTING_COMPLETED);
1422
1423         /* store the partition info of emmc */
1424         mmc->part_support = ext_csd[EXT_CSD_PARTITIONING_SUPPORT];
1425         if ((ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & PART_SUPPORT) ||
1426             ext_csd[EXT_CSD_BOOT_MULT])
1427                 mmc->part_config = ext_csd[EXT_CSD_PART_CONF];
1428         if (part_completed &&
1429             (ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & ENHNCD_SUPPORT))
1430                 mmc->part_attr = ext_csd[EXT_CSD_PARTITIONS_ATTRIBUTE];
1431
1432         mmc->capacity_boot = ext_csd[EXT_CSD_BOOT_MULT] << 17;
1433
1434         mmc->capacity_rpmb = ext_csd[EXT_CSD_RPMB_MULT] << 17;
1435
1436         for (i = 0; i < 4; i++) {
1437                 int idx = EXT_CSD_GP_SIZE_MULT + i * 3;
1438                 uint mult = (ext_csd[idx + 2] << 16) +
1439                         (ext_csd[idx + 1] << 8) + ext_csd[idx];
1440                 if (mult)
1441                         has_parts = true;
1442                 if (!part_completed)
1443                         continue;
1444                 mmc->capacity_gp[i] = mult;
1445                 mmc->capacity_gp[i] *=
1446                         ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE];
1447                 mmc->capacity_gp[i] *= ext_csd[EXT_CSD_HC_WP_GRP_SIZE];
1448                 mmc->capacity_gp[i] <<= 19;
1449         }
1450
1451         if (part_completed) {
1452                 mmc->enh_user_size =
1453                         (ext_csd[EXT_CSD_ENH_SIZE_MULT + 2] << 16) +
1454                         (ext_csd[EXT_CSD_ENH_SIZE_MULT + 1] << 8) +
1455                         ext_csd[EXT_CSD_ENH_SIZE_MULT];
1456                 mmc->enh_user_size *= ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE];
1457                 mmc->enh_user_size *= ext_csd[EXT_CSD_HC_WP_GRP_SIZE];
1458                 mmc->enh_user_size <<= 19;
1459                 mmc->enh_user_start =
1460                         (ext_csd[EXT_CSD_ENH_START_ADDR + 3] << 24) +
1461                         (ext_csd[EXT_CSD_ENH_START_ADDR + 2] << 16) +
1462                         (ext_csd[EXT_CSD_ENH_START_ADDR + 1] << 8) +
1463                         ext_csd[EXT_CSD_ENH_START_ADDR];
1464                 if (mmc->high_capacity)
1465                         mmc->enh_user_start <<= 9;
1466         }
1467
1468         /*
1469          * Host needs to enable ERASE_GRP_DEF bit if device is
1470          * partitioned. This bit will be lost every time after a reset
1471          * or power off. This will affect erase size.
1472          */
1473         if (part_completed)
1474                 has_parts = true;
1475         if ((ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & PART_SUPPORT) &&
1476             (ext_csd[EXT_CSD_PARTITIONS_ATTRIBUTE] & PART_ENH_ATTRIB))
1477                 has_parts = true;
1478         if (has_parts) {
1479                 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
1480                                  EXT_CSD_ERASE_GROUP_DEF, 1);
1481
1482                 if (err)
1483                         return err;
1484
1485                 ext_csd[EXT_CSD_ERASE_GROUP_DEF] = 1;
1486         }
1487
1488         if (ext_csd[EXT_CSD_ERASE_GROUP_DEF] & 0x01) {
1489                 /* Read out group size from ext_csd */
1490                 mmc->erase_grp_size =
1491                         ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] * 1024;
1492                 /*
1493                  * if high capacity and partition setting completed
1494                  * SEC_COUNT is valid even if it is smaller than 2 GiB
1495                  * JEDEC Standard JESD84-B45, 6.2.4
1496                  */
1497                 if (mmc->high_capacity && part_completed) {
1498                         capacity = (ext_csd[EXT_CSD_SEC_CNT]) |
1499                                 (ext_csd[EXT_CSD_SEC_CNT + 1] << 8) |
1500                                 (ext_csd[EXT_CSD_SEC_CNT + 2] << 16) |
1501                                 (ext_csd[EXT_CSD_SEC_CNT + 3] << 24);
1502                         capacity *= MMC_MAX_BLOCK_LEN;
1503                         mmc->capacity_user = capacity;
1504                 }
1505         } else {
1506                 /* Calculate the group size from the csd value. */
1507                 int erase_gsz, erase_gmul;
1508
1509                 erase_gsz = (mmc->csd[2] & 0x00007c00) >> 10;
1510                 erase_gmul = (mmc->csd[2] & 0x000003e0) >> 5;
1511                 mmc->erase_grp_size = (erase_gsz + 1)
1512                         * (erase_gmul + 1);
1513         }
1514
1515         mmc->hc_wp_grp_size = 1024
1516                 * ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE]
1517                 * ext_csd[EXT_CSD_HC_WP_GRP_SIZE];
1518
1519         mmc->wr_rel_set = ext_csd[EXT_CSD_WR_REL_SET];
1520
1521         return 0;
1522 }
1523
1524 static int mmc_startup(struct mmc *mmc)
1525 {
1526         int err, i;
1527         uint mult, freq;
1528         u64 cmult, csize;
1529         struct mmc_cmd cmd;
1530         struct blk_desc *bdesc;
1531
1532 #ifdef CONFIG_MMC_SPI_CRC_ON
1533         if (mmc_host_is_spi(mmc)) { /* enable CRC check for spi */
1534                 cmd.cmdidx = MMC_CMD_SPI_CRC_ON_OFF;
1535                 cmd.resp_type = MMC_RSP_R1;
1536                 cmd.cmdarg = 1;
1537                 err = mmc_send_cmd(mmc, &cmd, NULL);
1538
1539                 if (err)
1540                         return err;
1541         }
1542 #endif
1543
1544         /* Put the Card in Identify Mode */
1545         cmd.cmdidx = mmc_host_is_spi(mmc) ? MMC_CMD_SEND_CID :
1546                 MMC_CMD_ALL_SEND_CID; /* cmd not supported in spi */
1547         cmd.resp_type = MMC_RSP_R2;
1548         cmd.cmdarg = 0;
1549
1550         err = mmc_send_cmd(mmc, &cmd, NULL);
1551
1552         if (err)
1553                 return err;
1554
1555         memcpy(mmc->cid, cmd.response, 16);
1556
1557         /*
1558          * For MMC cards, set the Relative Address.
1559          * For SD cards, get the Relatvie Address.
1560          * This also puts the cards into Standby State
1561          */
1562         if (!mmc_host_is_spi(mmc)) { /* cmd not supported in spi */
1563                 cmd.cmdidx = SD_CMD_SEND_RELATIVE_ADDR;
1564                 cmd.cmdarg = mmc->rca << 16;
1565                 cmd.resp_type = MMC_RSP_R6;
1566
1567                 err = mmc_send_cmd(mmc, &cmd, NULL);
1568
1569                 if (err)
1570                         return err;
1571
1572                 if (IS_SD(mmc))
1573                         mmc->rca = (cmd.response[0] >> 16) & 0xffff;
1574         }
1575
1576         /* Get the Card-Specific Data */
1577         cmd.cmdidx = MMC_CMD_SEND_CSD;
1578         cmd.resp_type = MMC_RSP_R2;
1579         cmd.cmdarg = mmc->rca << 16;
1580
1581         err = mmc_send_cmd(mmc, &cmd, NULL);
1582
1583         if (err)
1584                 return err;
1585
1586         mmc->csd[0] = cmd.response[0];
1587         mmc->csd[1] = cmd.response[1];
1588         mmc->csd[2] = cmd.response[2];
1589         mmc->csd[3] = cmd.response[3];
1590
1591         if (mmc->version == MMC_VERSION_UNKNOWN) {
1592                 int version = (cmd.response[0] >> 26) & 0xf;
1593
1594                 switch (version) {
1595                 case 0:
1596                         mmc->version = MMC_VERSION_1_2;
1597                         break;
1598                 case 1:
1599                         mmc->version = MMC_VERSION_1_4;
1600                         break;
1601                 case 2:
1602                         mmc->version = MMC_VERSION_2_2;
1603                         break;
1604                 case 3:
1605                         mmc->version = MMC_VERSION_3;
1606                         break;
1607                 case 4:
1608                         mmc->version = MMC_VERSION_4;
1609                         break;
1610                 default:
1611                         mmc->version = MMC_VERSION_1_2;
1612                         break;
1613                 }
1614         }
1615
1616         /* divide frequency by 10, since the mults are 10x bigger */
1617         freq = fbase[(cmd.response[0] & 0x7)];
1618         mult = multipliers[((cmd.response[0] >> 3) & 0xf)];
1619
1620         mmc->legacy_speed = freq * mult;
1621         mmc_select_mode(mmc, MMC_LEGACY);
1622
1623         mmc->dsr_imp = ((cmd.response[1] >> 12) & 0x1);
1624         mmc->read_bl_len = 1 << ((cmd.response[1] >> 16) & 0xf);
1625
1626         if (IS_SD(mmc))
1627                 mmc->write_bl_len = mmc->read_bl_len;
1628         else
1629                 mmc->write_bl_len = 1 << ((cmd.response[3] >> 22) & 0xf);
1630
1631         if (mmc->high_capacity) {
1632                 csize = (mmc->csd[1] & 0x3f) << 16
1633                         | (mmc->csd[2] & 0xffff0000) >> 16;
1634                 cmult = 8;
1635         } else {
1636                 csize = (mmc->csd[1] & 0x3ff) << 2
1637                         | (mmc->csd[2] & 0xc0000000) >> 30;
1638                 cmult = (mmc->csd[2] & 0x00038000) >> 15;
1639         }
1640
1641         mmc->capacity_user = (csize + 1) << (cmult + 2);
1642         mmc->capacity_user *= mmc->read_bl_len;
1643         mmc->capacity_boot = 0;
1644         mmc->capacity_rpmb = 0;
1645         for (i = 0; i < 4; i++)
1646                 mmc->capacity_gp[i] = 0;
1647
1648         if (mmc->read_bl_len > MMC_MAX_BLOCK_LEN)
1649                 mmc->read_bl_len = MMC_MAX_BLOCK_LEN;
1650
1651         if (mmc->write_bl_len > MMC_MAX_BLOCK_LEN)
1652                 mmc->write_bl_len = MMC_MAX_BLOCK_LEN;
1653
1654         if ((mmc->dsr_imp) && (0xffffffff != mmc->dsr)) {
1655                 cmd.cmdidx = MMC_CMD_SET_DSR;
1656                 cmd.cmdarg = (mmc->dsr & 0xffff) << 16;
1657                 cmd.resp_type = MMC_RSP_NONE;
1658                 if (mmc_send_cmd(mmc, &cmd, NULL))
1659                         printf("MMC: SET_DSR failed\n");
1660         }
1661
1662         /* Select the card, and put it into Transfer Mode */
1663         if (!mmc_host_is_spi(mmc)) { /* cmd not supported in spi */
1664                 cmd.cmdidx = MMC_CMD_SELECT_CARD;
1665                 cmd.resp_type = MMC_RSP_R1;
1666                 cmd.cmdarg = mmc->rca << 16;
1667                 err = mmc_send_cmd(mmc, &cmd, NULL);
1668
1669                 if (err)
1670                         return err;
1671         }
1672
1673         /*
1674          * For SD, its erase group is always one sector
1675          */
1676         mmc->erase_grp_size = 1;
1677         mmc->part_config = MMCPART_NOAVAILABLE;
1678
1679         err = mmc_startup_v4(mmc);
1680         if (err)
1681                 return err;
1682
1683         err = mmc_set_capacity(mmc, mmc_get_blk_desc(mmc)->hwpart);
1684         if (err)
1685                 return err;
1686
1687         if (IS_SD(mmc))
1688                 err = sd_select_bus_freq_width(mmc);
1689         else
1690                 err = mmc_select_bus_freq_width(mmc);
1691
1692         if (err)
1693                 return err;
1694
1695
1696         /* Fix the block length for DDR mode */
1697         if (mmc->ddr_mode) {
1698                 mmc->read_bl_len = MMC_MAX_BLOCK_LEN;
1699                 mmc->write_bl_len = MMC_MAX_BLOCK_LEN;
1700         }
1701
1702         /* fill in device description */
1703         bdesc = mmc_get_blk_desc(mmc);
1704         bdesc->lun = 0;
1705         bdesc->hwpart = 0;
1706         bdesc->type = 0;
1707         bdesc->blksz = mmc->read_bl_len;
1708         bdesc->log2blksz = LOG2(bdesc->blksz);
1709         bdesc->lba = lldiv(mmc->capacity, mmc->read_bl_len);
1710 #if !defined(CONFIG_SPL_BUILD) || \
1711                 (defined(CONFIG_SPL_LIBCOMMON_SUPPORT) && \
1712                 !defined(CONFIG_USE_TINY_PRINTF))
1713         sprintf(bdesc->vendor, "Man %06x Snr %04x%04x",
1714                 mmc->cid[0] >> 24, (mmc->cid[2] & 0xffff),
1715                 (mmc->cid[3] >> 16) & 0xffff);
1716         sprintf(bdesc->product, "%c%c%c%c%c%c", mmc->cid[0] & 0xff,
1717                 (mmc->cid[1] >> 24), (mmc->cid[1] >> 16) & 0xff,
1718                 (mmc->cid[1] >> 8) & 0xff, mmc->cid[1] & 0xff,
1719                 (mmc->cid[2] >> 24) & 0xff);
1720         sprintf(bdesc->revision, "%d.%d", (mmc->cid[2] >> 20) & 0xf,
1721                 (mmc->cid[2] >> 16) & 0xf);
1722 #else
1723         bdesc->vendor[0] = 0;
1724         bdesc->product[0] = 0;
1725         bdesc->revision[0] = 0;
1726 #endif
1727 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBDISK_SUPPORT)
1728         part_init(bdesc);
1729 #endif
1730
1731         return 0;
1732 }
1733
1734 static int mmc_send_if_cond(struct mmc *mmc)
1735 {
1736         struct mmc_cmd cmd;
1737         int err;
1738
1739         cmd.cmdidx = SD_CMD_SEND_IF_COND;
1740         /* We set the bit if the host supports voltages between 2.7 and 3.6 V */
1741         cmd.cmdarg = ((mmc->cfg->voltages & 0xff8000) != 0) << 8 | 0xaa;
1742         cmd.resp_type = MMC_RSP_R7;
1743
1744         err = mmc_send_cmd(mmc, &cmd, NULL);
1745
1746         if (err)
1747                 return err;
1748
1749         if ((cmd.response[0] & 0xff) != 0xaa)
1750                 return -EOPNOTSUPP;
1751         else
1752                 mmc->version = SD_VERSION_2;
1753
1754         return 0;
1755 }
1756
1757 #if !CONFIG_IS_ENABLED(DM_MMC)
1758 /* board-specific MMC power initializations. */
1759 __weak void board_mmc_power_init(void)
1760 {
1761 }
1762 #endif
1763
1764 static int mmc_power_init(struct mmc *mmc)
1765 {
1766 #if CONFIG_IS_ENABLED(DM_MMC)
1767 #if CONFIG_IS_ENABLED(DM_REGULATOR)
1768         int ret;
1769
1770         ret = device_get_supply_regulator(mmc->dev, "vmmc-supply",
1771                                           &mmc->vmmc_supply);
1772         if (ret)
1773                 debug("%s: No vmmc supply\n", mmc->dev->name);
1774
1775         ret = device_get_supply_regulator(mmc->dev, "vqmmc-supply",
1776                                           &mmc->vqmmc_supply);
1777         if (ret)
1778                 debug("%s: No vqmmc supply\n", mmc->dev->name);
1779
1780         if (mmc->vmmc_supply) {
1781                 ret = regulator_set_enable(mmc->vmmc_supply, true);
1782                 if (ret) {
1783                         puts("Error enabling VMMC supply\n");
1784                         return ret;
1785                 }
1786         }
1787 #endif
1788 #else /* !CONFIG_DM_MMC */
1789         /*
1790          * Driver model should use a regulator, as above, rather than calling
1791          * out to board code.
1792          */
1793         board_mmc_power_init();
1794 #endif
1795         return 0;
1796 }
1797
1798 int mmc_start_init(struct mmc *mmc)
1799 {
1800         bool no_card;
1801         int err;
1802
1803         /* we pretend there's no card when init is NULL */
1804         no_card = mmc_getcd(mmc) == 0;
1805 #if !CONFIG_IS_ENABLED(DM_MMC)
1806         no_card = no_card || (mmc->cfg->ops->init == NULL);
1807 #endif
1808         if (no_card) {
1809                 mmc->has_init = 0;
1810 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
1811                 printf("MMC: no card present\n");
1812 #endif
1813                 return -ENOMEDIUM;
1814         }
1815
1816         if (mmc->has_init)
1817                 return 0;
1818
1819 #ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT
1820         mmc_adapter_card_type_ident();
1821 #endif
1822         err = mmc_power_init(mmc);
1823         if (err)
1824                 return err;
1825
1826 #if CONFIG_IS_ENABLED(DM_MMC)
1827         /* The device has already been probed ready for use */
1828 #else
1829         /* made sure it's not NULL earlier */
1830         err = mmc->cfg->ops->init(mmc);
1831         if (err)
1832                 return err;
1833 #endif
1834         mmc->ddr_mode = 0;
1835         mmc_set_bus_width(mmc, 1);
1836         mmc_set_clock(mmc, 1);
1837
1838         /* Reset the Card */
1839         err = mmc_go_idle(mmc);
1840
1841         if (err)
1842                 return err;
1843
1844         /* The internal partition reset to user partition(0) at every CMD0*/
1845         mmc_get_blk_desc(mmc)->hwpart = 0;
1846
1847         /* Test for SD version 2 */
1848         err = mmc_send_if_cond(mmc);
1849
1850         /* Now try to get the SD card's operating condition */
1851         err = sd_send_op_cond(mmc);
1852
1853         /* If the command timed out, we check for an MMC card */
1854         if (err == -ETIMEDOUT) {
1855                 err = mmc_send_op_cond(mmc);
1856
1857                 if (err) {
1858 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
1859                         printf("Card did not respond to voltage select!\n");
1860 #endif
1861                         return -EOPNOTSUPP;
1862                 }
1863         }
1864
1865         if (!err)
1866                 mmc->init_in_progress = 1;
1867
1868         return err;
1869 }
1870
1871 static int mmc_complete_init(struct mmc *mmc)
1872 {
1873         int err = 0;
1874
1875         mmc->init_in_progress = 0;
1876         if (mmc->op_cond_pending)
1877                 err = mmc_complete_op_cond(mmc);
1878
1879         if (!err)
1880                 err = mmc_startup(mmc);
1881         if (err)
1882                 mmc->has_init = 0;
1883         else
1884                 mmc->has_init = 1;
1885         return err;
1886 }
1887
1888 int mmc_init(struct mmc *mmc)
1889 {
1890         int err = 0;
1891         __maybe_unused unsigned start;
1892 #if CONFIG_IS_ENABLED(DM_MMC)
1893         struct mmc_uclass_priv *upriv = dev_get_uclass_priv(mmc->dev);
1894
1895         upriv->mmc = mmc;
1896 #endif
1897         if (mmc->has_init)
1898                 return 0;
1899
1900         start = get_timer(0);
1901
1902         if (!mmc->init_in_progress)
1903                 err = mmc_start_init(mmc);
1904
1905         if (!err)
1906                 err = mmc_complete_init(mmc);
1907         if (err)
1908                 printf("%s: %d, time %lu\n", __func__, err, get_timer(start));
1909
1910         return err;
1911 }
1912
1913 int mmc_set_dsr(struct mmc *mmc, u16 val)
1914 {
1915         mmc->dsr = val;
1916         return 0;
1917 }
1918
1919 /* CPU-specific MMC initializations */
1920 __weak int cpu_mmc_init(bd_t *bis)
1921 {
1922         return -1;
1923 }
1924
1925 /* board-specific MMC initializations. */
1926 __weak int board_mmc_init(bd_t *bis)
1927 {
1928         return -1;
1929 }
1930
1931 void mmc_set_preinit(struct mmc *mmc, int preinit)
1932 {
1933         mmc->preinit = preinit;
1934 }
1935
1936 #if CONFIG_IS_ENABLED(DM_MMC) && defined(CONFIG_SPL_BUILD)
1937 static int mmc_probe(bd_t *bis)
1938 {
1939         return 0;
1940 }
1941 #elif CONFIG_IS_ENABLED(DM_MMC)
1942 static int mmc_probe(bd_t *bis)
1943 {
1944         int ret, i;
1945         struct uclass *uc;
1946         struct udevice *dev;
1947
1948         ret = uclass_get(UCLASS_MMC, &uc);
1949         if (ret)
1950                 return ret;
1951
1952         /*
1953          * Try to add them in sequence order. Really with driver model we
1954          * should allow holes, but the current MMC list does not allow that.
1955          * So if we request 0, 1, 3 we will get 0, 1, 2.
1956          */
1957         for (i = 0; ; i++) {
1958                 ret = uclass_get_device_by_seq(UCLASS_MMC, i, &dev);
1959                 if (ret == -ENODEV)
1960                         break;
1961         }
1962         uclass_foreach_dev(dev, uc) {
1963                 ret = device_probe(dev);
1964                 if (ret)
1965                         printf("%s - probe failed: %d\n", dev->name, ret);
1966         }
1967
1968         return 0;
1969 }
1970 #else
1971 static int mmc_probe(bd_t *bis)
1972 {
1973         if (board_mmc_init(bis) < 0)
1974                 cpu_mmc_init(bis);
1975
1976         return 0;
1977 }
1978 #endif
1979
1980 int mmc_initialize(bd_t *bis)
1981 {
1982         static int initialized = 0;
1983         int ret;
1984         if (initialized)        /* Avoid initializing mmc multiple times */
1985                 return 0;
1986         initialized = 1;
1987
1988 #if !CONFIG_IS_ENABLED(BLK)
1989 #if !CONFIG_IS_ENABLED(MMC_TINY)
1990         mmc_list_init();
1991 #endif
1992 #endif
1993         ret = mmc_probe(bis);
1994         if (ret)
1995                 return ret;
1996
1997 #ifndef CONFIG_SPL_BUILD
1998         print_mmc_devices(',');
1999 #endif
2000
2001         mmc_do_preinit();
2002         return 0;
2003 }
2004
2005 #ifdef CONFIG_CMD_BKOPS_ENABLE
2006 int mmc_set_bkops_enable(struct mmc *mmc)
2007 {
2008         int err;
2009         ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN);
2010
2011         err = mmc_send_ext_csd(mmc, ext_csd);
2012         if (err) {
2013                 puts("Could not get ext_csd register values\n");
2014                 return err;
2015         }
2016
2017         if (!(ext_csd[EXT_CSD_BKOPS_SUPPORT] & 0x1)) {
2018                 puts("Background operations not supported on device\n");
2019                 return -EMEDIUMTYPE;
2020         }
2021
2022         if (ext_csd[EXT_CSD_BKOPS_EN] & 0x1) {
2023                 puts("Background operations already enabled\n");
2024                 return 0;
2025         }
2026
2027         err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_BKOPS_EN, 1);
2028         if (err) {
2029                 puts("Failed to enable manual background operations\n");
2030                 return err;
2031         }
2032
2033         puts("Enabled manual background operations\n");
2034
2035         return 0;
2036 }
2037 #endif