1 // SPDX-License-Identifier: GPL-2.0+
11 #define SANDBOX_TIMER_RATE 1000000
13 /* system timer offset in ms */
14 static unsigned long sandbox_timer_offset;
16 void timer_test_add_offset(unsigned long offset)
18 sandbox_timer_offset += offset;
21 u64 notrace timer_early_get_count(void)
23 return os_get_nsec() / 1000 + sandbox_timer_offset * 1000;
26 unsigned long notrace timer_early_get_rate(void)
28 return SANDBOX_TIMER_RATE;
31 static notrace u64 sandbox_timer_get_count(struct udevice *dev)
33 return timer_early_get_count();
36 static int sandbox_timer_probe(struct udevice *dev)
38 struct timer_dev_priv *uc_priv = dev_get_uclass_priv(dev);
40 if (CONFIG_IS_ENABLED(CPU) &&
41 dev_read_bool(dev, "sandbox,timebase-frequency-fallback"))
42 return timer_timebase_fallback(dev);
43 else if (!uc_priv->clock_rate)
44 uc_priv->clock_rate = SANDBOX_TIMER_RATE;
49 static const struct timer_ops sandbox_timer_ops = {
50 .get_count = sandbox_timer_get_count,
53 static const struct udevice_id sandbox_timer_ids[] = {
54 { .compatible = "sandbox,timer" },
58 U_BOOT_DRIVER(sandbox_timer) = {
59 .name = "sandbox_timer",
61 .of_match = sandbox_timer_ids,
62 .probe = sandbox_timer_probe,
63 .ops = &sandbox_timer_ops,
64 .flags = DM_FLAG_PRE_RELOC,
67 /* This is here in case we don't have a device tree */
68 #if !CONFIG_IS_ENABLED(OF_PLATDATA)
69 U_BOOT_DRVINFO(sandbox_timer_non_fdt) = {
70 .name = "sandbox_timer",