1 menu "ARM architecture"
11 select SYS_CACHE_SHIFT_6
12 imply SPL_SEPARATE_BSS
15 bool "Enable support for CRC32 instruction"
16 depends on ARM64 && CC_IS_GCC
19 ARMv8 implements dedicated crc32 instruction for crc32 calculation.
20 This is faster than software crc32 calculation. This instruction may
21 not be present on all ARMv8.0, but is always present on ARMv8.1 and
24 config COUNTER_FREQUENCY
25 int "Timer clock frequency"
26 depends on ARM64 || CPU_V7A
27 default 8000000 if IMX8 || MX7 || MX6UL || MX6ULL
28 default 24000000 if ARCH_SUNXI || ARCH_EXYNOS || ROCKCHIP_RK3128 || \
29 ROCKCHIP_RK3288 || ROCKCHIP_RK322X || ROCKCHIP_RK3036
30 default 25000000 if ARCH_LX2160A || ARCH_LX2162A || ARCH_LS1088A
31 default 100000000 if ARCH_ZYNQMP
32 default 200000000 if ARCH_SOCFPGA && ARM64 && TARGET_SOCFPGA_AGILEX5
35 For platforms with ARMv8-A and ARMv7-A which features a system
36 counter, those platforms needs software to program the counter
37 frequency. Setup time clock frequency for certain platform.
38 0 means no need to configure the system counter frequency.
39 For platforms needs the frequency set in U-Boot with a
40 pre-defined value, should have the macro defined as a non-zero value.
42 config POSITION_INDEPENDENT
43 bool "Generate position-independent pre-relocation code"
44 depends on ARM64 || CPU_V7A
46 U-Boot expects to be linked to a specific hard-coded address, and to
47 be loaded to and run from that address. This option lifts that
48 restriction, thus allowing the code to be loaded to and executed from
49 almost any 4K aligned address. This logic relies on the relocation
50 information that is embedded in the binary to support U-Boot
51 relocating itself to the top-of-RAM later during execution.
53 config INIT_SP_RELATIVE
54 bool "Specify the early stack pointer relative to the .bss section"
56 default n if ARCH_QEMU
57 default y if POSITION_INDEPENDENT
59 U-Boot typically uses a hard-coded value for the stack pointer
60 before relocation. Enable this option to instead calculate the
61 initial SP at run-time. This is useful to avoid hard-coding addresses
62 into U-Boot, so that it can be loaded and executed at arbitrary
63 addresses and thus avoid using arbitrary addresses at runtime.
65 If this option is enabled, the early stack pointer is set to
66 &_bss_start with a offset value added. The offset is specified by
67 SYS_INIT_SP_BSS_OFFSET.
69 config SYS_INIT_SP_BSS_OFFSET
70 int "Early stack offset from the .bss base address"
72 depends on INIT_SP_RELATIVE
75 This option's value is the offset added to &_bss_start in order to
76 calculate the stack pointer. This offset should be large enough so
77 that the early malloc region, global data (gd), and early stack usage
78 do not overlap any appended DTB.
80 config SPL_SYS_NO_VECTOR_TABLE
84 config SPL_USE_SEPARATE_FAULT_HANDLERS
85 bool "Use separate fault handlers instead of a single common one"
86 depends on !SPL_SYS_NO_VECTOR_TABLE && !ARM64 && !CPU_V7M
88 Instead of a common fault handler, generate a separate one for
89 undefined_instruction, software_interrupt, prefetch_abort etc.
90 This is for debugging purposes, when you want to set breakpoints
93 config LINUX_KERNEL_IMAGE_HEADER
97 Place a Linux kernel image header at the start of the U-Boot binary.
98 The format of the header is described in the Linux kernel source at
99 Documentation/arm64/booting.txt. This feature is useful since the
100 image header reports the amount of memory (BSS and similar) that
101 U-Boot needs to use, but which isn't part of the binary.
103 config LNX_KRNL_IMG_TEXT_OFFSET_BASE
104 depends on LINUX_KERNEL_IMAGE_HEADER
107 The value subtracted from CONFIG_TEXT_BASE to calculate the
108 TEXT_OFFSET value written to the Linux kernel image header.
120 ARM GICV3 Interrupt translation service (ITS).
121 Basic support for programming locality specific peripheral
122 interrupts (LPI) configuration tables and enable LPI tables.
123 LPI configuration table can be used by u-boot or Linux.
124 ARM GICV3 has limitation, once the LPI table is enabled, LPI
125 configuration table can not be re-programmed, unless GICV3 reset.
127 config GICV3_SUPPORT_GIC600
128 bool "ARM GICV3 GIC600 SUPPORT"
130 ARM GIC-600 IP complies with ARM GICv3 architecture, but among others,
131 implements a power control register in the Redistributor frame.This
132 register must be programmed to mark the frame as powered on, before
133 accessing other registers in the frame. Rest of initialization sequence
140 config DMA_ADDR_T_64BIT
150 config GPIO_EXTRA_HEADER
153 # Used for compatibility with asm files copied from the kernel
154 config ARM_ASM_UNIFIED
158 # Used for compatibility with asm files copied from the kernel
162 config SYS_ICACHE_OFF
163 bool "Do not enable icache"
165 Do not enable instruction cache in U-Boot.
167 config SPL_SYS_ICACHE_OFF
168 bool "Do not enable icache in SPL"
170 default SYS_ICACHE_OFF
172 Do not enable instruction cache in SPL.
174 config SYS_DCACHE_OFF
175 bool "Do not enable dcache"
177 Do not enable data cache in U-Boot.
179 config SPL_SYS_DCACHE_OFF
180 bool "Do not enable dcache in SPL"
182 default SYS_DCACHE_OFF
184 Do not enable data cache in SPL.
186 config SYS_ARM_CACHE_CP15
187 bool "CP15 based cache enabling support"
189 Select this if your processor suports enabling caches by using
193 bool "MMU-based Paged Memory Management Support"
194 select SYS_ARM_CACHE_CP15
196 Select if you want MMU-based virtualised addressing space
197 support via paged memory management.
200 bool 'Use the ARM v7 PMSA Compliant MPU'
202 Some ARM systems without an MMU have instead a Memory Protection
203 Unit (MPU) that defines the type and permissions for regions of
205 If your CPU has an MPU then you should choose 'y' here unless you
206 know that you do not want to use the MPU.
208 # If set, the workarounds for these ARM errata are applied early during U-Boot
209 # startup. Note that in general these options force the workarounds to be
210 # applied; no CPU-type/version detection exists, unlike the similar options in
211 # the Linux kernel. Do not set these options unless they apply! Also note that
212 # the following can be machine-specific errata. These do have ability to
213 # provide rudimentary version and machine-specific checks, but expect no
215 # CONFIG_ARM_ERRATA_430973
216 # CONFIG_ARM_ERRATA_454179
217 # CONFIG_ARM_ERRATA_621766
218 # CONFIG_ARM_ERRATA_798870
219 # CONFIG_ARM_ERRATA_801819
220 # CONFIG_ARM_CORTEX_A8_CVE_2017_5715
221 # CONFIG_ARM_CORTEX_A15_CVE_2017_5715
223 config ARM_ERRATA_430973
226 config ARM_ERRATA_454179
229 config ARM_ERRATA_621766
232 config ARM_ERRATA_716044
235 config ARM_ERRATA_725233
238 config ARM_ERRATA_742230
241 config ARM_ERRATA_743622
244 config ARM_ERRATA_751472
247 config ARM_ERRATA_761320
250 config ARM_ERRATA_773022
253 config ARM_ERRATA_774769
256 config ARM_ERRATA_794072
259 config ARM_ERRATA_798870
262 config ARM_ERRATA_801819
265 config ARM_ERRATA_826974
268 config ARM_ERRATA_828024
271 config ARM_ERRATA_829520
274 config ARM_ERRATA_833069
277 config ARM_ERRATA_833471
280 config ARM_ERRATA_845369
283 config ARM_ERRATA_852421
286 config ARM_ERRATA_852423
289 config ARM_ERRATA_855873
292 config ARM_CORTEX_A8_CVE_2017_5715
295 config ARM_CORTEX_A15_CVE_2017_5715
300 select SYS_CACHE_SHIFT_5
305 select SYS_CACHE_SHIFT_5
310 select SYS_CACHE_SHIFT_5
312 imply SPL_SEPARATE_BSS
316 select SYS_CACHE_SHIFT_5
321 select SYS_CACHE_SHIFT_5
323 imply SPL_SEPARATE_BSS
328 select SYS_CACHE_SHIFT_5
335 select SYS_CACHE_SHIFT_6
342 select SYS_CACHE_SHIFT_5
343 select SYS_THUMB_BUILD
349 select SYS_ARM_CACHE_CP15
351 select SYS_CACHE_SHIFT_6
354 default "arm720t" if CPU_ARM720T
355 default "arm920t" if CPU_ARM920T
356 default "arm926ejs" if CPU_ARM926EJS
357 default "arm946es" if CPU_ARM946ES
358 default "arm1136" if CPU_ARM1136
359 default "arm1176" if CPU_ARM1176
360 default "armv7" if CPU_V7A
361 default "armv7" if CPU_V7R
362 default "armv7m" if CPU_V7M
363 default "armv8" if ARM64
367 default 4 if CPU_ARM720T
368 default 4 if CPU_ARM920T
369 default 5 if CPU_ARM926EJS
370 default 5 if CPU_ARM946ES
371 default 6 if CPU_ARM1136
372 default 6 if CPU_ARM1176
379 prompt "Select the ARM data write cache policy"
380 default SYS_ARM_CACHE_WRITETHROUGH if TARGET_BCMNS || RZA1
381 default SYS_ARM_CACHE_WRITEBACK
383 config SYS_ARM_CACHE_WRITEBACK
384 bool "Write-back (WB)"
386 A write updates the cache only and marks the cache line as dirty.
387 External memory is updated only when the line is evicted or explicitly
390 config SYS_ARM_CACHE_WRITETHROUGH
391 bool "Write-through (WT)"
393 A write updates both the cache and the external memory system.
394 This does not mark the cache line as dirty.
396 config SYS_ARM_CACHE_WRITEALLOC
397 bool "Write allocation (WA)"
399 A cache line is allocated on a write miss. This means that executing a
400 store instruction on the processor might cause a burst read to occur.
401 There is a linefill to obtain the data for the cache line, before the
405 config ARCH_VERY_EARLY_INIT
408 config SPL_ARCH_VERY_EARLY_INIT
412 bool "Enable ARCH_CPU_INIT"
414 Some architectures require a call to arch_cpu_init().
415 Say Y here to enable it
417 config SYS_ARCH_TIMER
418 bool "ARM Generic Timer support"
419 depends on CPU_V7A || ARM64
422 The ARM Generic Timer (aka arch-timer) provides an architected
423 interface to a timer source on an SoC.
424 It is mandatory for ARMv8 implementation and widely available
428 bool "Support for ARM SMC Calling Convention (SMCCC)"
429 depends on CPU_V7A || ARM64
432 Say Y here if you want to enable ARM SMC Calling Convention.
433 This should be enabled if U-Boot needs to communicate with system
434 firmware (for example, PSCI) according to SMCCC.
436 config SYS_THUMB_BUILD
437 bool "Build U-Boot using the Thumb instruction set"
440 Use this flag to build U-Boot using the Thumb instruction set for
441 ARM architectures. Thumb instruction set provides better code
442 density. For ARM architectures that support Thumb2 this flag will
443 result in Thumb2 code generated by GCC.
445 config SPL_SYS_THUMB_BUILD
446 bool "Build SPL using the Thumb instruction set"
447 default y if SYS_THUMB_BUILD
448 depends on !ARM64 && SPL
450 Use this flag to build SPL using the Thumb instruction set for
451 ARM architectures. Thumb instruction set provides better code
452 density. For ARM architectures that support Thumb2 this flag will
453 result in Thumb2 code generated by GCC.
455 config TPL_SYS_THUMB_BUILD
456 bool "Build TPL using the Thumb instruction set"
457 default y if SYS_THUMB_BUILD
458 depends on TPL && !ARM64
460 Use this flag to build TPL using the Thumb instruction set for
461 ARM architectures. Thumb instruction set provides better code
462 density. For ARM architectures that support Thumb2 this flag will
463 result in Thumb2 code generated by GCC.
466 bool "ARM PL310 L2 cache controller"
468 Enable support for ARM PL310 L2 cache controller in U-Boot
470 config SPL_SYS_L2_PL310
471 bool "ARM PL310 L2 cache controller in SPL"
473 Enable support for ARM PL310 L2 cache controller in SPL
475 config SYS_L2CACHE_OFF
478 If SoC does not support L2CACHE or one does not want to enable
479 L2CACHE, choose this option.
481 config ENABLE_ARM_SOC_BOOT0_HOOK
482 bool "prepare BOOT0 header"
484 If the SoC's BOOT0 requires a header area filled with (magic)
485 values, then choose this option, and create a file included as
486 <asm/arch/boot0.h> which contains the required assembler code.
488 config USE_ARCH_MEMCPY
489 bool "Use an assembly optimized implementation of memcpy"
491 depends on !ARM64 || (ARM64 && (GCC_VERSION >= 90400))
493 Enable the generation of an optimized version of memcpy.
494 Such an implementation may be faster under some conditions
495 but may increase the binary size.
497 config SPL_USE_ARCH_MEMCPY
498 bool "Use an assembly optimized implementation of memcpy for SPL"
499 default y if USE_ARCH_MEMCPY
502 Enable the generation of an optimized version of memcpy.
503 Such an implementation may be faster under some conditions
504 but may increase the binary size.
506 config TPL_USE_ARCH_MEMCPY
507 bool "Use an assembly optimized implementation of memcpy for TPL"
508 default y if USE_ARCH_MEMCPY
511 Enable the generation of an optimized version of memcpy.
512 Such an implementation may be faster under some conditions
513 but may increase the binary size.
515 config USE_ARCH_MEMMOVE
516 bool "Use an assembly optimized implementation of memmove" if !ARM64
517 default USE_ARCH_MEMCPY if ARM64
520 Enable the generation of an optimized version of memmove.
521 Such an implementation may be faster under some conditions
522 but may increase the binary size.
524 config SPL_USE_ARCH_MEMMOVE
525 bool "Use an assembly optimized implementation of memmove for SPL" if !ARM64
526 default SPL_USE_ARCH_MEMCPY if ARM64
527 depends on SPL && ARM64
529 Enable the generation of an optimized version of memmove.
530 Such an implementation may be faster under some conditions
531 but may increase the binary size.
533 config TPL_USE_ARCH_MEMMOVE
534 bool "Use an assembly optimized implementation of memmove for TPL" if !ARM64
535 default TPL_USE_ARCH_MEMCPY if ARM64
536 depends on TPL && ARM64
538 Enable the generation of an optimized version of memmove.
539 Such an implementation may be faster under some conditions
540 but may increase the binary size.
542 config USE_ARCH_MEMSET
543 bool "Use an assembly optimized implementation of memset"
545 depends on !ARM64 || (ARM64 && (GCC_VERSION >= 90400))
547 Enable the generation of an optimized version of memset.
548 Such an implementation may be faster under some conditions
549 but may increase the binary size.
551 config SPL_USE_ARCH_MEMSET
552 bool "Use an assembly optimized implementation of memset for SPL"
553 default y if USE_ARCH_MEMSET
556 Enable the generation of an optimized version of memset.
557 Such an implementation may be faster under some conditions
558 but may increase the binary size.
560 config TPL_USE_ARCH_MEMSET
561 bool "Use an assembly optimized implementation of memset for TPL"
562 default y if USE_ARCH_MEMSET
565 Enable the generation of an optimized version of memset.
566 Such an implementation may be faster under some conditions
567 but may increase the binary size.
569 config ARM64_SUPPORT_AARCH32
570 bool "ARM64 system support AArch32 execution state"
572 default y if !TARGET_THUNDERX_88XX
574 This ARM64 system supports AArch32 execution state.
580 def_bool y if ARCH_EXYNOS || ARCH_S5PC1XX
583 prompt "Target select"
588 select GPIO_EXTRA_HEADER
589 select SPL_BOARD_INIT if SPL && !TARGET_SMARTWEB
590 select SPL_SEPARATE_BSS if SPL
591 imply SYS_THUMB_BUILD
596 select GPIO_EXTRA_HEADER
597 select SPL_DM_SPI if SPL
600 Support for TI's DaVinci platform.
603 bool "Hisilicon HiSTB SoCs"
610 Support for HiSTB SoCs.
613 bool "Marvell Kirkwood"
614 select ARCH_MISC_INIT
615 select BOARD_EARLY_INIT_F
617 select GPIO_EXTRA_HEADER
621 bool "Marvell MVEBU family (Armada XP/375/38x/3700/7K/8K)"
622 select ARCH_EARLY_INIT_R if ARM64
627 select GPIO_EXTRA_HEADER
629 select SPL_DM_SPI if SPL
630 select SPL_DM_SPI_FLASH if SPL
631 select SPL_TIMER if SPL
632 select TIMER if !ARM64
641 select GPIO_EXTRA_HEADER
642 select SPL_SEPARATE_BSS if SPL
646 bool "Broadcom BCM283X family"
650 select GPIO_EXTRA_HEADER
653 select SERIAL_SEARCH_ALL
656 imply OF_HAS_PRIOR_STAGE
659 bool "Broadcom BCM7XXX family"
662 select GPIO_EXTRA_HEADER
665 imply OF_HAS_PRIOR_STAGE
667 This enables support for Broadcom ARM-based set-top box
668 chipsets, including the 7445 family of chips.
671 bool "Broadcom broadband chip family"
676 config TARGET_VEXPRESS_CA9X4
677 bool "Support vexpress_ca9x4"
682 bool "Support Broadcom Northstar"
690 select ARM_GLOBAL_TIMER
691 imply SYS_THUMB_BUILD
694 imply NAND_BRCMNAND_IPROC
696 Support for Broadcom Northstar SoCs. NS is a dual-core 32-bit
697 ARMv7 Cortex-A9 SoC family including BCM4708, BCM47094,
701 bool "Support Broadcom NS3"
703 select BOARD_LATE_INIT
705 Support for Broadcom Northstar 3 SoCs. NS3 is a octo-core 64-bit
706 ARMv8 Cortex-A72 processors targeting a broad range of networking
710 bool "Samsung EXYNOS"
720 select GPIO_EXTRA_HEADER
721 imply SYS_THUMB_BUILD
726 bool "Samsung S5PC1XX"
732 select GPIO_EXTRA_HEADER
736 bool "Calxeda Highbank"
748 imply OF_HAS_PRIOR_STAGE
750 config ARCH_INTEGRATOR
751 bool "ARM Ltd. Integrator family"
754 select GPIO_EXTRA_HEADER
759 bool "Qualcomm IPQ40xx SoCs"
765 select GPIO_EXTRA_HEADER
769 select CLK_QCOM_IPQ4019
770 select PINCTRL_QCOM_IPQ4019
779 select SPL_BOARD_INIT if SPL
781 select SYS_ARCH_TIMER
782 select SYS_THUMB_BUILD
789 imply TI_KEYSTONE_SERDES
792 bool "Texas Instruments' K3 Architecture"
797 select FIT_SIGNATURE if ARM64
798 imply TI_SECURE_DEVICE
800 config ARCH_OMAP2PLUS
803 select GPIO_EXTRA_HEADER
804 select SPL_BOARD_INIT if SPL
805 select SPL_STACK_R if SPL
807 imply TI_SYSC if DM && OF_CONTROL
809 imply SPL_SEPARATE_BSS
813 select GPIO_EXTRA_HEADER
814 imply DISTRO_DEFAULTS
817 Support for the Meson SoC family developed by Amlogic Inc.,
818 targeted at media players and tablet computers. We currently
819 support the S905 (GXBaby) 64-bit SoC.
824 select GPIO_EXTRA_HEADER
827 select SPL_LIBCOMMON_SUPPORT if SPL
828 select SPL_LIBGENERIC_SUPPORT if SPL
829 select SPL_OF_CONTROL if SPL
832 Support for the MediaTek SoCs family developed by MediaTek Inc.
833 Please refer to doc/README.mediatek for more information.
836 bool "NXP LPC32xx platform"
841 select GPIO_EXTRA_HEADER
847 bool "NXP i.MX8 platform"
849 select SYS_FSL_HAS_SEC
850 select SYS_FSL_SEC_COMPAT_4
851 select SYS_FSL_SEC_LE
854 select GPIO_EXTRA_HEADER
857 select ENABLE_ARM_SOC_BOOT0_HOOK
860 bool "NXP i.MX8M platform"
862 select GPIO_EXTRA_HEADER
864 select SYS_FSL_HAS_SEC
865 select SYS_FSL_SEC_COMPAT_4
866 select SYS_FSL_SEC_LE
869 select DM_EVENT if CLK
874 bool "NXP i.MX8ULP platform"
881 select GPIO_EXTRA_HEADER
887 bool "NXP i.MX9 platform"
893 select GPIO_EXTRA_HEADER
899 bool "NXP i.MXRT platform"
903 select GPIO_EXTRA_HEADER
909 bool "NXP i.MX23 family"
911 select GPIO_EXTRA_HEADER
916 bool "NXP i.MX28 family"
918 select GPIO_EXTRA_HEADER
923 bool "NXP i.MX31 family"
925 select GPIO_EXTRA_HEADER
930 select BOARD_POSTCLK_INIT
932 select GPIO_EXTRA_HEADER
934 select SYS_FSL_HAS_SEC
935 select SYS_FSL_SEC_COMPAT_4
936 select SYS_FSL_SEC_LE
937 select ROM_UNIFIED_SECTIONS
939 imply SYS_THUMB_BUILD
943 select ARCH_MISC_INIT
945 select GPIO_EXTRA_HEADER
948 select SYS_FSL_HAS_SEC
949 select SYS_FSL_SEC_COMPAT_4
950 select SYS_FSL_SEC_LE
951 imply BOARD_EARLY_INIT_F
953 imply SYS_THUMB_BUILD
957 select BOARD_POSTCLK_INIT
959 select GPIO_EXTRA_HEADER
962 select SYS_FSL_HAS_SEC
963 select SYS_FSL_SEC_COMPAT_4
964 select SYS_FSL_SEC_LE
965 select SYS_L2_PL310 if !SYS_L2CACHE_OFF
967 imply SYS_THUMB_BUILD
968 imply SPL_SEPARATE_BSS
972 select BOARD_EARLY_INIT_F
974 select GPIO_EXTRA_HEADER
979 bool "Nexell S5P4418/S5P6818 SoC"
980 select ENABLE_ARM_SOC_BOOT0_HOOK
982 select GPIO_EXTRA_HEADER
985 bool "Support Nuvoton SoCs"
1006 select LINUX_KERNEL_IMAGE_HEADER
1008 select OF_BOARD_SETUP
1013 select POSITION_INDEPENDENT
1019 select SYSRESET_WATCHDOG
1020 select SYSRESET_WATCHDOG_AUTO
1025 imply OF_HAS_PRIOR_STAGE
1028 bool "Actions Semi OWL SoCs"
1031 select GPIO_EXTRA_HEADER
1036 select SYS_RELOC_GD_ENV_ADDR
1040 bool "QEMU Virtual Platform"
1049 imply OF_HAS_PRIOR_STAGE
1052 imply SYS_WHITE_ON_BLACK
1053 imply SYS_CONSOLE_IS_IN_ENV
1054 imply PRE_CONSOLE_BUFFER
1062 bool "Renesas ARM SoCs"
1065 select GPIO_EXTRA_HEADER
1067 imply BOARD_EARLY_INIT_F
1071 imply SYS_THUMB_BUILD
1072 imply ARCH_MISC_INIT if DISPLAY_CPUINFO
1074 config ARCH_SNAPDRAGON
1075 bool "Qualcomm Snapdragon SoCs"
1082 select GPIO_EXTRA_HEADER
1088 select BOARD_LATE_INIT
1090 select SAVE_PREV_BL_FDT_ADDR
1091 select LINUX_KERNEL_IMAGE_HEADER if !ENABLE_ARM_SOC_BOOT0_HOOK
1096 bool "Altera SOCFPGA family"
1097 select ARCH_EARLY_INIT_R
1098 select ARCH_MISC_INIT if !TARGET_SOCFPGA_ARRIA10
1099 select ARM64 if TARGET_SOCFPGA_SOC64
1100 select CPU_V7A if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
1104 select GPIO_EXTRA_HEADER
1105 select ENABLE_ARM_SOC_BOOT0_HOOK if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
1107 select SPL_DM_RESET if DM_RESET
1108 select SPL_DM_SERIAL
1109 select SPL_LIBCOMMON_SUPPORT
1110 select SPL_LIBGENERIC_SUPPORT
1111 select SPL_OF_CONTROL
1112 select SPL_SEPARATE_BSS if TARGET_SOCFPGA_SOC64
1113 select SPL_DRIVERS_MISC if TARGET_SOCFPGA_SOC64
1114 select SPL_SOCFPGA_DT_REG if TARGET_SOCFPGA_SOC64
1120 select SYS_THUMB_BUILD if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
1122 select SYSRESET_SOCFPGA if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
1123 select SYSRESET_SOCFPGA_SOC64 if !TARGET_SOCFPGA_AGILEX5 && \
1124 TARGET_SOCFPGA_SOC64
1135 imply SPL_DM_SPI_FLASH
1136 imply SPL_LIBDISK_SUPPORT
1138 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
1139 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE
1140 imply SPL_SPI_FLASH_SUPPORT
1145 bool "Support sunxi (Allwinner) SoCs"
1148 select CMD_MMC if MMC
1149 select CMD_USB if DISTRO_DEFAULTS && USB_HOST
1153 select DM_I2C if I2C
1154 select DM_SPI if SPI
1155 select DM_SPI_FLASH if SPI && MTD
1157 select DM_MMC if MMC
1159 select OF_BOARD_SETUP
1163 select SPECIFY_CONSOLE_INDEX
1164 select SPL_SEPARATE_BSS if SPL
1165 select SPL_STACK_R if SPL
1166 select SPL_SYS_MALLOC_SIMPLE if SPL
1167 select SPL_SYS_THUMB_BUILD if SPL && !ARM64
1170 select SYS_THUMB_BUILD if !ARM64
1171 select USB if DISTRO_DEFAULTS
1172 select USB_KEYBOARD if DISTRO_DEFAULTS && USB_HOST
1173 select USB_STORAGE if DISTRO_DEFAULTS && USB_HOST
1174 select SPL_USE_TINY_PRINTF if SPL
1176 select SYS_RELOC_GD_ENV_ADDR
1177 imply BOARD_LATE_INIT
1180 imply CMD_UBI if MTD_RAW_NAND
1181 imply DISTRO_DEFAULTS
1183 imply DM_REGULATOR_FIXED
1186 imply OF_LIBFDT_OVERLAY
1187 imply PRE_CONSOLE_BUFFER
1189 imply SPL_LIBCOMMON_SUPPORT
1190 imply SPL_LIBGENERIC_SUPPORT
1191 imply SPL_MMC if MMC
1195 imply SYSRESET_WATCHDOG
1196 imply SYSRESET_WATCHDOG_AUTO
1201 bool "ST-Ericsson U8500 Series"
1205 select DM_MMC if MMC
1207 select DM_USB_GADGET if DM_USB
1211 imply AB8500_USB_PHY
1212 imply ARM_PL180_MMCI
1217 imply NOMADIK_MTU_TIMER
1222 imply SYS_THUMB_BUILD
1223 imply SYSRESET_SYSCON
1226 bool "Support Xilinx Versal Platform"
1230 select DM_MMC if MMC
1235 imply BOARD_LATE_INIT
1236 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1238 config ARCH_VERSAL_NET
1239 bool "Support Xilinx Versal NET Platform"
1243 select DM_MMC if MMC
1246 imply BOARD_LATE_INIT
1247 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1250 bool "Freescale Vybrid"
1252 select GPIO_EXTRA_HEADER
1253 select IOMUX_SHARE_CONF_REG
1255 select SYS_FSL_ERRATUM_ESDHC111
1260 bool "Xilinx Zynq based platform"
1261 select ARM_TWD_TIMER
1262 select ARCH_EARLY_INIT_R if FPGA || (SPL && SPL_FPGA)
1266 select DEBUG_UART_BOARD_INIT if SPL && DEBUG_UART
1268 select DM_MMC if MMC
1275 select SPL_BOARD_INIT if SPL
1276 select SPL_CLK if SPL
1277 select SPL_DM if SPL
1278 select SPL_DM_SPI if SPL
1279 select SPL_DM_SPI_FLASH if SPL
1280 select SPL_OF_CONTROL if SPL
1281 select SPL_SEPARATE_BSS if SPL
1282 select SPL_TIMER if SPL
1285 imply BOARD_LATE_INIT
1289 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1292 config ARCH_ZYNQMP_R5
1293 bool "Xilinx ZynqMP R5 based platform"
1297 select DM_MMC if MMC
1304 bool "Xilinx ZynqMP based platform"
1308 select DEBUG_UART_BOARD_INIT if SPL && DEBUG_UART
1310 select DM_MMC if MMC
1313 select DM_SPI if SPI
1314 select DM_SPI_FLASH if DM_SPI
1318 select SPL_BOARD_INIT if SPL
1319 select SPL_CLK if SPL
1320 select SPL_DM if SPL
1321 select SPL_DM_SPI if SPI && SPL_DM
1322 select SPL_DM_SPI_FLASH if SPL_DM_SPI
1323 select SPL_DM_MAILBOX if SPL
1324 imply SPL_FIRMWARE if SPL
1325 imply SPL_FS_FAT if SPL
1326 imply SPL_LIBCOMMON_SUPPORT if SPL
1327 imply SPL_LIBDISK_SUPPORT if SPL
1328 imply SPL_LIBGENERIC_SUPPORT if SPL
1329 imply SPL_MMC if SPL && MMC_SDHCI_ZYNQ
1330 imply SPL_SERIAL if SPL
1331 imply SPL_SPI if SPL && ZYNQ_QSPI
1332 imply SPL_SPI_FLASH_SUPPORT if SPL && ZYNQ_QSPI
1333 select SPL_SEPARATE_BSS if SPL
1335 imply ZYNQMP_IPI if DM_MAILBOX
1337 imply BOARD_LATE_INIT
1339 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1343 imply ZYNQMP_GPIO_MODEPIN if DM_GPIO && USB
1347 select GPIO_EXTRA_HEADER
1348 imply BOOTSTD_DEFAULTS
1350 imply SPL_TIMER if SPL
1352 config ARCH_VEXPRESS64
1353 bool "Support ARMv8 Arm Ltd. VExpress based boards and models"
1361 select MTD_NOR_FLASH if MTD
1362 select FLASH_CFI_DRIVER if MTD
1363 select ENV_IS_IN_FLASH if MTD
1364 imply DISTRO_DEFAULTS
1366 config TARGET_CORSTONE1000
1367 bool "Support Corstone1000 Platform"
1372 config TARGET_TOTAL_COMPUTE
1373 bool "Support Total Compute Platform"
1381 config TARGET_LS2080A_EMU
1382 bool "Support ls2080a_emu"
1385 select ARMV8_MULTIENTRY
1386 select FSL_DDR_SYNC_REFRESH
1387 select GPIO_EXTRA_HEADER
1389 Support for Freescale LS2080A_EMU platform.
1390 The LS2080A Development System (EMULATOR) is a pre-silicon
1391 development platform that supports the QorIQ LS2080A
1392 Layerscape Architecture processor.
1394 config TARGET_LS1088AQDS
1395 bool "Support ls1088aqds"
1398 select ARMV8_MULTIENTRY
1399 select ARCH_SUPPORT_TFABOOT
1400 select BOARD_LATE_INIT
1401 select GPIO_EXTRA_HEADER
1403 select FSL_DDR_INTERACTIVE if !SD_BOOT
1405 Support for NXP LS1088AQDS platform.
1406 The LS1088A Development System (QDS) is a high-performance
1407 development platform that supports the QorIQ LS1088A
1408 Layerscape Architecture processor.
1410 config TARGET_LS2080AQDS
1411 bool "Support ls2080aqds"
1414 select ARMV8_MULTIENTRY
1415 select ARCH_SUPPORT_TFABOOT
1416 select BOARD_LATE_INIT
1417 select GPIO_EXTRA_HEADER
1422 select FSL_DDR_INTERACTIVE if !SPL
1424 Support for Freescale LS2080AQDS platform.
1425 The LS2080A Development System (QDS) is a high-performance
1426 development platform that supports the QorIQ LS2080A
1427 Layerscape Architecture processor.
1429 config TARGET_LS2080ARDB
1430 bool "Support ls2080ardb"
1433 select ARMV8_MULTIENTRY
1434 select ARCH_SUPPORT_TFABOOT
1435 select BOARD_LATE_INIT
1438 select FSL_DDR_INTERACTIVE if !SPL
1439 select GPIO_EXTRA_HEADER
1443 Support for Freescale LS2080ARDB platform.
1444 The LS2080A Reference design board (RDB) is a high-performance
1445 development platform that supports the QorIQ LS2080A
1446 Layerscape Architecture processor.
1448 config TARGET_LS2081ARDB
1449 bool "Support ls2081ardb"
1452 select ARMV8_MULTIENTRY
1453 select BOARD_LATE_INIT
1454 select GPIO_EXTRA_HEADER
1457 Support for Freescale LS2081ARDB platform.
1458 The LS2081A Reference design board (RDB) is a high-performance
1459 development platform that supports the QorIQ LS2081A/LS2041A
1460 Layerscape Architecture processor.
1462 config TARGET_LX2160ARDB
1463 bool "Support lx2160ardb"
1466 select ARMV8_MULTIENTRY
1467 select ARCH_SUPPORT_TFABOOT
1468 select BOARD_LATE_INIT
1469 select GPIO_EXTRA_HEADER
1471 Support for NXP LX2160ARDB platform.
1472 The lx2160ardb (LX2160A Reference design board (RDB)
1473 is a high-performance development platform that supports the
1474 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1476 config TARGET_LX2160AQDS
1477 bool "Support lx2160aqds"
1480 select ARMV8_MULTIENTRY
1481 select ARCH_SUPPORT_TFABOOT
1482 select BOARD_LATE_INIT
1483 select GPIO_EXTRA_HEADER
1485 Support for NXP LX2160AQDS platform.
1486 The lx2160aqds (LX2160A QorIQ Development System (QDS)
1487 is a high-performance development platform that supports the
1488 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1490 config TARGET_LX2162AQDS
1491 bool "Support lx2162aqds"
1493 select ARCH_MISC_INIT
1495 select ARMV8_MULTIENTRY
1496 select ARCH_SUPPORT_TFABOOT
1497 select BOARD_LATE_INIT
1498 select GPIO_EXTRA_HEADER
1500 Support for NXP LX2162AQDS platform.
1501 The lx2162aqds support is based on LX2160A Layerscape Architecture processor.
1504 bool "Support HiKey 96boards Consumer Edition Platform"
1509 select GPIO_EXTRA_HEADER
1512 select SPECIFY_CONSOLE_INDEX
1515 Support for HiKey 96boards platform. It features a HI6220
1516 SoC, with 8xA53 CPU, mali450 gpu, and 1GB RAM.
1518 config TARGET_HIKEY960
1519 bool "Support HiKey960 96boards Consumer Edition Platform"
1523 select GPIO_EXTRA_HEADER
1528 Support for HiKey960 96boards platform. It features a HI3660
1529 SoC, with 4xA73 CPU, 4xA53 CPU, MALI-G71 GPU, and 3GB RAM.
1531 config TARGET_POPLAR
1532 bool "Support Poplar 96boards Enterprise Edition Platform"
1536 select GPIO_EXTRA_HEADER
1541 Support for Poplar 96boards EE platform. It features a HI3798cv200
1542 SoC, with 4xA53 CPU, 1GB RAM and the high performance Mali T720 GPU
1543 making it capable of running any commercial set-top solution based on
1546 config TARGET_LS1012AQDS
1547 bool "Support ls1012aqds"
1550 select ARCH_SUPPORT_TFABOOT
1551 select BOARD_LATE_INIT
1552 select GPIO_EXTRA_HEADER
1554 Support for Freescale LS1012AQDS platform.
1555 The LS1012A Development System (QDS) is a high-performance
1556 development platform that supports the QorIQ LS1012A
1557 Layerscape Architecture processor.
1559 config TARGET_LS1012ARDB
1560 bool "Support ls1012ardb"
1563 select ARCH_SUPPORT_TFABOOT
1564 select BOARD_LATE_INIT
1565 select GPIO_EXTRA_HEADER
1569 Support for Freescale LS1012ARDB platform.
1570 The LS1012A Reference design board (RDB) is a high-performance
1571 development platform that supports the QorIQ LS1012A
1572 Layerscape Architecture processor.
1574 config TARGET_LS1012A2G5RDB
1575 bool "Support ls1012a2g5rdb"
1578 select ARCH_SUPPORT_TFABOOT
1579 select BOARD_LATE_INIT
1580 select GPIO_EXTRA_HEADER
1583 Support for Freescale LS1012A2G5RDB platform.
1584 The LS1012A 2G5 Reference design board (RDB) is a high-performance
1585 development platform that supports the QorIQ LS1012A
1586 Layerscape Architecture processor.
1588 config TARGET_LS1012AFRWY
1589 bool "Support ls1012afrwy"
1592 select ARCH_SUPPORT_TFABOOT
1593 select BOARD_LATE_INIT
1594 select GPIO_EXTRA_HEADER
1598 Support for Freescale LS1012AFRWY platform.
1599 The LS1012A FRWY board (FRWY) is a high-performance
1600 development platform that supports the QorIQ LS1012A
1601 Layerscape Architecture processor.
1603 config TARGET_LS1012AFRDM
1604 bool "Support ls1012afrdm"
1607 select ARCH_SUPPORT_TFABOOT
1608 select GPIO_EXTRA_HEADER
1610 Support for Freescale LS1012AFRDM platform.
1611 The LS1012A Freedom board (FRDM) is a high-performance
1612 development platform that supports the QorIQ LS1012A
1613 Layerscape Architecture processor.
1615 config TARGET_LS1028AQDS
1616 bool "Support ls1028aqds"
1619 select ARMV8_MULTIENTRY
1620 select ARCH_SUPPORT_TFABOOT
1621 select BOARD_LATE_INIT
1622 select GPIO_EXTRA_HEADER
1624 Support for Freescale LS1028AQDS platform
1625 The LS1028A Development System (QDS) is a high-performance
1626 development platform that supports the QorIQ LS1028A
1627 Layerscape Architecture processor.
1629 config TARGET_LS1028ARDB
1630 bool "Support ls1028ardb"
1633 select ARMV8_MULTIENTRY
1634 select ARCH_SUPPORT_TFABOOT
1635 select BOARD_LATE_INIT
1636 select GPIO_EXTRA_HEADER
1638 Support for Freescale LS1028ARDB platform
1639 The LS1028A Development System (RDB) is a high-performance
1640 development platform that supports the QorIQ LS1028A
1641 Layerscape Architecture processor.
1643 config TARGET_LS1088ARDB
1644 bool "Support ls1088ardb"
1647 select ARMV8_MULTIENTRY
1648 select ARCH_SUPPORT_TFABOOT
1649 select BOARD_LATE_INIT
1651 select FSL_DDR_INTERACTIVE if !SD_BOOT
1652 select GPIO_EXTRA_HEADER
1654 Support for NXP LS1088ARDB platform.
1655 The LS1088A Reference design board (RDB) is a high-performance
1656 development platform that supports the QorIQ LS1088A
1657 Layerscape Architecture processor.
1659 config TARGET_LS1021AQDS
1660 bool "Support ls1021aqds"
1662 select ARCH_SUPPORT_PSCI
1663 select BOARD_EARLY_INIT_F
1664 select BOARD_LATE_INIT
1666 select CPU_V7_HAS_NONSEC
1667 select CPU_V7_HAS_VIRT
1668 select LS1_DEEP_SLEEP
1669 select PEN_ADDR_BIG_ENDIAN
1672 select FSL_DDR_INTERACTIVE
1673 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1674 select GPIO_EXTRA_HEADER
1675 select SPI_FLASH_DATAFLASH if FSL_DSPI || FSL_QSPI
1678 config TARGET_LS1021ATWR
1679 bool "Support ls1021atwr"
1681 select ARCH_SUPPORT_PSCI
1682 select BOARD_EARLY_INIT_F
1683 select BOARD_LATE_INIT
1685 select CPU_V7_HAS_NONSEC
1686 select CPU_V7_HAS_VIRT
1687 select LS1_DEEP_SLEEP
1688 select PEN_ADDR_BIG_ENDIAN
1690 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1691 select GPIO_EXTRA_HEADER
1694 config TARGET_PG_WCOM_SELI8
1695 bool "Support Hitachi-Powergrids SELI8 service unit card"
1697 select ARCH_SUPPORT_PSCI
1698 select BOARD_EARLY_INIT_F
1699 select BOARD_LATE_INIT
1701 select CPU_V7_HAS_NONSEC
1702 select CPU_V7_HAS_VIRT
1704 select FSL_DDR_INTERACTIVE
1705 select GPIO_EXTRA_HEADER
1709 Support for Hitachi-Powergrids SELI8 service unit card.
1710 SELI8 is a QorIQ LS1021a based service unit card used
1711 in XMC20 and FOX615 product families.
1713 config TARGET_PG_WCOM_EXPU1
1714 bool "Support Hitachi-Powergrids EXPU1 service unit card"
1716 select ARCH_SUPPORT_PSCI
1717 select BOARD_EARLY_INIT_F
1718 select BOARD_LATE_INIT
1720 select CPU_V7_HAS_NONSEC
1721 select CPU_V7_HAS_VIRT
1723 select FSL_DDR_INTERACTIVE
1727 Support for Hitachi-Powergrids EXPU1 service unit card.
1728 EXPU1 is a QorIQ LS1021a based service unit card used
1729 in XMC20 and FOX615 product families.
1731 config TARGET_LS1021ATSN
1732 bool "Support ls1021atsn"
1734 select ARCH_SUPPORT_PSCI
1735 select BOARD_EARLY_INIT_F
1736 select BOARD_LATE_INIT
1738 select CPU_V7_HAS_NONSEC
1739 select CPU_V7_HAS_VIRT
1740 select LS1_DEEP_SLEEP
1742 select GPIO_EXTRA_HEADER
1745 config TARGET_LS1021AIOT
1746 bool "Support ls1021aiot"
1748 select ARCH_SUPPORT_PSCI
1749 select BOARD_LATE_INIT
1751 select CPU_V7_HAS_NONSEC
1752 select CPU_V7_HAS_VIRT
1753 select PEN_ADDR_BIG_ENDIAN
1755 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1756 select GPIO_EXTRA_HEADER
1759 Support for Freescale LS1021AIOT platform.
1760 The LS1021A Freescale board (IOT) is a high-performance
1761 development platform that supports the QorIQ LS1021A
1762 Layerscape Architecture processor.
1764 config TARGET_LS1043AQDS
1765 bool "Support ls1043aqds"
1768 select ARMV8_MULTIENTRY
1769 select ARCH_SUPPORT_TFABOOT
1770 select BOARD_EARLY_INIT_F
1771 select BOARD_LATE_INIT
1773 select FSL_DDR_INTERACTIVE if !SPL
1774 select FSL_DSPI if !SPL_NO_DSPI
1775 select DM_SPI_FLASH if FSL_DSPI
1776 select GPIO_EXTRA_HEADER
1780 Support for Freescale LS1043AQDS platform.
1782 config TARGET_LS1043ARDB
1783 bool "Support ls1043ardb"
1786 select ARMV8_MULTIENTRY
1787 select ARCH_SUPPORT_TFABOOT
1788 select BOARD_EARLY_INIT_F
1789 select BOARD_LATE_INIT
1791 select FSL_DSPI if !SPL_NO_DSPI
1792 select DM_SPI_FLASH if FSL_DSPI
1793 select GPIO_EXTRA_HEADER
1795 Support for Freescale LS1043ARDB platform.
1797 config TARGET_LS1046AQDS
1798 bool "Support ls1046aqds"
1801 select ARMV8_MULTIENTRY
1802 select ARCH_SUPPORT_TFABOOT
1803 select BOARD_EARLY_INIT_F
1804 select BOARD_LATE_INIT
1805 select DM_SPI_FLASH if DM_SPI
1807 select FSL_DDR_BIST if !SPL
1808 select FSL_DDR_INTERACTIVE if !SPL
1809 select FSL_DDR_INTERACTIVE if !SPL
1810 select GPIO_EXTRA_HEADER
1813 Support for Freescale LS1046AQDS platform.
1814 The LS1046A Development System (QDS) is a high-performance
1815 development platform that supports the QorIQ LS1046A
1816 Layerscape Architecture processor.
1818 config TARGET_LS1046ARDB
1819 bool "Support ls1046ardb"
1822 select ARMV8_MULTIENTRY
1823 select ARCH_SUPPORT_TFABOOT
1824 select BOARD_EARLY_INIT_F
1825 select BOARD_LATE_INIT
1826 select DM_SPI_FLASH if DM_SPI
1827 select POWER_MC34VR500
1830 select FSL_DDR_INTERACTIVE if !SPL
1831 select GPIO_EXTRA_HEADER
1834 Support for Freescale LS1046ARDB platform.
1835 The LS1046A Reference Design Board (RDB) is a high-performance
1836 development platform that supports the QorIQ LS1046A
1837 Layerscape Architecture processor.
1839 config TARGET_LS1046AFRWY
1840 bool "Support ls1046afrwy"
1843 select ARMV8_MULTIENTRY
1844 select ARCH_SUPPORT_TFABOOT
1845 select BOARD_EARLY_INIT_F
1846 select BOARD_LATE_INIT
1847 select DM_SPI_FLASH if DM_SPI
1848 select GPIO_EXTRA_HEADER
1851 Support for Freescale LS1046AFRWY platform.
1852 The LS1046A Freeway Board (FRWY) is a high-performance
1853 development platform that supports the QorIQ LS1046A
1854 Layerscape Architecture processor.
1857 bool "Analog Devices SC5XX-processor family"
1863 select ARMV8_MULTIENTRY
1879 select GPIO_EXTRA_HEADER
1880 select SPL_DM if SPL
1881 select SPL_DM_SPI if SPL
1882 select SPL_DM_SPI_FLASH if SPL
1883 select SPL_DM_I2C if SPL
1884 select SPL_DM_MMC if SPL
1885 select SPL_DM_SERIAL if SPL
1887 Support for Kontron SMARC-sAL28 board.
1890 bool "Support ten64"
1892 select ARCH_MISC_INIT
1894 select ARMV8_MULTIENTRY
1895 select ARCH_SUPPORT_TFABOOT
1896 select BOARD_LATE_INIT
1898 select FSL_DDR_INTERACTIVE if !SD_BOOT
1899 select GPIO_EXTRA_HEADER
1901 Support for Traverse Technologies Ten64 board, based
1904 config ARCH_UNIPHIER
1905 bool "Socionext UniPhier SoCs"
1906 select BOARD_LATE_INIT
1914 select OF_BOARD_SETUP
1918 select SPL_BOARD_INIT if SPL
1919 select SPL_DM if SPL
1920 select SPL_LIBCOMMON_SUPPORT if SPL
1921 select SPL_LIBGENERIC_SUPPORT if SPL
1922 select SPL_OF_CONTROL if SPL
1923 select SPL_PINCTRL if SPL
1926 imply DISTRO_DEFAULTS
1929 Support for UniPhier SoC family developed by Socionext Inc.
1930 (formerly, System LSI Business Division of Panasonic Corporation)
1932 config ARCH_SYNQUACER
1933 bool "Socionext SynQuacer SoCs"
1939 select SYSRESET_PSCI
1942 Support for SynQuacer SoC family developed by Socionext Inc.
1943 This SoC is used on 96boards EE DeveloperBox.
1946 bool "Support STMicroelectronics STM32 MCU with cortex M"
1953 bool "Support STMicroelectronics SoCs"
1962 Support for STMicroelectronics STiH407/10 SoC family.
1963 This SoC is used on Linaro 96Board STiH410-B2260
1966 bool "Support STMicroelectronics STM32MP Socs with cortex A"
1967 select ARCH_MISC_INIT
1968 select ARCH_SUPPORT_TFABOOT
1969 select BOARD_LATE_INIT
1978 select OF_SYSTEM_SETUP
1983 select SYS_THUMB_BUILD if !ARM64
1987 imply OF_LIBFDT_OVERLAY
1988 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1992 Support for STM32MP SoC family developed by STMicroelectronics,
1993 MPUs based on ARM cortex A core
1994 U-BOOT is running in DDR, loaded by the First Stage BootLoader (FSBL).
1995 FSBL can be TF-A: Trusted Firmware for Cortex A, for trusted boot
1997 SPL is the unsecure FSBL for the basic boot chain.
1999 config ARCH_ROCKCHIP
2000 bool "Support Rockchip SoCs"
2002 select BINMAN if SPL_OPTEE || SPL
2012 select DM_USB_GADGET if USB_DWC3_GADGET
2013 select ENABLE_ARM_SOC_BOOT0_HOOK
2017 select SPL_DM if SPL
2018 select SPL_DM_SPI if SPL
2019 select SPL_DM_SPI_FLASH if SPL
2021 select SYS_THUMB_BUILD if !ARM64
2024 imply DEBUG_UART_BOARD_INIT
2025 imply BOOTSTD_DEFAULTS
2027 imply SARADC_ROCKCHIP
2029 imply SPL_SYS_MALLOC_SIMPLE
2032 imply USB_FUNCTION_FASTBOOT
2034 config ARCH_OCTEONTX
2035 bool "Support OcteonTX SoCs"
2038 select GPIO_EXTRA_HEADER
2042 select BOARD_LATE_INIT
2043 select SYS_CACHE_SHIFT_7
2044 select SYS_PCI_64BIT if PCI
2045 imply OF_HAS_PRIOR_STAGE
2047 config ARCH_OCTEONTX2
2048 bool "Support OcteonTX2 SoCs"
2051 select GPIO_EXTRA_HEADER
2055 select BOARD_LATE_INIT
2056 select SYS_CACHE_SHIFT_7
2057 select SYS_PCI_64BIT if PCI
2058 imply OF_HAS_PRIOR_STAGE
2060 config TARGET_THUNDERX_88XX
2061 bool "Support ThunderX 88xx"
2063 select GPIO_EXTRA_HEADER
2066 select SYS_CACHE_SHIFT_7
2069 bool "Support Aspeed SoCs"
2074 config TARGET_DURIAN
2075 bool "Support Phytium Durian Platform"
2077 select GPIO_EXTRA_HEADER
2079 Support for durian platform.
2080 It has 2GB Sdram, uart and pcie.
2082 config TARGET_POMELO
2083 bool "Support Phytium Pomelo Platform"
2096 Support for pomelo platform.
2097 It has 8GB Sdram, uart and pcie.
2099 config TARGET_PE2201
2100 bool "Support Phytium PE2201 Platform"
2103 Support for pe2201 platform.It has 2GB Sdram, uart and pcie.
2105 config TARGET_PRESIDIO_ASIC
2106 bool "Support Cortina Presidio ASIC Platform"
2110 config TARGET_XENGUEST_ARM64
2111 bool "Xen guest ARM64"
2115 select LINUX_KERNEL_IMAGE_HEADER
2117 imply OF_HAS_PRIOR_STAGE
2120 bool "Support HPE GXP SoCs"
2127 config SUPPORT_PASSING_ATAGS
2128 bool "Support pre-devicetree ATAG-based booting"
2130 imply SETUP_MEMORY_TAGS
2132 Support for booting older Linux kernels, using ATAGs rather than
2133 passing a devicetree. This is option is rarely used, and the
2134 semantics are defined at
2135 https://www.kernel.org/doc/Documentation/arm/Booting at section 4a.
2137 config SETUP_MEMORY_TAGS
2138 bool "Pass memory size information via ATAG"
2139 depends on SUPPORT_PASSING_ATAGS
2142 bool "Pass Linux kernel cmdline via ATAG"
2143 depends on SUPPORT_PASSING_ATAGS
2146 bool "Pass initrd starting point and size via ATAG"
2147 depends on SUPPORT_PASSING_ATAGS
2150 bool "Pass system revision via ATAG"
2151 depends on SUPPORT_PASSING_ATAGS
2154 bool "Pass system serial number via ATAG"
2155 depends on SUPPORT_PASSING_ATAGS
2157 config STATIC_MACH_TYPE
2158 bool "Statically define the Machine ID number"
2159 default y if TARGET_DS109 || TARGET_DS414 || DEFAULT_DEVICE_TREE = "sun7i-a20-icnova-swac"
2161 When booting via ATAGs, enable this option if we know the correct
2162 machine ID number to use at compile time. Some systems will be
2163 passed the number dynamically by whatever loads U-Boot.
2166 int "Machine ID number"
2167 depends on STATIC_MACH_TYPE
2168 default 527 if TARGET_DS109
2169 default 3036 if TARGET_DS414
2170 default 4283 if DEFAULT_DEVICE_TREE = "sun7i-a20-icnova-swac"
2172 When booting via ATAGs, the machine type must be passed as a number.
2173 For the full list see https://www.arm.linux.org.uk/developer/machines
2175 config ARCH_SUPPORT_TFABOOT
2179 bool "Support for booting from TF-A"
2180 depends on ARCH_SUPPORT_TFABOOT
2182 Some platforms support the setup of secure registers (for instance
2183 for CPU errata handling) or provide secure services like PSCI.
2184 Those services could also be provided by other firmware parts
2185 like TF-A (Trusted Firmware for Cortex-A), in which case U-Boot
2186 does not need to (and cannot) execute this code.
2187 Enabling this option will make a U-Boot binary that is relying
2188 on other firmware layers to provide secure functionality.
2190 config TI_SECURE_DEVICE
2191 bool "HS Device Type Support"
2192 depends on ARCH_KEYSTONE || ARCH_OMAP2PLUS || ARCH_K3
2194 If a high secure (HS) device type is being used, this config
2195 must be set. This option impacts various aspects of the
2196 build system (to create signed boot images that can be
2197 authenticated) and the code. See the doc/README.ti-secure
2198 file for further details.
2200 config SYS_KWD_CONFIG
2201 string "kwbimage config file path"
2202 depends on ARCH_KIRKWOOD || ARCH_MVEBU
2203 default "arch/arm/mach-mvebu/kwbimage.cfg"
2205 Path within the source directory to the kwbimage.cfg file to use
2206 when packaging the U-Boot image for use.
2208 source "arch/arm/mach-apple/Kconfig"
2210 source "arch/arm/mach-aspeed/Kconfig"
2212 source "arch/arm/mach-at91/Kconfig"
2214 source "arch/arm/mach-bcm283x/Kconfig"
2216 source "arch/arm/mach-bcmbca/Kconfig"
2218 source "arch/arm/mach-bcmstb/Kconfig"
2220 source "arch/arm/mach-davinci/Kconfig"
2222 source "arch/arm/mach-exynos/Kconfig"
2224 source "arch/arm/mach-hpe/gxp/Kconfig"
2226 source "arch/arm/mach-highbank/Kconfig"
2228 source "arch/arm/mach-histb/Kconfig"
2230 source "arch/arm/mach-integrator/Kconfig"
2232 source "arch/arm/mach-ipq40xx/Kconfig"
2234 source "arch/arm/mach-k3/Kconfig"
2236 source "arch/arm/mach-keystone/Kconfig"
2238 source "arch/arm/mach-kirkwood/Kconfig"
2240 source "arch/arm/mach-lpc32xx/Kconfig"
2242 source "arch/arm/mach-mvebu/Kconfig"
2244 source "arch/arm/mach-octeontx/Kconfig"
2246 source "arch/arm/mach-octeontx2/Kconfig"
2248 source "arch/arm/cpu/armv7/ls102xa/Kconfig"
2250 source "arch/arm/mach-imx/mx3/Kconfig"
2252 source "arch/arm/mach-imx/mx5/Kconfig"
2254 source "arch/arm/mach-imx/mx6/Kconfig"
2256 source "arch/arm/mach-imx/mx7/Kconfig"
2258 source "arch/arm/mach-imx/mx7ulp/Kconfig"
2260 source "arch/arm/mach-imx/imx8/Kconfig"
2262 source "arch/arm/mach-imx/imx8m/Kconfig"
2264 source "arch/arm/mach-imx/imx8ulp/Kconfig"
2266 source "arch/arm/mach-imx/imx9/Kconfig"
2268 source "arch/arm/mach-imx/imxrt/Kconfig"
2270 source "arch/arm/mach-imx/mxs/Kconfig"
2272 source "arch/arm/mach-omap2/Kconfig"
2274 source "arch/arm/cpu/armv8/fsl-layerscape/Kconfig"
2276 source "arch/arm/mach-orion5x/Kconfig"
2278 source "arch/arm/mach-owl/Kconfig"
2280 source "arch/arm/mach-renesas/Kconfig"
2282 source "arch/arm/mach-meson/Kconfig"
2284 source "arch/arm/mach-mediatek/Kconfig"
2286 source "arch/arm/mach-qemu/Kconfig"
2288 source "arch/arm/mach-rockchip/Kconfig"
2290 source "arch/arm/mach-s5pc1xx/Kconfig"
2292 source "arch/arm/mach-sc5xx/Kconfig"
2294 source "arch/arm/mach-snapdragon/Kconfig"
2296 source "arch/arm/mach-socfpga/Kconfig"
2298 source "arch/arm/mach-sti/Kconfig"
2300 source "arch/arm/mach-stm32/Kconfig"
2302 source "arch/arm/mach-stm32mp/Kconfig"
2304 source "arch/arm/mach-sunxi/Kconfig"
2306 source "arch/arm/mach-tegra/Kconfig"
2308 source "arch/arm/mach-u8500/Kconfig"
2310 source "arch/arm/mach-uniphier/Kconfig"
2312 source "arch/arm/cpu/armv7/vf610/Kconfig"
2314 source "arch/arm/mach-zynq/Kconfig"
2316 source "arch/arm/mach-zynqmp/Kconfig"
2318 source "arch/arm/mach-versal/Kconfig"
2320 source "arch/arm/mach-versal-net/Kconfig"
2322 source "arch/arm/mach-zynqmp-r5/Kconfig"
2324 source "arch/arm/cpu/armv7/Kconfig"
2326 source "arch/arm/cpu/armv8/Kconfig"
2328 source "arch/arm/mach-imx/Kconfig"
2330 source "arch/arm/mach-nexell/Kconfig"
2332 source "arch/arm/mach-npcm/Kconfig"
2334 source "board/armltd/total_compute/Kconfig"
2335 source "board/armltd/corstone1000/Kconfig"
2336 source "board/bosch/shc/Kconfig"
2337 source "board/bosch/guardian/Kconfig"
2338 source "board/Marvell/octeontx/Kconfig"
2339 source "board/Marvell/octeontx2/Kconfig"
2340 source "board/armltd/vexpress/Kconfig"
2341 source "board/armltd/vexpress64/Kconfig"
2342 source "board/cortina/presidio-asic/Kconfig"
2343 source "board/broadcom/bcmns/Kconfig"
2344 source "board/broadcom/bcmns3/Kconfig"
2345 source "board/cavium/thunderx/Kconfig"
2346 source "board/eets/pdu001/Kconfig"
2347 source "board/emulation/qemu-arm/Kconfig"
2348 source "board/freescale/ls2080aqds/Kconfig"
2349 source "board/freescale/ls2080ardb/Kconfig"
2350 source "board/freescale/ls1088a/Kconfig"
2351 source "board/freescale/ls1028a/Kconfig"
2352 source "board/freescale/ls1021aqds/Kconfig"
2353 source "board/freescale/ls1043aqds/Kconfig"
2354 source "board/freescale/ls1021atwr/Kconfig"
2355 source "board/freescale/ls1021atsn/Kconfig"
2356 source "board/freescale/ls1021aiot/Kconfig"
2357 source "board/freescale/ls1046aqds/Kconfig"
2358 source "board/freescale/ls1043ardb/Kconfig"
2359 source "board/freescale/ls1046ardb/Kconfig"
2360 source "board/freescale/ls1046afrwy/Kconfig"
2361 source "board/freescale/ls1012aqds/Kconfig"
2362 source "board/freescale/ls1012ardb/Kconfig"
2363 source "board/freescale/ls1012afrdm/Kconfig"
2364 source "board/freescale/lx2160a/Kconfig"
2365 source "board/grinn/chiliboard/Kconfig"
2366 source "board/hisilicon/hikey/Kconfig"
2367 source "board/hisilicon/hikey960/Kconfig"
2368 source "board/hisilicon/poplar/Kconfig"
2369 source "board/isee/igep003x/Kconfig"
2370 source "board/kontron/sl28/Kconfig"
2371 source "board/myir/mys_6ulx/Kconfig"
2372 source "board/samsung/common/Kconfig"
2373 source "board/siemens/common/Kconfig"
2374 source "board/seeed/npi_imx6ull/Kconfig"
2375 source "board/socionext/developerbox/Kconfig"
2376 source "board/tcl/sl50/Kconfig"
2377 source "board/traverse/ten64/Kconfig"
2378 source "board/variscite/dart_6ul/Kconfig"
2379 source "board/vscom/baltos/Kconfig"
2380 source "board/phytium/durian/Kconfig"
2381 source "board/phytium/pomelo/Kconfig"
2382 source "board/phytium/pe2201/Kconfig"
2383 source "board/xen/xenguest_arm64/Kconfig"
2385 source "arch/arm/Kconfig.debug"