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324f6cfd WD |
1 | /* |
2 | * (C) Copyright 2002 | |
3 | * Wolfgang Denk, DENX Software Engineering, [email protected]. | |
4 | * | |
5 | * See file CREDITS for list of people who contributed to this | |
6 | * project. | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or | |
9 | * modify it under the terms of the GNU General Public License as | |
10 | * published by the Free Software Foundation; either version 2 of | |
11 | * the License, or (at your option) any later version. | |
12 | * | |
13 | * This program is distributed in the hope that it will be useful, | |
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | * GNU General Public License for more details. | |
17 | * | |
18 | * You should have received a copy of the GNU General Public License | |
19 | * along with this program; if not, write to the Free Software | |
20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
21 | * MA 02111-1307 USA | |
228f29ac WD |
22 | * |
23 | * Be sure to mark tests to be run before relocation as such with the | |
6d0f6bcf | 24 | * CONFIG_SYS_POST_PREREL flag so that logging is done correctly if the |
228f29ac | 25 | * logbuffer support is enabled. |
324f6cfd WD |
26 | */ |
27 | ||
28 | #include <common.h> | |
29 | ||
324f6cfd WD |
30 | #include <post.h> |
31 | ||
6e8ec682 | 32 | extern int ocm_post_test (int flags); |
324f6cfd WD |
33 | extern int cache_post_test (int flags); |
34 | extern int watchdog_post_test (int flags); | |
35 | extern int i2c_post_test (int flags); | |
36 | extern int rtc_post_test (int flags); | |
37 | extern int memory_post_test (int flags); | |
38 | extern int cpu_post_test (int flags); | |
a11e0696 | 39 | extern int fpu_post_test (int flags); |
324f6cfd WD |
40 | extern int uart_post_test (int flags); |
41 | extern int ether_post_test (int flags); | |
42 | extern int spi_post_test (int flags); | |
43 | extern int usb_post_test (int flags); | |
44 | extern int spr_post_test (int flags); | |
4532cb69 | 45 | extern int sysmon_post_test (int flags); |
5a8c51cd | 46 | extern int dsp_post_test (int flags); |
79fa88f3 | 47 | extern int codec_post_test (int flags); |
531e3e8b | 48 | extern int ecc_post_test (int flags); |
f6f7395e | 49 | extern int flash_post_test(int flags); |
4532cb69 | 50 | |
65b20dce YT |
51 | extern int dspic_init_post_test (int flags); |
52 | extern int dspic_post_test (int flags); | |
53 | extern int gdc_post_test (int flags); | |
54 | extern int fpga_post_test (int flags); | |
55 | extern int lwmon5_watchdog_post_test(int flags); | |
56 | extern int sysmon1_post_test(int flags); | |
29fd7ceb | 57 | extern int coprocessor_post_test(int flags); |
2151374f MF |
58 | extern int led_post_test(int flags); |
59 | extern int button_post_test(int flags); | |
8d3fcb5e | 60 | extern int memory_regions_post_test(int flags); |
65b20dce | 61 | |
4532cb69 WD |
62 | extern int sysmon_init_f (void); |
63 | ||
64 | extern void sysmon_reloc (void); | |
65 | ||
324f6cfd WD |
66 | |
67 | struct post_test post_list[] = | |
68 | { | |
6d0f6bcf | 69 | #if CONFIG_POST & CONFIG_SYS_POST_OCM |
6e8ec682 YT |
70 | { |
71 | "OCM test", | |
72 | "ocm", | |
73 | "This test checks on chip memory (OCM).", | |
7845d490 | 74 | POST_ROM | POST_ALWAYS | POST_PREREL | POST_CRITICAL | POST_STOP, |
6e8ec682 YT |
75 | &ocm_post_test, |
76 | NULL, | |
77 | NULL, | |
6d0f6bcf | 78 | CONFIG_SYS_POST_OCM |
6e8ec682 YT |
79 | }, |
80 | #endif | |
6d0f6bcf | 81 | #if CONFIG_POST & CONFIG_SYS_POST_CACHE |
324f6cfd | 82 | { |
8bde7f77 WD |
83 | "Cache test", |
84 | "cache", | |
85 | "This test verifies the CPU cache operation.", | |
86 | POST_RAM | POST_ALWAYS, | |
87 | &cache_post_test, | |
88 | NULL, | |
89 | NULL, | |
6d0f6bcf | 90 | CONFIG_SYS_POST_CACHE |
324f6cfd WD |
91 | }, |
92 | #endif | |
6d0f6bcf | 93 | #if CONFIG_POST & CONFIG_SYS_POST_WATCHDOG |
65b20dce YT |
94 | #if defined(CONFIG_POST_WATCHDOG) |
95 | CONFIG_POST_WATCHDOG, | |
96 | #else | |
324f6cfd | 97 | { |
8bde7f77 WD |
98 | "Watchdog timer test", |
99 | "watchdog", | |
100 | "This test checks the watchdog timer.", | |
8564acf9 | 101 | POST_RAM | POST_POWERON | POST_SLOWTEST | POST_MANUAL | POST_REBOOT, |
8bde7f77 WD |
102 | &watchdog_post_test, |
103 | NULL, | |
104 | NULL, | |
6d0f6bcf | 105 | CONFIG_SYS_POST_WATCHDOG |
324f6cfd WD |
106 | }, |
107 | #endif | |
65b20dce | 108 | #endif |
6d0f6bcf | 109 | #if CONFIG_POST & CONFIG_SYS_POST_I2C |
324f6cfd | 110 | { |
8bde7f77 WD |
111 | "I2C test", |
112 | "i2c", | |
113 | "This test verifies the I2C operation.", | |
114 | POST_RAM | POST_ALWAYS, | |
115 | &i2c_post_test, | |
116 | NULL, | |
117 | NULL, | |
6d0f6bcf | 118 | CONFIG_SYS_POST_I2C |
324f6cfd WD |
119 | }, |
120 | #endif | |
6d0f6bcf | 121 | #if CONFIG_POST & CONFIG_SYS_POST_RTC |
324f6cfd | 122 | { |
8bde7f77 WD |
123 | "RTC test", |
124 | "rtc", | |
125 | "This test verifies the RTC operation.", | |
8564acf9 | 126 | POST_RAM | POST_SLOWTEST | POST_MANUAL, |
8bde7f77 WD |
127 | &rtc_post_test, |
128 | NULL, | |
129 | NULL, | |
6d0f6bcf | 130 | CONFIG_SYS_POST_RTC |
324f6cfd WD |
131 | }, |
132 | #endif | |
6d0f6bcf | 133 | #if CONFIG_POST & CONFIG_SYS_POST_MEMORY |
324f6cfd | 134 | { |
8bde7f77 WD |
135 | "Memory test", |
136 | "memory", | |
137 | "This test checks RAM.", | |
8564acf9 | 138 | POST_ROM | POST_POWERON | POST_SLOWTEST | POST_PREREL, |
8bde7f77 WD |
139 | &memory_post_test, |
140 | NULL, | |
141 | NULL, | |
6d0f6bcf | 142 | CONFIG_SYS_POST_MEMORY |
324f6cfd WD |
143 | }, |
144 | #endif | |
6d0f6bcf | 145 | #if CONFIG_POST & CONFIG_SYS_POST_CPU |
324f6cfd | 146 | { |
8bde7f77 WD |
147 | "CPU test", |
148 | "cpu", | |
149 | "This test verifies the arithmetic logic unit of" | |
150 | " CPU.", | |
151 | POST_RAM | POST_ALWAYS, | |
152 | &cpu_post_test, | |
153 | NULL, | |
154 | NULL, | |
6d0f6bcf | 155 | CONFIG_SYS_POST_CPU |
324f6cfd WD |
156 | }, |
157 | #endif | |
6d0f6bcf | 158 | #if CONFIG_POST & CONFIG_SYS_POST_FPU |
a11e0696 IL |
159 | { |
160 | "FPU test", | |
161 | "fpu", | |
162 | "This test verifies the arithmetic logic unit of" | |
163 | " FPU.", | |
164 | POST_RAM | POST_ALWAYS, | |
165 | &fpu_post_test, | |
166 | NULL, | |
167 | NULL, | |
6d0f6bcf | 168 | CONFIG_SYS_POST_FPU |
a11e0696 IL |
169 | }, |
170 | #endif | |
6d0f6bcf | 171 | #if CONFIG_POST & CONFIG_SYS_POST_UART |
834a45d7 SR |
172 | #if defined(CONFIG_POST_UART) |
173 | CONFIG_POST_UART, | |
174 | #else | |
324f6cfd | 175 | { |
8bde7f77 WD |
176 | "UART test", |
177 | "uart", | |
178 | "This test verifies the UART operation.", | |
8564acf9 | 179 | POST_RAM | POST_SLOWTEST | POST_MANUAL, |
8bde7f77 WD |
180 | &uart_post_test, |
181 | NULL, | |
182 | NULL, | |
6d0f6bcf | 183 | CONFIG_SYS_POST_UART |
324f6cfd | 184 | }, |
834a45d7 | 185 | #endif /* CONFIG_POST_UART */ |
324f6cfd | 186 | #endif |
6d0f6bcf | 187 | #if CONFIG_POST & CONFIG_SYS_POST_ETHER |
324f6cfd | 188 | { |
8bde7f77 WD |
189 | "ETHERNET test", |
190 | "ethernet", | |
191 | "This test verifies the ETHERNET operation.", | |
192 | POST_RAM | POST_ALWAYS | POST_MANUAL, | |
193 | ðer_post_test, | |
194 | NULL, | |
195 | NULL, | |
6d0f6bcf | 196 | CONFIG_SYS_POST_ETHER |
324f6cfd WD |
197 | }, |
198 | #endif | |
6d0f6bcf | 199 | #if CONFIG_POST & CONFIG_SYS_POST_SPI |
324f6cfd | 200 | { |
8bde7f77 WD |
201 | "SPI test", |
202 | "spi", | |
203 | "This test verifies the SPI operation.", | |
204 | POST_RAM | POST_ALWAYS | POST_MANUAL, | |
205 | &spi_post_test, | |
206 | NULL, | |
207 | NULL, | |
6d0f6bcf | 208 | CONFIG_SYS_POST_SPI |
324f6cfd WD |
209 | }, |
210 | #endif | |
6d0f6bcf | 211 | #if CONFIG_POST & CONFIG_SYS_POST_USB |
324f6cfd | 212 | { |
8bde7f77 WD |
213 | "USB test", |
214 | "usb", | |
215 | "This test verifies the USB operation.", | |
216 | POST_RAM | POST_ALWAYS | POST_MANUAL, | |
217 | &usb_post_test, | |
218 | NULL, | |
219 | NULL, | |
6d0f6bcf | 220 | CONFIG_SYS_POST_USB |
324f6cfd WD |
221 | }, |
222 | #endif | |
6d0f6bcf | 223 | #if CONFIG_POST & CONFIG_SYS_POST_SPR |
324f6cfd | 224 | { |
8bde7f77 WD |
225 | "SPR test", |
226 | "spr", | |
227 | "This test checks SPR contents.", | |
b2e2142c | 228 | POST_RAM | POST_ALWAYS, |
8bde7f77 WD |
229 | &spr_post_test, |
230 | NULL, | |
231 | NULL, | |
6d0f6bcf | 232 | CONFIG_SYS_POST_SPR |
324f6cfd WD |
233 | }, |
234 | #endif | |
6d0f6bcf | 235 | #if CONFIG_POST & CONFIG_SYS_POST_SYSMON |
4532cb69 | 236 | { |
8bde7f77 WD |
237 | "SYSMON test", |
238 | "sysmon", | |
239 | "This test monitors system hardware.", | |
240 | POST_RAM | POST_ALWAYS, | |
241 | &sysmon_post_test, | |
242 | &sysmon_init_f, | |
243 | &sysmon_reloc, | |
6d0f6bcf | 244 | CONFIG_SYS_POST_SYSMON |
4532cb69 WD |
245 | }, |
246 | #endif | |
6d0f6bcf | 247 | #if CONFIG_POST & CONFIG_SYS_POST_DSP |
5a8c51cd WD |
248 | { |
249 | "DSP test", | |
250 | "dsp", | |
251 | "This test checks any connected DSP(s).", | |
5744ddc6 | 252 | POST_RAM | POST_ALWAYS | POST_MANUAL, |
5a8c51cd WD |
253 | &dsp_post_test, |
254 | NULL, | |
255 | NULL, | |
6d0f6bcf | 256 | CONFIG_SYS_POST_DSP |
5a8c51cd WD |
257 | }, |
258 | #endif | |
6d0f6bcf | 259 | #if CONFIG_POST & CONFIG_SYS_POST_CODEC |
79fa88f3 WD |
260 | { |
261 | "CODEC test", | |
262 | "codec", | |
263 | "This test checks any connected codec(s).", | |
264 | POST_RAM | POST_MANUAL, | |
265 | &codec_post_test, | |
266 | NULL, | |
267 | NULL, | |
6d0f6bcf | 268 | CONFIG_SYS_POST_CODEC |
79fa88f3 WD |
269 | }, |
270 | #endif | |
6d0f6bcf | 271 | #if CONFIG_POST & CONFIG_SYS_POST_ECC |
531e3e8b PK |
272 | { |
273 | "ECC test", | |
274 | "ecc", | |
8dafa874 LJ |
275 | "This test checks the ECC facility of memory.", |
276 | POST_ROM | POST_ALWAYS | POST_PREREL, | |
531e3e8b PK |
277 | &ecc_post_test, |
278 | NULL, | |
279 | NULL, | |
6d0f6bcf | 280 | CONFIG_SYS_POST_ECC |
531e3e8b PK |
281 | }, |
282 | #endif | |
6d0f6bcf | 283 | #if CONFIG_POST & CONFIG_SYS_POST_BSPEC1 |
65b20dce YT |
284 | CONFIG_POST_BSPEC1, |
285 | #endif | |
6d0f6bcf | 286 | #if CONFIG_POST & CONFIG_SYS_POST_BSPEC2 |
65b20dce YT |
287 | CONFIG_POST_BSPEC2, |
288 | #endif | |
6d0f6bcf | 289 | #if CONFIG_POST & CONFIG_SYS_POST_BSPEC3 |
65b20dce YT |
290 | CONFIG_POST_BSPEC3, |
291 | #endif | |
6d0f6bcf | 292 | #if CONFIG_POST & CONFIG_SYS_POST_BSPEC4 |
65b20dce YT |
293 | CONFIG_POST_BSPEC4, |
294 | #endif | |
6d0f6bcf | 295 | #if CONFIG_POST & CONFIG_SYS_POST_BSPEC5 |
65b20dce YT |
296 | CONFIG_POST_BSPEC5, |
297 | #endif | |
29fd7ceb AG |
298 | #if CONFIG_POST & CONFIG_SYS_POST_COPROC |
299 | { | |
300 | "Coprocessors communication test", | |
301 | "coproc_com", | |
302 | "This test checks communication with coprocessors.", | |
303 | POST_RAM | POST_ALWAYS | POST_CRITICAL, | |
304 | &coprocessor_post_test, | |
305 | NULL, | |
306 | NULL, | |
307 | CONFIG_SYS_POST_COPROC | |
f6f7395e MF |
308 | }, |
309 | #endif | |
310 | #if CONFIG_POST & CONFIG_SYS_POST_FLASH | |
311 | { | |
312 | "Parallel NOR flash test", | |
313 | "flash", | |
314 | "This test verifies parallel flash operations.", | |
315 | POST_RAM | POST_SLOWTEST | POST_MANUAL, | |
316 | &flash_post_test, | |
317 | NULL, | |
318 | NULL, | |
319 | CONFIG_SYS_POST_FLASH | |
320 | }, | |
29fd7ceb | 321 | #endif |
8d3fcb5e VL |
322 | #if CONFIG_POST & CONFIG_SYS_POST_MEM_REGIONS |
323 | { | |
324 | "Memory regions test", | |
325 | "mem_regions", | |
326 | "This test checks regularly placed regions of the RAM.", | |
327 | POST_ROM | POST_SLOWTEST | POST_PREREL, | |
328 | &memory_regions_post_test, | |
329 | NULL, | |
330 | NULL, | |
331 | CONFIG_SYS_POST_MEM_REGIONS | |
332 | }, | |
333 | #endif | |
324f6cfd WD |
334 | }; |
335 | ||
d2397817 | 336 | unsigned int post_list_size = ARRAY_SIZE(post_list); |