projects / u-boot.git / blame
| Commit | Line | Data |
|---|---|---|
| ba70d6a4 MK |
1 | /* |
| 2 | * (C) Copyright 2006 DENX Software Engineering | |
| 3 | * | |
| 4 | * See file CREDITS for list of people who contributed to this | |
| 5 | * project. | |
| 6 | * | |
| 7 | * This program is free software; you can redistribute it and/or | |
| 8 | * modify it under the terms of the GNU General Public License as | |
| 9 | * published by the Free Software Foundation; either version 2 of | |
| 10 | * the License, or (at your option) any later version. | |
| 11 | * | |
| 12 | * This program is distributed in the hope that it will be useful, | |
| 13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| 15 | * GNU General Public License for more details. | |
| 16 | * | |
| 17 | * You should have received a copy of the GNU General Public License | |
| 18 | * along with this program; if not, write to the Free Software | |
| 19 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
| 20 | * MA 02111-1307 USA | |
| 21 | */ | |
| 22 | ||
| 23 | /* DA9030 register definitions */ | |
| 24 | #define CID 0x00 | |
| 25 | #define EVENT_A 0x01 | |
| 26 | #define EVENT_B 0x02 | |
| 27 | #define EVENT_C 0x03 | |
| 28 | #define STATUS 0x04 | |
| 29 | #define IRQ_MASK_A 0x05 | |
| 30 | #define IRQ_MASK_B 0x06 | |
| 31 | #define IRQ_MASK_C 0x07 | |
| 32 | #define SYS_CONTROL_A 0x08 | |
| 33 | #define SYS_CONTROL_B 0x09 | |
| 34 | #define FAULT_LOG 0x0A | |
| 35 | #define LDO_10_11 0x10 | |
| 36 | #define LDO_15 0x11 | |
| 37 | #define LDO_14_16 0x12 | |
| 38 | #define LDO_18_19 0x13 | |
| 39 | #define LDO_17_SIMCP0 0x14 | |
| 40 | #define BUCK2_DVC1 0x15 | |
| 41 | #define BUCK2_DVC2 0x16 | |
| 42 | #define REG_CONTROL_1_17 0x17 | |
| 43 | #define REG_CONTROL_2_18 0x18 | |
| 44 | #define USBPUMP 0x19 | |
| 45 | #define SLEEP_CONTROL 0x1A | |
| 46 | #define STARTUP_CONTROL 0x1B | |
| 47 | #define LED1_CONTROL 0x20 | |
| 48 | #define LED2_CONTROL 0x21 | |
| 49 | #define LED3_CONTROL 0x22 | |
| 50 | #define LED4_CONTROL 0x23 | |
| 51 | #define LEDPC_CONTROL 0x24 | |
| 52 | #define WLED_CONTROL 0x25 | |
| 53 | #define MISC_CONTROLA 0x26 | |
| 54 | #define MISC_CONTROLB 0x27 | |
| 55 | #define CHARGE_CONTROL 0x28 | |
| 56 | #define CCTR_CONTROL 0x29 | |
| 57 | #define TCTR_CONTROL 0x2A | |
| 58 | #define CHARGE_PULSE 0x2B | |
| 59 | ||
| 60 | /* ... some missing ...*/ | |
| 61 | ||
| 62 | #define LDO1 0x90 | |
| 63 | #define LDO2_3 0x91 | |
| 64 | #define LDO4_5 0x92 | |
| 65 | #define LDO6_SIMCP 0x93 | |
| 66 | #define LDO7_8 0x94 | |
| 67 | #define LDO9_12 0x95 | |
| 68 | #define BUCK 0x96 | |
| 69 | #define REG_CONTROL_1_97 0x97 | |
| 70 | #define REG_CONTROL_2_98 0x98 | |
| 71 | #define REG_SLEEP_CONTROL1 0x99 | |
| 72 | #define REG_SLEEP_CONTROL2 0x9A | |
| 73 | #define REG_SLEEP_CONTROL3 0x9B | |
| 74 | #define ADC_MAN_CONTROL 0xA0 | |
| 75 | #define ADC_AUTO_CONTROL 0xA1 | |
| 76 | #define VBATMON 0xA2 | |
| 77 | #define VBATMONTXMON 0xA3 | |
| 78 | #define TBATHIGHP 0xA4 | |
| 79 | #define TBATHIGHN 0xA5 | |
| 80 | #define TBATLOW 0xA6 | |
| 81 | #define MAN_RES 0xB0 | |
| 82 | #define VBAT_RES 0xB1 | |
| 83 | #define VBATMIN_RES 0xB2 | |
| 84 | #define VBATMINTXON_RES 0xB3 | |
| 85 | #define ICHMAX_RES 0xB4 | |
| 86 | #define ICHMIN_RES 0xB5 | |
| 87 | #define ICHAVERAGE_RES 0xB6 | |
| 88 | #define VCHMAX_RES 0xB7 | |
| 89 | #define VCHMIN_RES 0xB8 | |
| 90 | #define TBAT_RES 0xB9 | |
| 91 | #define ADC_IN4_RES 0xBA | |
| 92 | ||
| 93 | #define STATUS_ONKEY_N 0x1 /* current ONKEY_N value */ | |
| 94 | #define STATUS_PWREN1 (1<<1) /* PWREN1 value */ | |
| 95 | #define STATUS_EXTON (1<<2) /* EXTON value */ | |
| 96 | #define STATUS_CHDET (1<<3) /* Charger detection status */ | |
| 97 | #define STATUS_TBAT (1<<4) /* Battery over/under temperature status */ | |
| 98 | #define STATUS_VBATMON (1<<5) /* VBATMON comparison status */ | |
| 99 | #define STATUS_VBATMONTXON (1<<6) /* VBATMONTXON comparison status */ | |
| 100 | #define STATUS_CHIOVER (1<<7) /* Charge overcurrent */ | |
| 101 | ||
| 102 | #define SYS_CONTROL_A_SLEEP_N_PIN_ENABLE 0x1 | |
| 103 | #define SYS_CONTROL_A_SHUT_DOWN (1<<1) | |
| 104 | #define SYS_CONTROL_A_HWRES_ENABLE (1<<2) | |
| 105 | #define SYS_CONTROL_A_WDOG_ACTION (1<<3) | |
| 106 | #define SYS_CONTROL_A_WATCHDOG (1<<7) |