[u-boot.git] / include / configs / mx35pdk.h

/*
 * (C) Copyright 2010, Stefano Babic <[email protected]>
 *
 * (C) Copyright 2008-2010 Freescale Semiconductor, Inc.
 *
 * Copyright (C) 2007, Guennadi Liakhovetski <[email protected]>
 *
 * Configuration for the MX35pdk Freescale board.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 * MA 02111-1307 USA
 */

#ifndef __CONFIG_H
#define __CONFIG_H

#include <asm/arch/imx-regs.h>

 /* High Level Configuration Options */
#define CONFIG_ARM1136	/* This is an arm1136 CPU core */
#define CONFIG_MX35

#define CONFIG_DISPLAY_CPUINFO

/* Set TEXT at the beginning of the NOR flash */
#define CONFIG_SYS_TEXT_BASE	0xA0000000
#define CONFIG_SYS_CACHELINE_SIZE	32

#define CONFIG_BOARD_EARLY_INIT_F
#define CONFIG_BOARD_LATE_INIT

#define CONFIG_CMDLINE_TAG		/* enable passing of ATAGs */
#define CONFIG_REVISION_TAG
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_INITRD_TAG

/*
 * Size of malloc() pool
 */
#define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + 1024 * 1024)

/*
 * Hardware drivers
 */
#define CONFIG_HARD_I2C
#define CONFIG_I2C_MXC
#define CONFIG_SYS_I2C_BASE		I2C1_BASE_ADDR
#define CONFIG_SYS_I2C_SPEED		100000
#define CONFIG_MXC_SPI
#define CONFIG_MXC_GPIO


/*
 * PMIC Configs
 */
#define CONFIG_POWER
#define CONFIG_POWER_I2C
#define CONFIG_POWER_FSL
#define CONFIG_PMIC_FSL_MC13892
#define CONFIG_SYS_FSL_PMIC_I2C_ADDR	0x08
#define CONFIG_RTC_MC13XXX

/*
 * MFD MC9SDZ60
 */
#define CONFIG_FSL_MC9SDZ60
#define CONFIG_SYS_FSL_MC9SDZ60_I2C_ADDR	0x69

/*
 * UART (console)
 */
#define CONFIG_MXC_UART
#define CONFIG_MXC_UART_BASE	UART1_BASE

/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE
#define CONFIG_CONS_INDEX	1
#define CONFIG_BAUDRATE		115200

/*
 * Command definition
 */

#include <config_cmd_default.h>

#define CONFIG_CMD_BOOTZ
#define CONFIG_CMD_PING
#define CONFIG_CMD_DHCP
#define CONFIG_BOOTP_SUBNETMASK
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_DNS

#define CONFIG_CMD_NAND
#define CONFIG_CMD_CACHE

#define CONFIG_CMD_I2C
#define CONFIG_CMD_SPI
#define CONFIG_CMD_MII
#define CONFIG_CMD_NET
#define CONFIG_NET_RETRY_COUNT	100
#define CONFIG_CMD_DATE

#define CONFIG_CMD_USB
#define CONFIG_USB_STORAGE
#define CONFIG_CMD_MMC
#define CONFIG_DOS_PARTITION
#define CONFIG_EFI_PARTITION
#define CONFIG_CMD_EXT2
#define CONFIG_CMD_FAT

#define CONFIG_BOOTDELAY	1

#define CONFIG_LOADADDR		0x80800000	/* loadaddr env var */

/*
 * Ethernet on the debug board (SMC911)
 */
#define CONFIG_SMC911X
#define CONFIG_SMC911X_16_BIT 1
#define CONFIG_SMC911X_BASE CS5_BASE_ADDR

#define CONFIG_HAS_ETH1
#define CONFIG_ETHPRIME

/*
 * Ethernet on SOC (FEC)
 */
#define CONFIG_FEC_MXC
#define IMX_FEC_BASE	FEC_BASE_ADDR
#define CONFIG_FEC_MXC_PHYADDR	0x1F

#define CONFIG_MII

#define CONFIG_ARP_TIMEOUT	200UL

/*
 * Miscellaneous configurable options
 */
#define CONFIG_SYS_LONGHELP	/* undef to save memory */
#define CONFIG_SYS_PROMPT	"MX35 U-Boot > "
#define CONFIG_CMDLINE_EDITING
#define CONFIG_SYS_HUSH_PARSER	/* Use the HUSH parser */

#define CONFIG_AUTO_COMPLETE
#define CONFIG_SYS_CBSIZE	256	/* Console I/O Buffer Size */
/* Print Buffer Size */
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
#define CONFIG_SYS_MAXARGS	16	/* max number of command args */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */

#define CONFIG_SYS_MEMTEST_START	0	/* memtest works on */
#define CONFIG_SYS_MEMTEST_END		0x10000

#undef	CONFIG_SYS_CLKS_IN_HZ	/* everything, incl board info, in Hz */

#define CONFIG_SYS_LOAD_ADDR		CONFIG_LOADADDR

#define CONFIG_SYS_HZ				1000

/*
 * Physical Memory Map
 */
#define CONFIG_NR_DRAM_BANKS	2
#define PHYS_SDRAM_1		CSD0_BASE_ADDR
#define PHYS_SDRAM_1_SIZE	(128 * 1024 * 1024)
#define PHYS_SDRAM_2		CSD1_BASE_ADDR
#define PHYS_SDRAM_2_SIZE	(128 * 1024 * 1024)

#define CONFIG_SYS_SDRAM_BASE		CSD0_BASE_ADDR
#define CONFIG_SYS_INIT_RAM_ADDR	(IRAM_BASE_ADDR + 0x10000)
#define CONFIG_SYS_INIT_RAM_SIZE		(IRAM_SIZE / 2)
#define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_SIZE - \
					GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_INIT_RAM_ADDR + \
					CONFIG_SYS_GBL_DATA_OFFSET)

/*
 * MTD Command for mtdparts
 */
#define CONFIG_CMD_MTDPARTS
#define CONFIG_MTD_DEVICE
#define CONFIG_FLASH_CFI_MTD
#define CONFIG_MTD_PARTITIONS
#define MTDIDS_DEFAULT		"nand0=mxc_nand,nor0=physmap-flash.0"
#define MTDPARTS_DEFAULT	"mtdparts=mxc_nand:1m(boot),5m(linux),"	\
				"96m(root),8m(cfg),1938m(user);"	\
				"physmap-flash.0:512k(b),4m(k),30m(u),28m(r)"

/*
 * FLASH and environment organization
 */
#define CONFIG_SYS_FLASH_BASE		CS0_BASE_ADDR
#define CONFIG_SYS_MAX_FLASH_BANKS 1	/* max number of memory banks */
#define CONFIG_SYS_MAX_FLASH_SECT 512	/* max number of sectors on one chip */
/* Monitor at beginning of flash */
#define CONFIG_SYS_MONITOR_BASE	CONFIG_SYS_FLASH_BASE
#define CONFIG_SYS_MONITOR_LEN		(512 * 1024)

#define CONFIG_ENV_SECT_SIZE	(128 * 1024)
#define CONFIG_ENV_SIZE		CONFIG_ENV_SECT_SIZE

/* Address and size of Redundant Environment Sector	*/
#define CONFIG_ENV_OFFSET_REDUND	(CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
#define CONFIG_ENV_SIZE_REDUND	CONFIG_ENV_SIZE

#define CONFIG_ENV_ADDR		(CONFIG_SYS_MONITOR_BASE + \
				CONFIG_SYS_MONITOR_LEN)

#define CONFIG_ENV_IS_IN_FLASH

#if defined(CONFIG_FSL_ENV_IN_NAND)
	#define CONFIG_ENV_IS_IN_NAND
	#define CONFIG_ENV_OFFSET       (1024 * 1024)
#endif

/*
 * CFI FLASH driver setup
 */
#define CONFIG_SYS_FLASH_CFI		/* Flash memory is CFI compliant */
#define CONFIG_FLASH_CFI_DRIVER

/* A non-standard buffered write algorithm */
#define CONFIG_FLASH_SPANSION_S29WS_N
#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE	/* faster */
#define CONFIG_SYS_FLASH_PROTECTION	/* Use hardware sector protection */

/*
 * NAND FLASH driver setup
 */
#define CONFIG_NAND_MXC
#define CONFIG_MXC_NAND_REGS_BASE	(NFC_BASE_ADDR)
#define CONFIG_SYS_MAX_NAND_DEVICE	1
#define CONFIG_SYS_NAND_BASE		(NFC_BASE_ADDR)
#define CONFIG_MXC_NAND_HWECC
#define CONFIG_SYS_NAND_LARGEPAGE

/* EHCI driver */
#define CONFIG_USB_EHCI
#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS	1
#define CONFIG_EHCI_IS_TDI
#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
#define CONFIG_USB_EHCI_MXC
#define CONFIG_MXC_USB_PORT	0
#define CONFIG_MXC_USB_FLAGS	(MXC_EHCI_INTERFACE_DIFF_UNI | \
				 MXC_EHCI_POWER_PINS_ENABLED | \
				 MXC_EHCI_OC_PIN_ACTIVE_LOW)
#define CONFIG_MXC_USB_PORTSC	(MXC_EHCI_UTMI_16BIT | MXC_EHCI_MODE_UTMI)

/* mmc driver */
#define CONFIG_MMC
#define CONFIG_GENERIC_MMC
#define CONFIG_FSL_ESDHC
#define CONFIG_SYS_FSL_ESDHC_ADDR	0
#define CONFIG_SYS_FSL_ESDHC_NUM	1

/*
 * Default environment and default scripts
 * to update uboot and load kernel
 */

#define CONFIG_HOSTNAME "mx35pdk"
#define	CONFIG_EXTRA_ENV_SETTINGS					\
	"netdev=eth1\0"							\
	"ethprime=smc911x\0"						\
	"nfsargs=setenv bootargs root=/dev/nfs rw "			\
		"nfsroot=${serverip}:${rootpath}\0"			\
	"ramargs=setenv bootargs root=/dev/ram rw\0"			\
	"addip_sta=setenv bootargs ${bootargs} "			\
		"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}"	\
		":${hostname}:${netdev}:off panic=1\0"			\
	"addip_dyn=setenv bootargs ${bootargs} ip=dhcp\0"		\
	"addip=if test -n ${ipdyn};then run addip_dyn;"			\
		"else run addip_sta;fi\0"				\
	"addmtd=setenv bootargs ${bootargs} ${mtdparts}\0"		\
	"addtty=setenv bootargs ${bootargs}"				\
		" console=ttymxc0,${baudrate}\0"			\
	"addmisc=setenv bootargs ${bootargs} ${misc}\0"			\
	"loadaddr=80800000\0"						\
	"kernel_addr_r=80800000\0"					\
	"hostname=" __stringify(CONFIG_HOSTNAME) "\0"			\
	"bootfile=" __stringify(CONFIG_HOSTNAME) "/uImage\0"		\
	"ramdisk_file=" __stringify(CONFIG_HOSTNAME) "/uRamdisk\0"	\
	"flash_self=run ramargs addip addtty addmtd addmisc;"		\
		"bootm ${kernel_addr} ${ramdisk_addr}\0"		\
	"flash_nfs=run nfsargs addip addtty addmtd addmisc;"		\
		"bootm ${kernel_addr}\0"				\
	"net_nfs=tftp ${kernel_addr_r} ${bootfile}; "			\
		"run nfsargs addip addtty addmtd addmisc;"		\
		"bootm ${kernel_addr_r}\0"				\
	"net_self_load=tftp ${kernel_addr_r} ${bootfile};"		\
		"tftp ${ramdisk_addr_r} ${ramdisk_file};\0"		\
	"u-boot=" __stringify(CONFIG_HOSTNAME) "/u-boot.bin\0"		\
	"load=tftp ${loadaddr} ${u-boot}\0"				\
	"uboot_addr=" __stringify(CONFIG_SYS_MONITOR_BASE) "\0"		\
	"update=protect off ${uboot_addr} +80000;"			\
		"erase ${uboot_addr} +80000;"				\
		"cp.b ${loadaddr} ${uboot_addr} ${filesize}\0"		\
	"upd=if run load;then echo Updating u-boot;if run update;"	\
		"then echo U-Boot updated;"				\
			"else echo Error updating u-boot !;"		\
			"echo Board without bootloader !!;"		\
		"fi;"							\
		"else echo U-Boot not downloaded..exiting;fi\0"		\
	"bootcmd=run net_nfs\0"

#endif				/* __CONFIG_H */
Commit	Line	Data
eae4988b SB	1	/*
	2	* (C) Copyright 2010, Stefano Babic <[email protected]>
	3	*
	4	* (C) Copyright 2008-2010 Freescale Semiconductor, Inc.
	5	*
	6	* Copyright (C) 2007, Guennadi Liakhovetski <[email protected]>
	7	*
	8	* Configuration for the MX35pdk Freescale board.
	9	*
	10	* This program is free software; you can redistribute it and/or
	11	* modify it under the terms of the GNU General Public License as
	12	* published by the Free Software Foundation; either version 2 of
	13	* the License, or (at your option) any later version.
	14	*
	15	* This program is distributed in the hope that it will be useful,
	16	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	17	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	18	* GNU General Public License for more details.
	19	*
	20	* You should have received a copy of the GNU General Public License
	21	* along with this program; if not, write to the Free Software
	22	* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
	23	* MA 02111-1307 USA
	24	*/
	25
	26	#ifndef __CONFIG_H
	27	#define __CONFIG_H
	28
	29	#include <asm/arch/imx-regs.h>
	30
	31	/* High Level Configuration Options */
	32	#define CONFIG_ARM1136 /* This is an arm1136 CPU core */
	33	#define CONFIG_MX35
eae4988b SB	34
eae4988b SB	35	#define CONFIG_DISPLAY_CPUINFO
eae4988b SB	36
	37	/* Set TEXT at the beginning of the NOR flash */
	38	#define CONFIG_SYS_TEXT_BASE 0xA0000000
0792a36e	39	#define CONFIG_SYS_CACHELINE_SIZE 32
eae4988b	40
eae4988b	41	#define CONFIG_BOARD_EARLY_INIT_F
9660e442	42	#define CONFIG_BOARD_LATE_INIT
eae4988b SB	43
	44	#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
	45	#define CONFIG_REVISION_TAG
	46	#define CONFIG_SETUP_MEMORY_TAGS
	47	#define CONFIG_INITRD_TAG
	48
	49	/*
	50	* Size of malloc() pool
	51	*/
	52	#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 1024 * 1024)
	53
	54	/*
	55	* Hardware drivers
	56	*/
	57	#define CONFIG_HARD_I2C
	58	#define CONFIG_I2C_MXC
de6f604d	59	#define CONFIG_SYS_I2C_BASE I2C1_BASE_ADDR
eae4988b	60	#define CONFIG_SYS_I2C_SPEED 100000
eae4988b	61	#define CONFIG_MXC_SPI
a4adedd4	62	#define CONFIG_MXC_GPIO
eae4988b SB	63
	64
	65	/*
	66	* PMIC Configs
	67	*/
be3b51aa ŁM	68	#define CONFIG_POWER
	69	#define CONFIG_POWER_I2C
	70	#define CONFIG_POWER_FSL
4cfc6c4f	71	#define CONFIG_PMIC_FSL_MC13892
eae4988b	72	#define CONFIG_SYS_FSL_PMIC_I2C_ADDR 0x08
d28d6a96	73	#define CONFIG_RTC_MC13XXX
eae4988b SB	74
	75	/*
	76	* MFD MC9SDZ60
	77	*/
	78	#define CONFIG_FSL_MC9SDZ60
	79	#define CONFIG_SYS_FSL_MC9SDZ60_I2C_ADDR 0x69
	80
	81	/*
	82	* UART (console)
	83	*/
	84	#define CONFIG_MXC_UART
40f6fffe	85	#define CONFIG_MXC_UART_BASE UART1_BASE
eae4988b SB	86
	87	/* allow to overwrite serial and ethaddr */
	88	#define CONFIG_ENV_OVERWRITE
	89	#define CONFIG_CONS_INDEX 1
	90	#define CONFIG_BAUDRATE 115200
eae4988b SB	91
	92	/*
	93	* Command definition
	94	*/
	95
	96	#include <config_cmd_default.h>
	97
ee303c96	98	#define CONFIG_CMD_BOOTZ
eae4988b SB	99	#define CONFIG_CMD_PING
	100	#define CONFIG_CMD_DHCP
	101	#define CONFIG_BOOTP_SUBNETMASK
	102	#define CONFIG_BOOTP_GATEWAY
	103	#define CONFIG_BOOTP_DNS
	104
	105	#define CONFIG_CMD_NAND
0792a36e	106	#define CONFIG_CMD_CACHE
eae4988b SB	107
	108	#define CONFIG_CMD_I2C
	109	#define CONFIG_CMD_SPI
	110	#define CONFIG_CMD_MII
	111	#define CONFIG_CMD_NET
	112	#define CONFIG_NET_RETRY_COUNT 100
d28d6a96	113	#define CONFIG_CMD_DATE
eae4988b	114
961a7628 BT	115	#define CONFIG_CMD_USB
961a7628 BT	116	#define CONFIG_USB_STORAGE
3292539e SB	117	#define CONFIG_CMD_MMC
	118	#define CONFIG_DOS_PARTITION
	119	#define CONFIG_EFI_PARTITION
	120	#define CONFIG_CMD_EXT2
	121	#define CONFIG_CMD_FAT
	122
ec7503bb	123	#define CONFIG_BOOTDELAY 1
eae4988b SB	124
	125	#define CONFIG_LOADADDR 0x80800000 /* loadaddr env var */
	126
	127	/*
	128	* Ethernet on the debug board (SMC911)
	129	*/
	130	#define CONFIG_SMC911X
	131	#define CONFIG_SMC911X_16_BIT 1
	132	#define CONFIG_SMC911X_BASE CS5_BASE_ADDR
	133
	134	#define CONFIG_HAS_ETH1
eae4988b SB	135	#define CONFIG_ETHPRIME
	136
	137	/*
	138	* Ethernet on SOC (FEC)
	139	*/
	140	#define CONFIG_FEC_MXC
	141	#define IMX_FEC_BASE FEC_BASE_ADDR
	142	#define CONFIG_FEC_MXC_PHYADDR 0x1F
	143
	144	#define CONFIG_MII
eae4988b SB	145
	146	#define CONFIG_ARP_TIMEOUT 200UL
	147
	148	/*
	149	* Miscellaneous configurable options
	150	*/
	151	#define CONFIG_SYS_LONGHELP /* undef to save memory */
	152	#define CONFIG_SYS_PROMPT "MX35 U-Boot > "
	153	#define CONFIG_CMDLINE_EDITING
	154	#define CONFIG_SYS_HUSH_PARSER /* Use the HUSH parser */
eae4988b SB	155
	156	#define CONFIG_AUTO_COMPLETE
	157	#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
	158	/* Print Buffer Size */
	159	#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
	160	#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
	161	#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
	162
	163	#define CONFIG_SYS_MEMTEST_START 0 /* memtest works on */
	164	#define CONFIG_SYS_MEMTEST_END 0x10000
	165
	166	#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */
	167
	168	#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
	169
	170	#define CONFIG_SYS_HZ 1000
	171
eae4988b SB	172	/*
	173	* Physical Memory Map
	174	*/
6b5acfc1	175	#define CONFIG_NR_DRAM_BANKS 2
eae4988b SB	176	#define PHYS_SDRAM_1 CSD0_BASE_ADDR
eae4988b SB	177	#define PHYS_SDRAM_1_SIZE (128 * 1024 * 1024)
6b5acfc1 SB	178	#define PHYS_SDRAM_2 CSD1_BASE_ADDR
6b5acfc1 SB	179	#define PHYS_SDRAM_2_SIZE (128 * 1024 * 1024)
eae4988b SB	180
	181	#define CONFIG_SYS_SDRAM_BASE CSD0_BASE_ADDR
	182	#define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR + 0x10000)
	183	#define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE / 2)
	184	#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \
	185	GENERATED_GBL_DATA_SIZE)
	186	#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
	187	CONFIG_SYS_GBL_DATA_OFFSET)
	188
	189	/*
	190	* MTD Command for mtdparts
	191	*/
	192	#define CONFIG_CMD_MTDPARTS
	193	#define CONFIG_MTD_DEVICE
	194	#define CONFIG_FLASH_CFI_MTD
	195	#define CONFIG_MTD_PARTITIONS
	196	#define MTDIDS_DEFAULT "nand0=mxc_nand,nor0=physmap-flash.0"
	197	#define MTDPARTS_DEFAULT "mtdparts=mxc_nand:1m(boot),5m(linux)," \
	198	"96m(root),8m(cfg),1938m(user);" \
	199	"physmap-flash.0:512k(b),4m(k),30m(u),28m(r)"
	200
	201	/*
	202	* FLASH and environment organization
	203	*/
	204	#define CONFIG_SYS_FLASH_BASE CS0_BASE_ADDR
	205	#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
	206	#define CONFIG_SYS_MAX_FLASH_SECT 512 /* max number of sectors on one chip */
	207	/* Monitor at beginning of flash */
	208	#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
	209	#define CONFIG_SYS_MONITOR_LEN (512 * 1024)
	210
	211	#define CONFIG_ENV_SECT_SIZE (128 * 1024)
	212	#define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE
	213
	214	/* Address and size of Redundant Environment Sector */
	215	#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
	216	#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
	217
	218	#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + \
	219	CONFIG_SYS_MONITOR_LEN)
	220
	221	#define CONFIG_ENV_IS_IN_FLASH
	222
	223	#if defined(CONFIG_FSL_ENV_IN_NAND)
	224	#define CONFIG_ENV_IS_IN_NAND
	225	#define CONFIG_ENV_OFFSET (1024 * 1024)
	226	#endif
	227
	228	/*
	229	* CFI FLASH driver setup
	230	*/
	231	#define CONFIG_SYS_FLASH_CFI /* Flash memory is CFI compliant */
	232	#define CONFIG_FLASH_CFI_DRIVER
	233
	234	/* A non-standard buffered write algorithm */
	235	#define CONFIG_FLASH_SPANSION_S29WS_N
	236	#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* faster */
	237	#define CONFIG_SYS_FLASH_PROTECTION /* Use hardware sector protection */
	238
	239	/*
	240	* NAND FLASH driver setup
	241	*/
	242	#define CONFIG_NAND_MXC
eae4988b SB	243	#define CONFIG_MXC_NAND_REGS_BASE (NFC_BASE_ADDR)
	244	#define CONFIG_SYS_MAX_NAND_DEVICE 1
	245	#define CONFIG_SYS_NAND_BASE (NFC_BASE_ADDR)
	246	#define CONFIG_MXC_NAND_HWECC
	247	#define CONFIG_SYS_NAND_LARGEPAGE
	248
961a7628 BT	249	/* EHCI driver */
	250	#define CONFIG_USB_EHCI
	251	#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 1
	252	#define CONFIG_EHCI_IS_TDI
	253	#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
	254	#define CONFIG_USB_EHCI_MXC
	255	#define CONFIG_MXC_USB_PORT 0
	256	#define CONFIG_MXC_USB_FLAGS (MXC_EHCI_INTERFACE_DIFF_UNI \| \
	257	MXC_EHCI_POWER_PINS_ENABLED \| \
	258	MXC_EHCI_OC_PIN_ACTIVE_LOW)
	259	#define CONFIG_MXC_USB_PORTSC (MXC_EHCI_UTMI_16BIT \| MXC_EHCI_MODE_UTMI)
	260
3292539e SB	261	/* mmc driver */
	262	#define CONFIG_MMC
	263	#define CONFIG_GENERIC_MMC
	264	#define CONFIG_FSL_ESDHC
	265	#define CONFIG_SYS_FSL_ESDHC_ADDR 0
	266	#define CONFIG_SYS_FSL_ESDHC_NUM 1
	267
eae4988b SB	268	/*
	269	* Default environment and default scripts
	270	* to update uboot and load kernel
	271	*/
eae4988b SB	272
	273	#define CONFIG_HOSTNAME "mx35pdk"
	274	#define CONFIG_EXTRA_ENV_SETTINGS \
	275	"netdev=eth1\0" \
	276	"ethprime=smc911x\0" \
	277	"nfsargs=setenv bootargs root=/dev/nfs rw " \
	278	"nfsroot=${serverip}:${rootpath}\0" \
	279	"ramargs=setenv bootargs root=/dev/ram rw\0" \
	280	"addip_sta=setenv bootargs ${bootargs} " \
	281	"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
	282	":${hostname}:${netdev}:off panic=1\0" \
	283	"addip_dyn=setenv bootargs ${bootargs} ip=dhcp\0" \
	284	"addip=if test -n ${ipdyn};then run addip_dyn;" \
93ea89f0	285	"else run addip_sta;fi\0" \
eae4988b SB	286	"addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
	287	"addtty=setenv bootargs ${bootargs}" \
	288	" console=ttymxc0,${baudrate}\0" \
	289	"addmisc=setenv bootargs ${bootargs} ${misc}\0" \
	290	"loadaddr=80800000\0" \
	291	"kernel_addr_r=80800000\0" \
93ea89f0 MV	292	"hostname=" __stringify(CONFIG_HOSTNAME) "\0" \
	293	"bootfile=" __stringify(CONFIG_HOSTNAME) "/uImage\0" \
	294	"ramdisk_file=" __stringify(CONFIG_HOSTNAME) "/uRamdisk\0" \
eae4988b SB	295	"flash_self=run ramargs addip addtty addmtd addmisc;" \
	296	"bootm ${kernel_addr} ${ramdisk_addr}\0" \
	297	"flash_nfs=run nfsargs addip addtty addmtd addmisc;" \
	298	"bootm ${kernel_addr}\0" \
	299	"net_nfs=tftp ${kernel_addr_r} ${bootfile}; " \
	300	"run nfsargs addip addtty addmtd addmisc;" \
	301	"bootm ${kernel_addr_r}\0" \
	302	"net_self_load=tftp ${kernel_addr_r} ${bootfile};" \
	303	"tftp ${ramdisk_addr_r} ${ramdisk_file};\0" \
93ea89f0	304	"u-boot=" __stringify(CONFIG_HOSTNAME) "/u-boot.bin\0" \
eae4988b	305	"load=tftp ${loadaddr} ${u-boot}\0" \
93ea89f0	306	"uboot_addr=" __stringify(CONFIG_SYS_MONITOR_BASE) "\0" \
3292539e SB	307	"update=protect off ${uboot_addr} +80000;" \
3292539e SB	308	"erase ${uboot_addr} +80000;" \
eae4988b SB	309	"cp.b ${loadaddr} ${uboot_addr} ${filesize}\0" \
	310	"upd=if run load;then echo Updating u-boot;if run update;" \
	311	"then echo U-Boot updated;" \
	312	"else echo Error updating u-boot !;" \
	313	"echo Board without bootloader !!;" \
	314	"fi;" \
	315	"else echo U-Boot not downloaded..exiting;fi\0" \
	316	"bootcmd=run net_nfs\0"
	317
	318	#endif /* __CONFIG_H */