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dd84058d
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1menu "ARM architecture"
2 depends on ARM
3
4config SYS_ARCH
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5 default "arm"
6
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7config ARM64
8 bool
bb6b142f 9 select PHYS_64BIT
067716ba 10 select SYS_CACHE_SHIFT_6
016a954e 11
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12if ARM64
13config POSITION_INDEPENDENT
14 bool "Generate position-independent pre-relocation code"
15 help
16 U-Boot expects to be linked to a specific hard-coded address, and to
17 be loaded to and run from that address. This option lifts that
18 restriction, thus allowing the code to be loaded to and executed
19 from almost any address. This logic relies on the relocation
20 information that is embedded into the binary to support U-Boot
21 relocating itself to the top-of-RAM later during execution.
e6c90448
SW
22
23config SYS_INIT_SP_BSS_OFFSET
24 int
25 help
26 U-Boot typically uses a hard-coded value for the stack pointer
27 before relocation. Define this option to instead calculate the
28 initial SP at run-time. This is useful to avoid hard-coding addresses
29 into U-Boot, so that can be loaded and executed at arbitrary
30 addresses and thus avoid using arbitrary addresses at runtime. This
31 option's value is the offset added to &_bss_start in order to
32 calculate the stack pointer. This offset should be large enough so
33 that the early malloc region, global data (gd), and early stack usage
34 do not overlap any appended DTB.
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35
36config LINUX_KERNEL_IMAGE_HEADER
37 bool
38 help
39 Place a Linux kernel image header at the start of the U-Boot binary.
40 The format of the header is described in the Linux kernel source at
41 Documentation/arm64/booting.txt. This feature is useful since the
42 image header reports the amount of memory (BSS and similar) that
43 U-Boot needs to use, but which isn't part of the binary.
44
45if LINUX_KERNEL_IMAGE_HEADER
46config LNX_KRNL_IMG_TEXT_OFFSET_BASE
47 hex
48 help
49 The value subtracted from CONFIG_SYS_TEXT_BASE to calculate the
50 TEXT_OFFSET value written in to the Linux kernel image header.
51endif
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52endif
53
54config STATIC_RELA
55 bool
56 default y if ARM64 && !POSITION_INDEPENDENT
57
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58config DMA_ADDR_T_64BIT
59 bool
60 default y if ARM64
61
2e07c249 62config HAS_VBAR
e009bfa4 63 bool
2e07c249 64
62e92077 65config HAS_THUMB2
e009bfa4 66 bool
62e92077 67
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PE
68# Used for compatibility with asm files copied from the kernel
69config ARM_ASM_UNIFIED
70 bool
71 default y
72
73# Used for compatibility with asm files copied from the kernel
74config THUMB2_KERNEL
75 bool
76
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77config SYS_ICACHE_OFF
78 bool "Do not enable icache"
79 default n
80 help
81 Do not enable instruction cache in U-Boot.
82
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83config SPL_SYS_ICACHE_OFF
84 bool "Do not enable icache in SPL"
85 depends on SPL
86 default SYS_ICACHE_OFF
87 help
88 Do not enable instruction cache in SPL.
89
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TW
90config SYS_DCACHE_OFF
91 bool "Do not enable dcache"
92 default n
93 help
94 Do not enable data cache in U-Boot.
95
10015025
TW
96config SPL_SYS_DCACHE_OFF
97 bool "Do not enable dcache in SPL"
98 depends on SPL
99 default SYS_DCACHE_OFF
100 help
101 Do not enable data cache in SPL.
102
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103config SYS_ARM_CACHE_CP15
104 bool "CP15 based cache enabling support"
105 help
106 Select this if your processor suports enabling caches by using
107 CP15 registers.
108
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109config SYS_ARM_MMU
110 bool "MMU-based Paged Memory Management Support"
f4bcd767 111 select SYS_ARM_CACHE_CP15
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112 help
113 Select if you want MMU-based virtualised addressing space
114 support by paged memory management.
115
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116config SYS_ARM_MPU
117 bool 'Use the ARM v7 PMSA Compliant MPU'
118 help
119 Some ARM systems without an MMU have instead a Memory Protection
120 Unit (MPU) that defines the type and permissions for regions of
121 memory.
122 If your CPU has an MPU then you should choose 'y' here unless you
123 know that you do not want to use the MPU.
124
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125# If set, the workarounds for these ARM errata are applied early during U-Boot
126# startup. Note that in general these options force the workarounds to be
127# applied; no CPU-type/version detection exists, unlike the similar options in
128# the Linux kernel. Do not set these options unless they apply! Also note that
129# the following can be machine specific errata. These do have ability to
130# provide rudimentary version and machine specific checks, but expect no
131# product checks:
132# CONFIG_ARM_ERRATA_430973
133# CONFIG_ARM_ERRATA_454179
134# CONFIG_ARM_ERRATA_621766
135# CONFIG_ARM_ERRATA_798870
136# CONFIG_ARM_ERRATA_801819
7b37a9c7 137# CONFIG_ARM_CORTEX_A8_CVE_2017_5715
c2ca3fdf 138# CONFIG_ARM_CORTEX_A15_CVE_2017_5715
7b37a9c7 139
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140config ARM_ERRATA_430973
141 bool
142
143config ARM_ERRATA_454179
144 bool
145
146config ARM_ERRATA_621766
147 bool
148
149config ARM_ERRATA_716044
150 bool
151
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152config ARM_ERRATA_725233
153 bool
154
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155config ARM_ERRATA_742230
156 bool
157
158config ARM_ERRATA_743622
159 bool
160
161config ARM_ERRATA_751472
162 bool
163
164config ARM_ERRATA_761320
165 bool
166
167config ARM_ERRATA_773022
168 bool
169
170config ARM_ERRATA_774769
171 bool
172
173config ARM_ERRATA_794072
174 bool
175
176config ARM_ERRATA_798870
177 bool
178
179config ARM_ERRATA_801819
180 bool
181
182config ARM_ERRATA_826974
183 bool
184
185config ARM_ERRATA_828024
186 bool
187
188config ARM_ERRATA_829520
189 bool
190
191config ARM_ERRATA_833069
192 bool
193
194config ARM_ERRATA_833471
195 bool
196
11d94319 197config ARM_ERRATA_845369
6e7bdde4 198 bool
11d94319 199
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200config ARM_ERRATA_852421
201 bool
202
203config ARM_ERRATA_852423
204 bool
205
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206config ARM_ERRATA_855873
207 bool
208
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NM
209config ARM_CORTEX_A8_CVE_2017_5715
210 bool
211
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NM
212config ARM_CORTEX_A15_CVE_2017_5715
213 bool
214
2e07c249 215config CPU_ARM720T
e009bfa4 216 bool
067716ba 217 select SYS_CACHE_SHIFT_5
7240b80e 218 imply SYS_ARM_MMU
2e07c249
GS
219
220config CPU_ARM920T
e009bfa4 221 bool
067716ba 222 select SYS_CACHE_SHIFT_5
7240b80e 223 imply SYS_ARM_MMU
2e07c249
GS
224
225config CPU_ARM926EJS
e009bfa4 226 bool
067716ba 227 select SYS_CACHE_SHIFT_5
7240b80e 228 imply SYS_ARM_MMU
2e07c249
GS
229
230config CPU_ARM946ES
e009bfa4 231 bool
067716ba 232 select SYS_CACHE_SHIFT_5
7240b80e 233 imply SYS_ARM_MMU
2e07c249
GS
234
235config CPU_ARM1136
e009bfa4 236 bool
067716ba 237 select SYS_CACHE_SHIFT_5
7240b80e 238 imply SYS_ARM_MMU
2e07c249
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239
240config CPU_ARM1176
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241 bool
242 select HAS_VBAR
067716ba 243 select SYS_CACHE_SHIFT_5
7240b80e 244 imply SYS_ARM_MMU
2e07c249 245
acf15001 246config CPU_V7A
e009bfa4 247 bool
e009bfa4 248 select HAS_THUMB2
5ed063d1 249 select HAS_VBAR
067716ba 250 select SYS_CACHE_SHIFT_6
7240b80e 251 imply SYS_ARM_MMU
2e07c249 252
12d8a729 253config CPU_V7M
254 bool
e009bfa4 255 select HAS_THUMB2
f2ef2043 256 select SYS_ARM_MPU
5ed063d1 257 select SYS_CACHE_SHIFT_5
ea37f0b3 258 select SYS_THUMB_BUILD
5ed063d1 259 select THUMB2_KERNEL
12d8a729 260
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261config CPU_V7R
262 bool
263 select HAS_THUMB2
f2ef2043 264 select SYS_ARM_CACHE_CP15
5ed063d1
MS
265 select SYS_ARM_MPU
266 select SYS_CACHE_SHIFT_6
4bbd6b1d 267
2e07c249 268config CPU_PXA
e009bfa4 269 bool
067716ba 270 select SYS_CACHE_SHIFT_5
7240b80e 271 imply SYS_ARM_MMU
2e07c249
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272
273config CPU_SA1100
e009bfa4 274 bool
067716ba 275 select SYS_CACHE_SHIFT_5
7240b80e 276 imply SYS_ARM_MMU
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277
278config SYS_CPU
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279 default "arm720t" if CPU_ARM720T
280 default "arm920t" if CPU_ARM920T
281 default "arm926ejs" if CPU_ARM926EJS
282 default "arm946es" if CPU_ARM946ES
283 default "arm1136" if CPU_ARM1136
284 default "arm1176" if CPU_ARM1176
acf15001 285 default "armv7" if CPU_V7A
4bbd6b1d 286 default "armv7" if CPU_V7R
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287 default "armv7m" if CPU_V7M
288 default "pxa" if CPU_PXA
289 default "sa1100" if CPU_SA1100
01541eec 290 default "armv8" if ARM64
2e07c249 291
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292config SYS_ARM_ARCH
293 int
294 default 4 if CPU_ARM720T
295 default 4 if CPU_ARM920T
296 default 5 if CPU_ARM926EJS
297 default 5 if CPU_ARM946ES
298 default 6 if CPU_ARM1136
299 default 6 if CPU_ARM1176
acf15001 300 default 7 if CPU_V7A
66020a67 301 default 7 if CPU_V7M
4bbd6b1d 302 default 7 if CPU_V7R
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MV
303 default 5 if CPU_PXA
304 default 4 if CPU_SA1100
305 default 8 if ARM64
306
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307config SYS_CACHE_SHIFT_5
308 bool
309
310config SYS_CACHE_SHIFT_6
311 bool
312
313config SYS_CACHE_SHIFT_7
314 bool
315
316config SYS_CACHELINE_SIZE
317 int
318 default 128 if SYS_CACHE_SHIFT_7
319 default 64 if SYS_CACHE_SHIFT_6
320 default 32 if SYS_CACHE_SHIFT_5
321
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322config SYS_ARCH_TIMER
323 bool "ARM Generic Timer support"
acf15001 324 depends on CPU_V7A || ARM64
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325 default y if ARM64
326 help
327 The ARM Generic Timer (aka arch-timer) provides an architected
328 interface to a timer source on an SoC.
329 It is mandantory for ARMv8 implementation and widely available
330 on ARMv7 systems.
331
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332config ARM_SMCCC
333 bool "Support for ARM SMC Calling Convention (SMCCC)"
acf15001 334 depends on CPU_V7A || ARM64
573a3811 335 select ARM_PSCI_FW
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MY
336 help
337 Say Y here if you want to enable ARM SMC Calling Convention.
338 This should be enabled if U-Boot needs to communicate with system
339 firmware (for example, PSCI) according to SMCCC.
340
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LW
341config SEMIHOSTING
342 bool "support boot from semihosting"
343 help
344 In emulated environments, semihosting is a way for
345 the hosted environment to call out to the emulator to
346 retrieve files from the host machine.
347
3a649407
TR
348config SYS_THUMB_BUILD
349 bool "Build U-Boot using the Thumb instruction set"
350 depends on !ARM64
351 help
352 Use this flag to build U-Boot using the Thumb instruction set for
353 ARM architectures. Thumb instruction set provides better code
354 density. For ARM architectures that support Thumb2 this flag will
355 result in Thumb2 code generated by GCC.
356
357config SPL_SYS_THUMB_BUILD
358 bool "Build SPL using the Thumb instruction set"
359 default y if SYS_THUMB_BUILD
360 depends on !ARM64
361 help
362 Use this flag to build SPL using the Thumb instruction set for
363 ARM architectures. Thumb instruction set provides better code
364 density. For ARM architectures that support Thumb2 this flag will
365 result in Thumb2 code generated by GCC.
366
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367config TPL_SYS_THUMB_BUILD
368 bool "Build TPL using the Thumb instruction set"
369 default y if SYS_THUMB_BUILD
370 depends on TPL && !ARM64
371 help
372 Use this flag to build SPL using the Thumb instruction set for
373 ARM architectures. Thumb instruction set provides better code
374 density. For ARM architectures that support Thumb2 this flag will
375 result in Thumb2 code generated by GCC.
376
377
f3e9bec8
PF
378config SYS_L2CACHE_OFF
379 bool "L2cache off"
380 help
381 If SoC does not support L2CACHE or one do not want to enable
382 L2CACHE, choose this option.
383
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AP
384config ENABLE_ARM_SOC_BOOT0_HOOK
385 bool "prepare BOOT0 header"
386 help
387 If the SoC's BOOT0 requires a header area filled with (magic)
7d531e8a
SG
388 values, then choose this option, and create a file included as
389 <asm/arch/boot0.h> which contains the required assembler code.
cdaa633f 390
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AP
391config ARM_CORTEX_CPU_IS_UP
392 bool
393 default n
394
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FE
395config USE_ARCH_MEMCPY
396 bool "Use an assembly optimized implementation of memcpy"
40d5534c
TR
397 default y
398 depends on !ARM64
399 help
400 Enable the generation of an optimized version of memcpy.
401 Such implementation may be faster under some conditions
402 but may increase the binary size.
403
404config SPL_USE_ARCH_MEMCPY
f8136e68 405 bool "Use an assembly optimized implementation of memcpy for SPL"
40d5534c 406 default y if USE_ARCH_MEMCPY
085be482 407 depends on !ARM64
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FE
408 help
409 Enable the generation of an optimized version of memcpy.
410 Such implementation may be faster under some conditions
411 but may increase the binary size.
412
1e32c519
KY
413config TPL_USE_ARCH_MEMCPY
414 bool "Use an assembly optimized implementation of memcpy for TPL"
415 default y if USE_ARCH_MEMCPY
416 depends on !ARM64
417 help
418 Enable the generation of an optimized version of memcpy.
419 Such implementation may be faster under some conditions
420 but may increase the binary size.
421
be72591b
FE
422config USE_ARCH_MEMSET
423 bool "Use an assembly optimized implementation of memset"
40d5534c
TR
424 default y
425 depends on !ARM64
426 help
427 Enable the generation of an optimized version of memset.
428 Such implementation may be faster under some conditions
429 but may increase the binary size.
430
431config SPL_USE_ARCH_MEMSET
f8136e68 432 bool "Use an assembly optimized implementation of memset for SPL"
40d5534c 433 default y if USE_ARCH_MEMSET
085be482 434 depends on !ARM64
be72591b
FE
435 help
436 Enable the generation of an optimized version of memset.
437 Such implementation may be faster under some conditions
438 but may increase the binary size.
439
1e32c519
KY
440config TPL_USE_ARCH_MEMSET
441 bool "Use an assembly optimized implementation of memset for TPL"
442 default y if USE_ARCH_MEMSET
443 depends on !ARM64
444 help
445 Enable the generation of an optimized version of memset.
446 Such implementation may be faster under some conditions
447 but may increase the binary size.
448
ec6617c3
AW
449config ARM64_SUPPORT_AARCH32
450 bool "ARM64 system support AArch32 execution state"
451 default y if ARM64 && !TARGET_THUNDERX_88XX
452 help
453 This ARM64 system supports AArch32 execution state.
454
dd84058d
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455choice
456 prompt "Target select"
b928e658 457 default TARGET_HIKEY
dd84058d 458
4614b891
MY
459config ARCH_AT91
460 bool "Atmel AT91"
f58e9460 461 select SPL_BOARD_INIT if SPL && !TARGET_SMARTWEB
dd84058d
MY
462
463config TARGET_EDB93XX
464 bool "Support edb93xx"
2e07c249 465 select CPU_ARM920T
884f9013 466 select PL010_SERIAL
dd84058d 467
dd84058d
MY
468config TARGET_ASPENITE
469 bool "Support aspenite"
2e07c249 470 select CPU_ARM926EJS
dd84058d
MY
471
472config TARGET_GPLUGD
473 bool "Support gplugd"
2e07c249 474 select CPU_ARM926EJS
dd84058d 475
3491ba63
MY
476config ARCH_DAVINCI
477 bool "TI DaVinci"
2e07c249 478 select CPU_ARM926EJS
15dc63d6 479 imply CMD_SAVES
3491ba63
MY
480 help
481 Support for TI's DaVinci platform.
dd84058d 482
47539e23
MY
483config KIRKWOOD
484 bool "Marvell Kirkwood"
4585601a 485 select ARCH_MISC_INIT
5ed063d1
MS
486 select BOARD_EARLY_INIT_F
487 select CPU_ARM926EJS
dd84058d 488
c3d89140 489config ARCH_MVEBU
21b29fc6 490 bool "Marvell MVEBU family (Armada XP/375/38x/3700/7K/8K)"
9cffb233 491 select DM
e3b9c98a 492 select DM_ETH
1d51ea19 493 select DM_SERIAL
09a54c00
SR
494 select DM_SPI
495 select DM_SPI_FLASH
5ed063d1
MS
496 select OF_CONTROL
497 select OF_SEPARATE
f1b1f770 498 select SPI
08a00cba 499 imply CMD_DM
a4884831 500
dd84058d
MY
501config TARGET_APF27
502 bool "Support apf27"
2e07c249 503 select CPU_ARM926EJS
02627356 504 select SUPPORT_SPL
dd84058d 505
22f2be7a
MY
506config ORION5X
507 bool "Marvell Orion"
2e07c249 508 select CPU_ARM926EJS
dd84058d 509
dd84058d
MY
510config TARGET_SPEAR300
511 bool "Support spear300"
a5d67547 512 select BOARD_EARLY_INIT_F
5ed063d1 513 select CPU_ARM926EJS
d10fc50f 514 select PL011_SERIAL
5ed063d1 515 imply CMD_SAVES
dd84058d
MY
516
517config TARGET_SPEAR310
518 bool "Support spear310"
a5d67547 519 select BOARD_EARLY_INIT_F
5ed063d1 520 select CPU_ARM926EJS
d10fc50f 521 select PL011_SERIAL
5ed063d1 522 imply CMD_SAVES
dd84058d
MY
523
524config TARGET_SPEAR320
525 bool "Support spear320"
a5d67547 526 select BOARD_EARLY_INIT_F
5ed063d1 527 select CPU_ARM926EJS
d10fc50f 528 select PL011_SERIAL
5ed063d1 529 imply CMD_SAVES
dd84058d
MY
530
531config TARGET_SPEAR600
532 bool "Support spear600"
a5d67547 533 select BOARD_EARLY_INIT_F
5ed063d1 534 select CPU_ARM926EJS
d10fc50f 535 select PL011_SERIAL
5ed063d1 536 imply CMD_SAVES
dd84058d 537
9fa32b12
VM
538config TARGET_STV0991
539 bool "Support stv0991"
acf15001 540 select CPU_V7A
cac0ca76
MY
541 select DM
542 select DM_SERIAL
e67abcaa
VM
543 select DM_SPI
544 select DM_SPI_FLASH
5ed063d1 545 select PL01X_SERIAL
f1b1f770 546 select SPI
e67abcaa 547 select SPI_FLASH
08a00cba 548 imply CMD_DM
9fa32b12 549
dd84058d
MY
550config TARGET_X600
551 bool "Support x600"
e5ec4815 552 select BOARD_LATE_INIT
2e07c249 553 select CPU_ARM926EJS
d10fc50f 554 select PL011_SERIAL
5ed063d1 555 select SUPPORT_SPL
dd84058d 556
dd84058d
MY
557config TARGET_WOODBURN
558 bool "Support woodburn"
2e07c249 559 select CPU_ARM1136
dd84058d
MY
560
561config TARGET_WOODBURN_SD
562 bool "Support woodburn_sd"
2e07c249 563 select CPU_ARM1136
02627356 564 select SUPPORT_SPL
dd84058d
MY
565
566config TARGET_FLEA3
567 bool "Support flea3"
2e07c249 568 select CPU_ARM1136
dd84058d
MY
569
570config TARGET_MX35PDK
571 bool "Support mx35pdk"
e5ec4815 572 select BOARD_LATE_INIT
2e07c249 573 select CPU_ARM1136
dd84058d 574
ddf6bd48
MY
575config ARCH_BCM283X
576 bool "Broadcom BCM283X family"
58d423b8 577 select DM
58d423b8 578 select DM_GPIO
5ed063d1 579 select DM_SERIAL
76709096 580 select OF_CONTROL
cf2c7784 581 select PL01X_SERIAL
ae5326a6 582 select SERIAL_SEARCH_ALL
08a00cba 583 imply CMD_DM
91d27a17 584 imply FAT_WRITE
46414296 585
ea1a7de5
PR
586config ARCH_BCM63158
587 bool "Broadcom BCM63158 family"
588 select DM
589 select OF_CONTROL
590 imply CMD_DM
591
40b59b05
PR
592config ARCH_BCM6858
593 bool "Broadcom BCM6858 family"
594 select DM
595 select OF_CONTROL
596 imply CMD_DM
597
dd84058d
MY
598config TARGET_VEXPRESS_CA15_TC2
599 bool "Support vexpress_ca15_tc2"
acf15001 600 select CPU_V7A
ea624e19
HG
601 select CPU_V7_HAS_NONSEC
602 select CPU_V7_HAS_VIRT
d10fc50f 603 select PL011_SERIAL
dd84058d 604
894c3ad2
TF
605config ARCH_BCMSTB
606 bool "Broadcom BCM7XXX family"
607 select CPU_V7A
608 select DM
609 select OF_CONTROL
610 select OF_PRIOR_STAGE
08a00cba 611 imply CMD_DM
894c3ad2
TF
612 help
613 This enables support for Broadcom ARM-based set-top box
614 chipsets, including the 7445 family of chips.
615
dd84058d
MY
616config TARGET_VEXPRESS_CA5X2
617 bool "Support vexpress_ca5x2"
acf15001 618 select CPU_V7A
d10fc50f 619 select PL011_SERIAL
dd84058d
MY
620
621config TARGET_VEXPRESS_CA9X4
622 bool "Support vexpress_ca9x4"
acf15001 623 select CPU_V7A
d10fc50f 624 select PL011_SERIAL
dd84058d 625
43486e4c
SR
626config TARGET_BCM23550_W1D
627 bool "Support bcm23550_w1d"
acf15001 628 select CPU_V7A
221a949e 629 imply CRC32_VERIFY
91d27a17 630 imply FAT_WRITE
43486e4c 631
dd84058d
MY
632config TARGET_BCM28155_AP
633 bool "Support bcm28155_ap"
acf15001 634 select CPU_V7A
221a949e 635 imply CRC32_VERIFY
91d27a17 636 imply FAT_WRITE
dd84058d 637
abb1678c
SR
638config TARGET_BCMCYGNUS
639 bool "Support bcmcygnus"
acf15001 640 select CPU_V7A
5ed063d1
MS
641 imply BCM_SF2_ETH
642 imply BCM_SF2_ETH_GMAC
551c3934 643 imply CMD_HASH
5ed063d1 644 imply CRC32_VERIFY
91d27a17 645 imply FAT_WRITE
221a949e 646 imply HASH_VERIFY
c89782dc 647 imply NETDEVICES
9dec5270 648
abb1678c
SR
649config TARGET_BCMNSP
650 bool "Support bcmnsp"
acf15001 651 select CPU_V7A
9dec5270 652
274bced8
JM
653config TARGET_BCMNS2
654 bool "Support Broadcom Northstar2"
655 select ARM64
656 help
657 Support for Broadcom Northstar 2 SoCs. NS2 is a quad-core 64-bit
658 ARMv8 Cortex-A57 processors targeting a broad range of networking
659 applications
660
72df68cc
MY
661config ARCH_EXYNOS
662 bool "Samsung EXYNOS"
58d423b8 663 select DM
5ed063d1 664 select DM_GPIO
fc47cf9d 665 select DM_I2C
5ed063d1 666 select DM_KEYBOARD
58d423b8
MY
667 select DM_SERIAL
668 select DM_SPI
5ed063d1 669 select DM_SPI_FLASH
f1b1f770 670 select SPI
c96d9036 671 imply SYS_THUMB_BUILD
08a00cba 672 imply CMD_DM
91d27a17 673 imply FAT_WRITE
dd84058d 674
311757be
SG
675config ARCH_S5PC1XX
676 bool "Samsung S5PC1XX"
acf15001 677 select CPU_V7A
58d423b8 678 select DM
58d423b8 679 select DM_GPIO
08848e9c 680 select DM_I2C
5ed063d1 681 select DM_SERIAL
08a00cba 682 imply CMD_DM
311757be 683
ef2b694c
MY
684config ARCH_HIGHBANK
685 bool "Calxeda Highbank"
acf15001 686 select CPU_V7A
d10fc50f 687 select PL011_SERIAL
dd84058d 688
5cbbd9bd
MY
689config ARCH_INTEGRATOR
690 bool "ARM Ltd. Integrator family"
3f394e70
LW
691 select DM
692 select DM_SERIAL
cf2c7784 693 select PL01X_SERIAL
08a00cba 694 imply CMD_DM
5cbbd9bd 695
c338f09e
MY
696config ARCH_KEYSTONE
697 bool "TI Keystone"
5ed063d1 698 select CMD_POWEROFF
acf15001 699 select CPU_V7A
02627356 700 select SUPPORT_SPL
7842b6a9 701 select SYS_ARCH_TIMER
5ed063d1 702 select SYS_THUMB_BUILD
d56b4b19 703 imply CMD_MTDPARTS
15dc63d6 704 imply CMD_SAVES
5ed063d1 705 imply FIT
dd84058d 706
586bde93
LV
707config ARCH_K3
708 bool "Texas Instruments' K3 Architecture"
709 select SPL
710 select SUPPORT_SPL
711 select FIT
712
a93fbf4a
MY
713config ARCH_OMAP2PLUS
714 bool "TI OMAP2+"
acf15001 715 select CPU_V7A
0680f1b1 716 select SPL_BOARD_INIT if SPL
ff6c3125 717 select SPL_STACK_R if SPL
a93fbf4a
MY
718 select SUPPORT_SPL
719 imply FIT
720
bfcef28a
BG
721config ARCH_MESON
722 bool "Amlogic Meson"
7325f6cf 723 imply DISTRO_DEFAULTS
bfcef28a
BG
724 help
725 Support for the Meson SoC family developed by Amlogic Inc.,
726 targeted at media players and tablet computers. We currently
727 support the S905 (GXBaby) 64-bit SoC.
728
cbd2fba1
RL
729config ARCH_MEDIATEK
730 bool "MediaTek SoCs"
731 select BINMAN
732 select DM
733 select OF_CONTROL
734 select SPL_DM if SPL
735 select SPL_LIBCOMMON_SUPPORT if SPL
736 select SPL_LIBGENERIC_SUPPORT if SPL
737 select SPL_OF_CONTROL if SPL
738 select SUPPORT_SPL
739 help
740 Support for the MediaTek SoCs family developed by MediaTek Inc.
741 Please refer to doc/README.mediatek for more information.
742
ee54dfea
VZ
743config ARCH_LPC32XX
744 bool "NXP LPC32xx platform"
745 select CPU_ARM926EJS
746 select DM
747 select DM_GPIO
748 select DM_SERIAL
749 select SPL_DM if SPL
750 select SUPPORT_SPL
751 imply CMD_DM
752
b2b8b9be
PF
753config ARCH_IMX8
754 bool "NXP i.MX8 platform"
755 select ARM64
756 select DM
757 select OF_CONTROL
758
cd357ad1 759config ARCH_IMX8M
7a7391fd
PF
760 bool "NXP i.MX8M platform"
761 select ARM64
762 select DM
763 select SUPPORT_SPL
08a00cba 764 imply CMD_DM
7a7391fd 765
c5343d4e
SA
766config ARCH_MX23
767 bool "NXP i.MX23 family"
768 select CPU_ARM926EJS
769 select PL011_SERIAL
770 select SUPPORT_SPL
771
07df697e
FE
772config ARCH_MX25
773 bool "NXP MX25"
774 select CPU_ARM926EJS
8bbff6a7 775 imply MXC_GPIO
07df697e 776
25c5b4e1
SA
777config ARCH_MX28
778 bool "NXP i.MX28 family"
779 select CPU_ARM926EJS
780 select PL011_SERIAL
781 select SUPPORT_SPL
782
3159ec64
ML
783config ARCH_MX31
784 bool "NXP i.MX31 family"
785 select CPU_ARM1136
786
e90a08da 787config ARCH_MX7ULP
6e7bdde4 788 bool "NXP MX7ULP"
acf15001 789 select CPU_V7A
e90a08da 790 select ROM_UNIFIED_SECTIONS
8bbff6a7 791 imply MXC_GPIO
e90a08da 792
1a8150d4
AA
793config ARCH_MX7
794 bool "Freescale MX7"
5ed063d1
MS
795 select ARCH_MISC_INIT
796 select BOARD_EARLY_INIT_F
acf15001 797 select CPU_V7A
2c2e2c9e
YS
798 select SYS_FSL_HAS_SEC if SECURE_BOOT
799 select SYS_FSL_SEC_COMPAT_4
90b80386 800 select SYS_FSL_SEC_LE
8bbff6a7 801 imply MXC_GPIO
1a8150d4 802
89ebc821
BB
803config ARCH_MX6
804 bool "Freescale MX6"
acf15001 805 select CPU_V7A
2c2e2c9e
YS
806 select SYS_FSL_HAS_SEC if SECURE_BOOT
807 select SYS_FSL_SEC_COMPAT_4
90b80386 808 select SYS_FSL_SEC_LE
3a649407 809 select SYS_THUMB_BUILD if SPL
8bbff6a7 810 imply MXC_GPIO
89ebc821 811
b529993e
PT
812if ARCH_MX6
813config SPL_LDSCRIPT
6e7bdde4 814 default "arch/arm/mach-omap2/u-boot-spl.lds"
b529993e
PT
815endif
816
424ee3d1
AR
817config ARCH_MX5
818 bool "Freescale MX5"
a5d67547 819 select BOARD_EARLY_INIT_F
5ed063d1 820 select CPU_V7A
8bbff6a7 821 imply MXC_GPIO
424ee3d1 822
97775d26
MS
823config ARCH_OWL
824 bool "Actions Semi OWL SoCs"
825 select ARM64
826 select DM
827 select DM_SERIAL
828 select OF_CONTROL
08a00cba 829 imply CMD_DM
97775d26 830
32f11829
TT
831config ARCH_QEMU
832 bool "QEMU Virtual Platform"
32f11829
TT
833 select DM
834 select DM_SERIAL
835 select OF_CONTROL
cf2c7784 836 select PL01X_SERIAL
08a00cba 837 imply CMD_DM
a47c1b5b
AT
838 imply DM_RTC
839 imply RTC_PL031
32f11829 840
1cc95f6e 841config ARCH_RMOBILE
f40b9898 842 bool "Renesas ARM SoCs"
35295964 843 select BOARD_EARLY_INIT_F if !RZA1
1cc95f6e
NI
844 select DM
845 select DM_SERIAL
08a00cba 846 imply CMD_DM
91d27a17 847 imply FAT_WRITE
3a649407 848 imply SYS_THUMB_BUILD
00e4b57e 849 imply ARCH_MISC_INIT if DISPLAY_CPUINFO
dd84058d 850
9702ec00
EP
851config TARGET_S32V234EVB
852 bool "Support s32v234evb"
853 select ARM64
c01e4a1a 854 select SYS_FSL_ERRATUM_ESDHC111
9702ec00 855
08592136
MK
856config ARCH_SNAPDRAGON
857 bool "Qualcomm Snapdragon SoCs"
858 select ARM64
859 select DM
860 select DM_GPIO
861 select DM_SERIAL
5ed063d1 862 select MSM_SMEM
08592136
MK
863 select OF_CONTROL
864 select OF_SEPARATE
654dd4a8 865 select SMEM
5ed063d1 866 select SPMI
08a00cba 867 imply CMD_DM
08592136 868
7865f4b0
MY
869config ARCH_SOCFPGA
870 bool "Altera SOCFPGA family"
48befc00 871 select ARCH_EARLY_INIT_R
d6a61da4 872 select ARCH_MISC_INIT if !TARGET_SOCFPGA_ARRIA10
5ed063d1 873 select ARM64 if TARGET_SOCFPGA_STRATIX10
a684729a 874 select CPU_V7A if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
1d9aa3e5 875 select DM
73172753 876 select DM_SERIAL
a684729a 877 select ENABLE_ARM_SOC_BOOT0_HOOK if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
48befc00 878 select OF_CONTROL
00057eea 879 select SPL_DM_RESET if DM_RESET
5ed063d1 880 select SPL_DM_SERIAL
48befc00 881 select SPL_LIBCOMMON_SUPPORT
48befc00 882 select SPL_LIBGENERIC_SUPPORT
48befc00
MV
883 select SPL_NAND_SUPPORT if SPL_NAND_DENALI
884 select SPL_OF_CONTROL
5ed063d1 885 select SPL_SEPARATE_BSS if TARGET_SOCFPGA_STRATIX10
48befc00 886 select SPL_SERIAL_SUPPORT
48befc00
MV
887 select SPL_WATCHDOG_SUPPORT
888 select SUPPORT_SPL
73172753 889 select SYS_NS16550
a684729a 890 select SYS_THUMB_BUILD if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
08a00cba 891 imply CMD_DM
d56b4b19 892 imply CMD_MTDPARTS
221a949e 893 imply CRC32_VERIFY
fef4a545
SG
894 imply DM_SPI
895 imply DM_SPI_FLASH
91d27a17 896 imply FAT_WRITE
aef44283
SG
897 imply SPL
898 imply SPL_DM
a9024dc1
SG
899 imply SPL_LIBDISK_SUPPORT
900 imply SPL_MMC_SUPPORT
fef4a545 901 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
f48db4ed 902 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE
a9024dc1
SG
903 imply SPL_SPI_FLASH_SUPPORT
904 imply SPL_SPI_SUPPORT
aaa64803 905 imply L2X0_CACHE
dd84058d 906
2c7e3b90
IC
907config ARCH_SUNXI
908 bool "Support sunxi (Allwinner) SoCs"
d6a0c78a 909 select BINMAN
88bb800d 910 select CMD_GPIO
0878a8a7 911 select CMD_MMC if MMC
2997ee50 912 select CMD_USB if DISTRO_DEFAULTS
e236ff0a 913 select CLK
b6006baf 914 select DM
45368827 915 select DM_ETH
211d57a4
HG
916 select DM_GPIO
917 select DM_KEYBOARD
bb3362b0
JT
918 select DM_MMC if MMC
919 select DM_SCSI if SCSI
45368827 920 select DM_SERIAL
2997ee50 921 select DM_USB if DISTRO_DEFAULTS
d75111a7 922 select OF_BOARD_SETUP
b6006baf
HG
923 select OF_CONTROL
924 select OF_SEPARATE
6f6b7cfa 925 select SPECIFY_CONSOLE_INDEX
ab43de80
TR
926 select SPL_STACK_R if SPL
927 select SPL_SYS_MALLOC_SIMPLE if SPL
3a649407 928 select SPL_SYS_THUMB_BUILD if !ARM64
5ed063d1 929 select SYS_NS16550
ce2e44d8 930 select SYS_THUMB_BUILD if !ARM64
2997ee50 931 select USB if DISTRO_DEFAULTS
2997ee50 932 select USB_KEYBOARD if DISTRO_DEFAULTS
5ed063d1 933 select USB_STORAGE if DISTRO_DEFAULTS
8c7d2296 934 select USE_TINY_PRINTF
08a00cba 935 imply CMD_DM
a12fb0e3 936 imply CMD_GPT
c6cca10b 937 imply CMD_UBI if NAND
7325f6cf 938 imply DISTRO_DEFAULTS
91d27a17 939 imply FAT_WRITE
2f13cf35 940 imply FIT
eff264d7 941 imply OF_LIBFDT_OVERLAY
af83a604
MY
942 imply PRE_CONSOLE_BUFFER
943 imply SPL_GPIO_SUPPORT
944 imply SPL_LIBCOMMON_SUPPORT
af83a604 945 imply SPL_LIBGENERIC_SUPPORT
4aa2ba3a 946 imply SPL_MMC_SUPPORT if MMC
af83a604
MY
947 imply SPL_POWER_SUPPORT
948 imply SPL_SERIAL_SUPPORT
654b02b1 949 imply USB_GADGET
8ebe4f42 950
ec48b6c9
MS
951config ARCH_VERSAL
952 bool "Support Xilinx Versal Platform"
953 select ARM64
954 select CLK
955 select DM
fa797157
MS
956 select DM_ETH if NET
957 select DM_MMC if MMC
ec48b6c9
MS
958 select DM_SERIAL
959 select OF_CONTROL
960
7966b437
SA
961config ARCH_VF610
962 bool "Freescale Vybrid"
acf15001 963 select CPU_V7A
c01e4a1a 964 select SYS_FSL_ERRATUM_ESDHC111
d56b4b19 965 imply CMD_MTDPARTS
5bbc265b 966 imply NAND
e7b860fa 967
5ca269a4 968config ARCH_ZYNQ
b8d4497f 969 bool "Xilinx Zynq based platform"
5ed063d1 970 select BOARD_EARLY_INIT_F if WDT
5ed063d1
MS
971 select CLK
972 select CLK_ZYNQ
acf15001 973 select CPU_V7A
8981f05c 974 select DM
c4a142f4 975 select DM_ETH if NET
c4a142f4 976 select DM_MMC if MMC
42800ffa 977 select DM_SERIAL
5ed063d1 978 select DM_SPI
9f7a4502 979 select DM_SPI_FLASH
dec49e86 980 select DM_USB if USB
5ed063d1 981 select OF_CONTROL
f1b1f770 982 select SPI
5ed063d1
MS
983 select SPL_BOARD_INIT if SPL
984 select SPL_CLK if SPL
985 select SPL_DM if SPL
986 select SPL_OF_CONTROL if SPL
987 select SPL_SEPARATE_BSS if SPL
988 select SUPPORT_SPL
989 imply ARCH_EARLY_INIT_R
8eb55e19 990 imply BOARD_LATE_INIT
d315628e 991 imply CMD_CLK
08a00cba 992 imply CMD_DM
72c3033f 993 imply CMD_SPL
5ed063d1 994 imply FAT_WRITE
dd84058d 995
1d6c54ec
MS
996config ARCH_ZYNQMP_R5
997 bool "Xilinx ZynqMP R5 based platform"
5ed063d1 998 select CLK
1d6c54ec 999 select CPU_V7R
1d6c54ec 1000 select DM
6f96fb50
MS
1001 select DM_ETH if NET
1002 select DM_MMC if MMC
1d6c54ec 1003 select DM_SERIAL
5ed063d1 1004 select OF_CONTROL
08a00cba 1005 imply CMD_DM
687ab545 1006 imply DM_USB_GADGET
1d6c54ec 1007
0b54a9dd 1008config ARCH_ZYNQMP
b8d4497f 1009 bool "Xilinx ZynqMP based platform"
84c7204b 1010 select ARM64
5ed063d1 1011 select CLK
c2490bf5 1012 select DM
fb693108
MS
1013 select DM_ETH if NET
1014 select DM_MMC if MMC
c2490bf5 1015 select DM_SERIAL
088f83ee
MS
1016 select DM_SPI if SPI
1017 select DM_SPI_FLASH if DM_SPI
5ed063d1
MS
1018 select DM_USB if USB
1019 select OF_CONTROL
0680f1b1 1020 select SPL_BOARD_INIT if SPL
2f03968e 1021 select SPL_CLK if SPL
850e7795 1022 select SPL_SEPARATE_BSS if SPL
5ed063d1 1023 select SUPPORT_SPL
8eb55e19 1024 imply BOARD_LATE_INIT
08a00cba 1025 imply CMD_DM
91d27a17 1026 imply FAT_WRITE
22270ca0 1027 imply MP
687ab545 1028 imply DM_USB_GADGET
84c7204b 1029
ddd960e6
MY
1030config TEGRA
1031 bool "NVIDIA Tegra"
7325f6cf 1032 imply DISTRO_DEFAULTS
91d27a17 1033 imply FAT_WRITE
dd84058d 1034
f91afc4d 1035config TARGET_VEXPRESS64_AEMV8A
dd84058d 1036 bool "Support vexpress_aemv8a"
016a954e 1037 select ARM64
cf2c7784 1038 select PL01X_SERIAL
dd84058d 1039
f91afc4d
LW
1040config TARGET_VEXPRESS64_BASE_FVP
1041 bool "Support Versatile Express ARMv8a FVP BASE model"
1042 select ARM64
cf2c7784 1043 select PL01X_SERIAL
5ed063d1 1044 select SEMIHOSTING
f91afc4d 1045
fc04b923
RH
1046config TARGET_VEXPRESS64_BASE_FVP_DRAM
1047 bool "Support Versatile Express ARMv8a FVP BASE model booting from DRAM"
1048 select ARM64
cf2c7784 1049 select PL01X_SERIAL
fc04b923
RH
1050 help
1051 This target is derived from TARGET_VEXPRESS64_BASE_FVP and over-rides
1052 the default config to allow the user to load the images directly into
1053 DRAM using model parameters rather than by using semi-hosting to load
1054 the files from the host filesystem.
1055
ffc10373
LW
1056config TARGET_VEXPRESS64_JUNO
1057 bool "Support Versatile Express Juno Development Platform"
1058 select ARM64
cf2c7784 1059 select PL01X_SERIAL
ffc10373 1060
44937214
PK
1061config TARGET_LS2080A_EMU
1062 bool "Support ls2080a_emu"
fb2bf8c2 1063 select ARCH_LS2080A
5ed063d1 1064 select ARCH_MISC_INIT
016a954e 1065 select ARM64
23b5877c 1066 select ARMV8_MULTIENTRY
32413125 1067 select FSL_DDR_SYNC_REFRESH
44937214
PK
1068 help
1069 Support for Freescale LS2080A_EMU platform
1070 The LS2080A Development System (EMULATOR) is a pre silicon
1071 development platform that supports the QorIQ LS2080A
1072 Layerscape Architecture processor.
dd84058d 1073
44937214
PK
1074config TARGET_LS2080A_SIMU
1075 bool "Support ls2080a_simu"
fb2bf8c2 1076 select ARCH_LS2080A
5ed063d1 1077 select ARCH_MISC_INIT
016a954e 1078 select ARM64
23b5877c 1079 select ARMV8_MULTIENTRY
44937214
PK
1080 help
1081 Support for Freescale LS2080A_SIMU platform
1082 The LS2080A Development System (QDS) is a pre silicon
1083 development platform that supports the QorIQ LS2080A
1084 Layerscape Architecture processor.
dd84058d 1085
7769776a
AK
1086config TARGET_LS1088AQDS
1087 bool "Support ls1088aqds"
1088 select ARCH_LS1088A
5ed063d1 1089 select ARCH_MISC_INIT
7769776a
AK
1090 select ARM64
1091 select ARMV8_MULTIENTRY
7769776a 1092 select BOARD_LATE_INIT
91fded62 1093 select SUPPORT_SPL
32413125 1094 select FSL_DDR_INTERACTIVE if !SD_BOOT
7769776a
AK
1095 help
1096 Support for NXP LS1088AQDS platform
1097 The LS1088A Development System (QDS) is a high-performance
1098 development platform that supports the QorIQ LS1088A
1099 Layerscape Architecture processor.
1100
44937214
PK
1101config TARGET_LS2080AQDS
1102 bool "Support ls2080aqds"
fb2bf8c2 1103 select ARCH_LS2080A
5ed063d1 1104 select ARCH_MISC_INIT
7288c2c2
YS
1105 select ARM64
1106 select ARMV8_MULTIENTRY
e5ec4815 1107 select BOARD_LATE_INIT
b2d5ac59 1108 select SUPPORT_SPL
fedb428c 1109 imply SCSI
9fd95ef0 1110 imply SCSI_AHCI
32413125
RB
1111 select FSL_DDR_BIST
1112 select FSL_DDR_INTERACTIVE if !SPL
7288c2c2 1113 help
44937214
PK
1114 Support for Freescale LS2080AQDS platform
1115 The LS2080A Development System (QDS) is a high-performance
1116 development platform that supports the QorIQ LS2080A
7288c2c2
YS
1117 Layerscape Architecture processor.
1118
44937214
PK
1119config TARGET_LS2080ARDB
1120 bool "Support ls2080ardb"
fb2bf8c2 1121 select ARCH_LS2080A
5ed063d1 1122 select ARCH_MISC_INIT
e2b65ea9
YS
1123 select ARM64
1124 select ARMV8_MULTIENTRY
e5ec4815 1125 select BOARD_LATE_INIT
32eda7cc 1126 select SUPPORT_SPL
32413125
RB
1127 select FSL_DDR_BIST
1128 select FSL_DDR_INTERACTIVE if !SPL
fedb428c 1129 imply SCSI
9fd95ef0 1130 imply SCSI_AHCI
e2b65ea9 1131 help
44937214
PK
1132 Support for Freescale LS2080ARDB platform.
1133 The LS2080A Reference design board (RDB) is a high-performance
1134 development platform that supports the QorIQ LS2080A
e2b65ea9
YS
1135 Layerscape Architecture processor.
1136
3049a583
PJ
1137config TARGET_LS2081ARDB
1138 bool "Support ls2081ardb"
1139 select ARCH_LS2080A
5ed063d1 1140 select ARCH_MISC_INIT
3049a583
PJ
1141 select ARM64
1142 select ARMV8_MULTIENTRY
1143 select BOARD_LATE_INIT
1144 select SUPPORT_SPL
3049a583
PJ
1145 help
1146 Support for Freescale LS2081ARDB platform.
1147 The LS2081A Reference design board (RDB) is a high-performance
1148 development platform that supports the QorIQ LS2081A/LS2041A
1149 Layerscape Architecture processor.
1150
58c3e620
PJ
1151config TARGET_LX2160ARDB
1152 bool "Support lx2160ardb"
1153 select ARCH_LX2160A
1154 select ARCH_MISC_INIT
1155 select ARM64
1156 select ARMV8_MULTIENTRY
1157 select BOARD_LATE_INIT
1158 help
1159 Support for NXP LX2160ARDB platform.
1160 The lx2160ardb (LX2160A Reference design board (RDB)
1161 is a high-performance development platform that supports the
1162 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1163
1eba723c
PB
1164config TARGET_LX2160AQDS
1165 bool "Support lx2160aqds"
1166 select ARCH_LX2160A
1167 select ARCH_MISC_INIT
1168 select ARM64
1169 select ARMV8_MULTIENTRY
1170 select BOARD_LATE_INIT
1171 help
1172 Support for NXP LX2160AQDS platform.
1173 The lx2160aqds (LX2160A QorIQ Development System (QDS)
1174 is a high-performance development platform that supports the
1175 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1176
11ac2363
PG
1177config TARGET_HIKEY
1178 bool "Support HiKey 96boards Consumer Edition Platform"
1179 select ARM64
efd7b60a
PG
1180 select DM
1181 select DM_GPIO
9c71bcdc 1182 select DM_SERIAL
cd593ed6 1183 select OF_CONTROL
cf2c7784 1184 select PL01X_SERIAL
6f6b7cfa 1185 select SPECIFY_CONSOLE_INDEX
08a00cba 1186 imply CMD_DM
11ac2363
PG
1187 help
1188 Support for HiKey 96boards platform. It features a HI6220
1189 SoC, with 8xA53 CPU, mali450 gpu, and 1GB RAM.
1190
d754254f
JRO
1191config TARGET_POPLAR
1192 bool "Support Poplar 96boards Enterprise Edition Platform"
1193 select ARM64
1194 select DM
d754254f
JRO
1195 select DM_SERIAL
1196 select DM_USB
5ed063d1 1197 select OF_CONTROL
cf2c7784 1198 select PL01X_SERIAL
08a00cba 1199 imply CMD_DM
d754254f
JRO
1200 help
1201 Support for Poplar 96boards EE platform. It features a HI3798cv200
1202 SoC, with 4xA53 CPU, 1GB RAM and the high performance Mali T720 GPU
1203 making it capable of running any commercial set-top solution based on
1204 Linux or Android.
1205
9d044fcb
PK
1206config TARGET_LS1012AQDS
1207 bool "Support ls1012aqds"
9533acf3 1208 select ARCH_LS1012A
9d044fcb 1209 select ARM64
e5ec4815 1210 select BOARD_LATE_INIT
9d044fcb
PK
1211 help
1212 Support for Freescale LS1012AQDS platform.
1213 The LS1012A Development System (QDS) is a high-performance
1214 development platform that supports the QorIQ LS1012A
1215 Layerscape Architecture processor.
1216
3b6e3898
PK
1217config TARGET_LS1012ARDB
1218 bool "Support ls1012ardb"
9533acf3 1219 select ARCH_LS1012A
3b6e3898 1220 select ARM64
e5ec4815 1221 select BOARD_LATE_INIT
fedb428c 1222 imply SCSI
9fd95ef0 1223 imply SCSI_AHCI
3b6e3898
PK
1224 help
1225 Support for Freescale LS1012ARDB platform.
1226 The LS1012A Reference design board (RDB) is a high-performance
1227 development platform that supports the QorIQ LS1012A
1228 Layerscape Architecture processor.
1229
b0ce187b
BU
1230config TARGET_LS1012A2G5RDB
1231 bool "Support ls1012a2g5rdb"
1232 select ARCH_LS1012A
1233 select ARM64
1234 select BOARD_LATE_INIT
1235 imply SCSI
1236 help
1237 Support for Freescale LS1012A2G5RDB platform.
1238 The LS1012A 2G5 Reference design board (RDB) is a high-performance
1239 development platform that supports the QorIQ LS1012A
1240 Layerscape Architecture processor.
1241
9629ccdd
BU
1242config TARGET_LS1012AFRWY
1243 bool "Support ls1012afrwy"
1244 select ARCH_LS1012A
1245 select ARM64
5ed063d1 1246 select BOARD_LATE_INIT
9629ccdd
BU
1247 imply SCSI
1248 imply SCSI_AHCI
1249 help
1250 Support for Freescale LS1012AFRWY platform.
1251 The LS1012A FRWY board (FRWY) is a high-performance
1252 development platform that supports the QorIQ LS1012A
1253 Layerscape Architecture processor.
1254
ff78aa2b
PK
1255config TARGET_LS1012AFRDM
1256 bool "Support ls1012afrdm"
9533acf3 1257 select ARCH_LS1012A
ff78aa2b
PK
1258 select ARM64
1259 help
1260 Support for Freescale LS1012AFRDM platform.
1261 The LS1012A Freedom board (FRDM) is a high-performance
1262 development platform that supports the QorIQ LS1012A
1263 Layerscape Architecture processor.
1264
f278a217
YT
1265config TARGET_LS1028AQDS
1266 bool "Support ls1028aqds"
1267 select ARCH_LS1028A
1268 select ARM64
1269 select ARMV8_MULTIENTRY
1270 help
1271 Support for Freescale LS1028AQDS platform
1272 The LS1028A Development System (QDS) is a high-performance
1273 development platform that supports the QorIQ LS1028A
1274 Layerscape Architecture processor.
1275
353f36d9
YT
1276config TARGET_LS1028ARDB
1277 bool "Support ls1028ardb"
1278 select ARCH_LS1028A
1279 select ARM64
1280 select ARMV8_MULTIENTRY
1281 help
1282 Support for Freescale LS1028ARDB platform
1283 The LS1028A Development System (RDB) is a high-performance
1284 development platform that supports the QorIQ LS1028A
1285 Layerscape Architecture processor.
1286
e84a324b
AK
1287config TARGET_LS1088ARDB
1288 bool "Support ls1088ardb"
1289 select ARCH_LS1088A
5ed063d1 1290 select ARCH_MISC_INIT
e84a324b
AK
1291 select ARM64
1292 select ARMV8_MULTIENTRY
e84a324b 1293 select BOARD_LATE_INIT
099f4093 1294 select SUPPORT_SPL
32413125 1295 select FSL_DDR_INTERACTIVE if !SD_BOOT
e84a324b
AK
1296 help
1297 Support for NXP LS1088ARDB platform.
1298 The LS1088A Reference design board (RDB) is a high-performance
1299 development platform that supports the QorIQ LS1088A
1300 Layerscape Architecture processor.
1301
550e3dc0 1302config TARGET_LS1021AQDS
0de15707 1303 bool "Support ls1021aqds"
5ed063d1
MS
1304 select ARCH_LS1021A
1305 select ARCH_SUPPORT_PSCI
1306 select BOARD_EARLY_INIT_F
e5ec4815 1307 select BOARD_LATE_INIT
acf15001 1308 select CPU_V7A
adee1d4c
HZ
1309 select CPU_V7_HAS_NONSEC
1310 select CPU_V7_HAS_VIRT
5e8bd7e1 1311 select LS1_DEEP_SLEEP
5ed063d1 1312 select SUPPORT_SPL
d26e34c4 1313 select SYS_FSL_DDR
32413125 1314 select FSL_DDR_INTERACTIVE
fedb428c 1315 imply SCSI
217f92bb 1316
c8a7d9da 1317config TARGET_LS1021ATWR
0de15707 1318 bool "Support ls1021atwr"
5ed063d1
MS
1319 select ARCH_LS1021A
1320 select ARCH_SUPPORT_PSCI
1321 select BOARD_EARLY_INIT_F
e5ec4815 1322 select BOARD_LATE_INIT
acf15001 1323 select CPU_V7A
adee1d4c
HZ
1324 select CPU_V7_HAS_NONSEC
1325 select CPU_V7_HAS_VIRT
5e8bd7e1 1326 select LS1_DEEP_SLEEP
5ed063d1 1327 select SUPPORT_SPL
fedb428c 1328 imply SCSI
c8a7d9da 1329
20c700f8
FL
1330config TARGET_LS1021AIOT
1331 bool "Support ls1021aiot"
5ed063d1
MS
1332 select ARCH_LS1021A
1333 select ARCH_SUPPORT_PSCI
e5ec4815 1334 select BOARD_LATE_INIT
acf15001 1335 select CPU_V7A
20c700f8
FL
1336 select CPU_V7_HAS_NONSEC
1337 select CPU_V7_HAS_VIRT
1338 select SUPPORT_SPL
fedb428c 1339 imply SCSI
20c700f8
FL
1340 help
1341 Support for Freescale LS1021AIOT platform.
1342 The LS1021A Freescale board (IOT) is a high-performance
1343 development platform that supports the QorIQ LS1021A
1344 Layerscape Architecture processor.
1345
02b5d2ed
SX
1346config TARGET_LS1043AQDS
1347 bool "Support ls1043aqds"
0a37cf8f 1348 select ARCH_LS1043A
02b5d2ed
SX
1349 select ARM64
1350 select ARMV8_MULTIENTRY
5ed063d1 1351 select BOARD_EARLY_INIT_F
e5ec4815 1352 select BOARD_LATE_INIT
02b5d2ed 1353 select SUPPORT_SPL
32413125 1354 select FSL_DDR_INTERACTIVE if !SPL
fedb428c 1355 imply SCSI
f11e492a 1356 imply SCSI_AHCI
02b5d2ed
SX
1357 help
1358 Support for Freescale LS1043AQDS platform.
1359
f3a8e2b7
MH
1360config TARGET_LS1043ARDB
1361 bool "Support ls1043ardb"
0a37cf8f 1362 select ARCH_LS1043A
f3a8e2b7 1363 select ARM64
831c068f 1364 select ARMV8_MULTIENTRY
5ed063d1 1365 select BOARD_EARLY_INIT_F
e5ec4815 1366 select BOARD_LATE_INIT
3ad44729 1367 select SUPPORT_SPL
f3a8e2b7
MH
1368 help
1369 Support for Freescale LS1043ARDB platform.
1370
126fe70d
SX
1371config TARGET_LS1046AQDS
1372 bool "Support ls1046aqds"
da28e58a 1373 select ARCH_LS1046A
126fe70d
SX
1374 select ARM64
1375 select ARMV8_MULTIENTRY
5ed063d1 1376 select BOARD_EARLY_INIT_F
e5ec4815 1377 select BOARD_LATE_INIT
126fe70d 1378 select DM_SPI_FLASH if DM_SPI
5ed063d1 1379 select SUPPORT_SPL
32413125
RB
1380 select FSL_DDR_BIST if !SPL
1381 select FSL_DDR_INTERACTIVE if !SPL
1382 select FSL_DDR_INTERACTIVE if !SPL
fedb428c 1383 imply SCSI
126fe70d
SX
1384 help
1385 Support for Freescale LS1046AQDS platform.
1386 The LS1046A Development System (QDS) is a high-performance
1387 development platform that supports the QorIQ LS1046A
1388 Layerscape Architecture processor.
1389
dd02936f
MH
1390config TARGET_LS1046ARDB
1391 bool "Support ls1046ardb"
da28e58a 1392 select ARCH_LS1046A
dd02936f
MH
1393 select ARM64
1394 select ARMV8_MULTIENTRY
5ed063d1 1395 select BOARD_EARLY_INIT_F
e5ec4815 1396 select BOARD_LATE_INIT
dd02936f 1397 select DM_SPI_FLASH if DM_SPI
dccef2ec 1398 select POWER_MC34VR500
5ed063d1 1399 select SUPPORT_SPL
32413125
RB
1400 select FSL_DDR_BIST
1401 select FSL_DDR_INTERACTIVE if !SPL
fedb428c 1402 imply SCSI
dd02936f
MH
1403 help
1404 Support for Freescale LS1046ARDB platform.
1405 The LS1046A Reference Design Board (RDB) is a high-performance
1406 development platform that supports the QorIQ LS1046A
1407 Layerscape Architecture processor.
1408
dd84058d
MY
1409config TARGET_H2200
1410 bool "Support h2200"
2e07c249 1411 select CPU_PXA
dd84058d 1412
dd84058d
MY
1413config TARGET_COLIBRI_PXA270
1414 bool "Support colibri_pxa270"
2e07c249 1415 select CPU_PXA
dd84058d 1416
66cba041 1417config ARCH_UNIPHIER
b6ef3a3f 1418 bool "Socionext UniPhier SoCs"
e5ec4815 1419 select BOARD_LATE_INIT
4e819950 1420 select DM
b800cbde 1421 select DM_GPIO
4e819950 1422 select DM_I2C
4aceb3f8 1423 select DM_MMC
4fb96c48 1424 select DM_RESET
b5550e49 1425 select DM_SERIAL
47a79f65 1426 select DM_USB
65fce763 1427 select OF_BOARD_SETUP
b5550e49
MY
1428 select OF_CONTROL
1429 select OF_LIBFDT
27350c92 1430 select PINCTRL
0680f1b1 1431 select SPL_BOARD_INIT if SPL
561ca649
MY
1432 select SPL_DM if SPL
1433 select SPL_LIBCOMMON_SUPPORT if SPL
1434 select SPL_LIBGENERIC_SUPPORT if SPL
1435 select SPL_OF_CONTROL if SPL
1436 select SPL_PINCTRL if SPL
b5550e49 1437 select SUPPORT_SPL
08a00cba 1438 imply CMD_DM
7ef5b1e7 1439 imply DISTRO_DEFAULTS
91d27a17 1440 imply FAT_WRITE
b6ef3a3f
MY
1441 help
1442 Support for UniPhier SoC family developed by Socionext Inc.
1443 (formerly, System LSI Business Division of Panasonic Corporation)
66cba041 1444
0a61ee88 1445config STM32
2514c2d0 1446 bool "Support STMicroelectronics STM32 MCU with cortex M"
ed09a554 1447 select CPU_V7M
66562414
KL
1448 select DM
1449 select DM_SERIAL
08a00cba 1450 imply CMD_DM
ed09a554 1451
94e9a4ef
PC
1452config ARCH_STI
1453 bool "Support STMicrolectronics SoCs"
5ed063d1 1454 select BLK
acf15001 1455 select CPU_V7A
214a17e6 1456 select DM
eee20f81 1457 select DM_MMC
584861ff 1458 select DM_RESET
5ed063d1 1459 select DM_SERIAL
08a00cba 1460 imply CMD_DM
94e9a4ef
PC
1461 help
1462 Support for STMicroelectronics STiH407/10 SoC family.
1463 This SoC is used on Linaro 96Board STiH410-B2260
1464
2514c2d0
PD
1465config ARCH_STM32MP
1466 bool "Support STMicroelectronics STM32MP Socs with cortex A"
08772f6e 1467 select ARCH_MISC_INIT
2514c2d0
PD
1468 select BOARD_LATE_INIT
1469 select CLK
1470 select DM
1471 select DM_GPIO
1472 select DM_RESET
1473 select DM_SERIAL
5ed063d1 1474 select MISC
2514c2d0
PD
1475 select OF_CONTROL
1476 select OF_LIBFDT
1477 select PINCTRL
1478 select REGMAP
1479 select SUPPORT_SPL
1480 select SYSCON
86634a93 1481 select SYSRESET
2514c2d0 1482 select SYS_THUMB_BUILD
09259fce 1483 imply SPL_SYSRESET
08a00cba 1484 imply CMD_DM
c16cc4f6 1485 imply CMD_POWEROFF
b4ae34b6 1486 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
ce3772ca 1487 imply USE_PREBOOT
2514c2d0
PD
1488 help
1489 Support for STM32MP SoC family developed by STMicroelectronics,
1490 MPUs based on ARM cortex A core
abf2678f
PD
1491 U-BOOT is running in DDR, loaded by the First Stage BootLoader (FSBL).
1492 FSBL can be TF-A: Trusted Firmware for Cortex A, for trusted boot
1493 chain.
1494 SPL is the unsecure FSBL for the basic boot chain.
2514c2d0 1495
2444dae5
SG
1496config ARCH_ROCKCHIP
1497 bool "Support Rockchip SoCs"
aa15038c 1498 select BLK
2444dae5 1499 select DM
aa15038c
SG
1500 select DM_GPIO
1501 select DM_I2C
1502 select DM_MMC
5ed063d1
MS
1503 select DM_PWM
1504 select DM_REGULATOR
aa15038c
SG
1505 select DM_SERIAL
1506 select DM_SPI
1507 select DM_SPI_FLASH
892742df 1508 select DM_USB if USB
14ad6eb2 1509 select ENABLE_ARM_SOC_BOOT0_HOOK
5ed063d1 1510 select OF_CONTROL
f1b1f770 1511 select SPI
5ed063d1
MS
1512 select SPL_DM if SPL
1513 select SPL_SYS_MALLOC_SIMPLE if SPL
1514 select SYS_MALLOC_F
1515 select SYS_THUMB_BUILD if !ARM64
1516 imply ADC
08a00cba 1517 imply CMD_DM
b0a569da 1518 imply DEBUG_UART_BOARD_INIT
7325f6cf 1519 imply DISTRO_DEFAULTS
91d27a17 1520 imply FAT_WRITE
8e8bcccc 1521 imply SARADC_ROCKCHIP
5ed063d1 1522 imply SPL_SYSRESET
c3c0331d 1523 imply SYS_NS16550
5ed063d1
MS
1524 imply TPL_SYSRESET
1525 imply USB_FUNCTION_FASTBOOT
2444dae5 1526
746f985a
ST
1527config TARGET_THUNDERX_88XX
1528 bool "Support ThunderX 88xx"
b4ba1693 1529 select ARM64
746f985a 1530 select OF_CONTROL
cf2c7784 1531 select PL01X_SERIAL
5ed063d1 1532 select SYS_CACHE_SHIFT_7
746f985a 1533
4697abea 1534config ARCH_ASPEED
1535 bool "Support Aspeed SoCs"
4697abea 1536 select DM
5ed063d1 1537 select OF_CONTROL
08a00cba 1538 imply CMD_DM
4697abea 1539
dd84058d
MY
1540endchoice
1541
5fbed8f2
AD
1542config TI_SECURE_DEVICE
1543 bool "HS Device Type Support"
3a543a80 1544 depends on ARCH_KEYSTONE || ARCH_OMAP2PLUS || ARCH_K3
5fbed8f2
AD
1545 help
1546 If a high secure (HS) device type is being used, this config
1547 must be set. This option impacts various aspects of the
1548 build system (to create signed boot images that can be
1549 authenticated) and the code. See the doc/README.ti-secure
1550 file for further details.
1551
9c4b0131
TR
1552if AM43XX || AM33XX || OMAP54XX || ARCH_KEYSTONE
1553config ISW_ENTRY_ADDR
1554 hex "Address in memory or XIP address of bootloader entry point"
1555 default 0x402F4000 if AM43XX
1556 default 0x402F0400 if AM33XX
1557 default 0x40301350 if OMAP54XX
1558 help
1559 After any reset, the boot ROM searches the boot media for a valid
1560 boot image. For non-XIP devices, the ROM then copies the image into
1561 internal memory. For all boot modes, after the ROM processes the
1562 boot image it eventually computes the entry point address depending
1563 on the device type (secure/non-secure), boot media (xip/non-xip) and
1564 image headers.
1565endif
1566
4697abea 1567source "arch/arm/mach-aspeed/Kconfig"
1568
4614b891
MY
1569source "arch/arm/mach-at91/Kconfig"
1570
ddf6bd48 1571source "arch/arm/mach-bcm283x/Kconfig"
3491ba63 1572
894c3ad2
TF
1573source "arch/arm/mach-bcmstb/Kconfig"
1574
ddf6bd48 1575source "arch/arm/mach-davinci/Kconfig"
34e609ca 1576
77b55e8c 1577source "arch/arm/mach-exynos/Kconfig"
72df68cc 1578
72a8ff4b 1579source "arch/arm/mach-highbank/Kconfig"
ef2b694c 1580
5cbbd9bd
MY
1581source "arch/arm/mach-integrator/Kconfig"
1582
586bde93
LV
1583source "arch/arm/mach-k3/Kconfig"
1584
39a72345 1585source "arch/arm/mach-keystone/Kconfig"
c338f09e 1586
56f86e39 1587source "arch/arm/mach-kirkwood/Kconfig"
47539e23 1588
ee54dfea
VZ
1589source "arch/arm/cpu/arm926ejs/lpc32xx/Kconfig"
1590
c3d89140
SR
1591source "arch/arm/mach-mvebu/Kconfig"
1592
0a37cf8f
YS
1593source "arch/arm/cpu/armv7/ls102xa/Kconfig"
1594
07df697e
FE
1595source "arch/arm/mach-imx/mx2/Kconfig"
1596
3159ec64
ML
1597source "arch/arm/mach-imx/mx3/Kconfig"
1598
7a7391fd
PF
1599source "arch/arm/mach-imx/mx5/Kconfig"
1600
1601source "arch/arm/mach-imx/mx6/Kconfig"
e90a08da 1602
552a848e 1603source "arch/arm/mach-imx/mx7/Kconfig"
1a8150d4 1604
7a7391fd 1605source "arch/arm/mach-imx/mx7ulp/Kconfig"
89ebc821 1606
b2b8b9be
PF
1607source "arch/arm/mach-imx/imx8/Kconfig"
1608
cd357ad1 1609source "arch/arm/mach-imx/imx8m/Kconfig"
424ee3d1 1610
c5343d4e
SA
1611source "arch/arm/mach-imx/mxs/Kconfig"
1612
983e3700 1613source "arch/arm/mach-omap2/Kconfig"
6384726d 1614
da28e58a
YS
1615source "arch/arm/cpu/armv8/fsl-layerscape/Kconfig"
1616
3e93b4e6 1617source "arch/arm/mach-orion5x/Kconfig"
22f2be7a 1618
97775d26
MS
1619source "arch/arm/mach-owl/Kconfig"
1620
badbb63c 1621source "arch/arm/mach-rmobile/Kconfig"
f40b9898 1622
bfcef28a
BG
1623source "arch/arm/mach-meson/Kconfig"
1624
cbd2fba1
RL
1625source "arch/arm/mach-mediatek/Kconfig"
1626
32f11829
TT
1627source "arch/arm/mach-qemu/Kconfig"
1628
2444dae5
SG
1629source "arch/arm/mach-rockchip/Kconfig"
1630
225f5eec 1631source "arch/arm/mach-s5pc1xx/Kconfig"
311757be 1632
08592136
MK
1633source "arch/arm/mach-snapdragon/Kconfig"
1634
7865f4b0
MY
1635source "arch/arm/mach-socfpga/Kconfig"
1636
94e9a4ef
PC
1637source "arch/arm/mach-sti/Kconfig"
1638
0a61ee88
VM
1639source "arch/arm/mach-stm32/Kconfig"
1640
2514c2d0
PD
1641source "arch/arm/mach-stm32mp/Kconfig"
1642
3abfd887
MY
1643source "arch/arm/mach-sunxi/Kconfig"
1644
09f455dc 1645source "arch/arm/mach-tegra/Kconfig"
ddd960e6 1646
4c425570 1647source "arch/arm/mach-uniphier/Kconfig"
66cba041 1648
7966b437
SA
1649source "arch/arm/cpu/armv7/vf610/Kconfig"
1650
0107f240 1651source "arch/arm/mach-zynq/Kconfig"
ddd960e6 1652
274ccb5b
MS
1653source "arch/arm/mach-zynqmp/Kconfig"
1654
ec48b6c9
MS
1655source "arch/arm/mach-versal/Kconfig"
1656
1d6c54ec
MS
1657source "arch/arm/mach-zynqmp-r5/Kconfig"
1658
ea624e19
HG
1659source "arch/arm/cpu/armv7/Kconfig"
1660
23b5877c
LW
1661source "arch/arm/cpu/armv8/Kconfig"
1662
552a848e 1663source "arch/arm/mach-imx/Kconfig"
a05a6045 1664
d8ccbe93 1665source "board/bosch/shc/Kconfig"
45123804 1666source "board/bosch/guardian/Kconfig"
dd84058d 1667source "board/CarMediaLab/flea3/Kconfig"
dd84058d 1668source "board/Marvell/aspenite/Kconfig"
dd84058d 1669source "board/Marvell/gplugd/Kconfig"
dd84058d 1670source "board/armadeus/apf27/Kconfig"
dd84058d
MY
1671source "board/armltd/vexpress/Kconfig"
1672source "board/armltd/vexpress64/Kconfig"
43486e4c 1673source "board/broadcom/bcm23550_w1d/Kconfig"
dd84058d 1674source "board/broadcom/bcm28155_ap/Kconfig"
be2fc084 1675source "board/broadcom/bcm963158/Kconfig"
40b59b05 1676source "board/broadcom/bcm968580xref/Kconfig"
abb1678c
SR
1677source "board/broadcom/bcmcygnus/Kconfig"
1678source "board/broadcom/bcmnsp/Kconfig"
274bced8 1679source "board/broadcom/bcmns2/Kconfig"
746f985a 1680source "board/cavium/thunderx/Kconfig"
dd84058d 1681source "board/cirrus/edb93xx/Kconfig"
85ab0452 1682source "board/eets/pdu001/Kconfig"
6f332765 1683source "board/emulation/qemu-arm/Kconfig"
44937214
PK
1684source "board/freescale/ls2080a/Kconfig"
1685source "board/freescale/ls2080aqds/Kconfig"
1686source "board/freescale/ls2080ardb/Kconfig"
e84a324b 1687source "board/freescale/ls1088a/Kconfig"
353f36d9 1688source "board/freescale/ls1028a/Kconfig"
550e3dc0 1689source "board/freescale/ls1021aqds/Kconfig"
02b5d2ed 1690source "board/freescale/ls1043aqds/Kconfig"
c8a7d9da 1691source "board/freescale/ls1021atwr/Kconfig"
20c700f8 1692source "board/freescale/ls1021aiot/Kconfig"
126fe70d 1693source "board/freescale/ls1046aqds/Kconfig"
f3a8e2b7 1694source "board/freescale/ls1043ardb/Kconfig"
dd02936f 1695source "board/freescale/ls1046ardb/Kconfig"
9d044fcb 1696source "board/freescale/ls1012aqds/Kconfig"
3b6e3898 1697source "board/freescale/ls1012ardb/Kconfig"
ff78aa2b 1698source "board/freescale/ls1012afrdm/Kconfig"
58c3e620 1699source "board/freescale/lx2160a/Kconfig"
dd84058d 1700source "board/freescale/mx35pdk/Kconfig"
9702ec00 1701source "board/freescale/s32v234evb/Kconfig"
ab38bf6a 1702source "board/grinn/chiliboard/Kconfig"
dd84058d
MY
1703source "board/gumstix/pepper/Kconfig"
1704source "board/h2200/Kconfig"
345243ed 1705source "board/hisilicon/hikey/Kconfig"
d754254f 1706source "board/hisilicon/poplar/Kconfig"
a96c08f5 1707source "board/isee/igep003x/Kconfig"
dd84058d 1708source "board/phytec/pcm051/Kconfig"
dd84058d 1709source "board/silica/pengwyn/Kconfig"
dd84058d
MY
1710source "board/spear/spear300/Kconfig"
1711source "board/spear/spear310/Kconfig"
1712source "board/spear/spear320/Kconfig"
1713source "board/spear/spear600/Kconfig"
1714source "board/spear/x600/Kconfig"
9fa32b12 1715source "board/st/stv0991/Kconfig"
9d1b2987 1716source "board/tcl/sl50/Kconfig"
eba6589f 1717source "board/ucRobotics/bubblegum_96/Kconfig"
a2bc4321 1718source "board/birdland/bav335x/Kconfig"
dd84058d 1719source "board/toradex/colibri_pxa270/Kconfig"
d8d33b6d 1720source "board/variscite/dart_6ul/Kconfig"
6ce89324 1721source "board/vscom/baltos/Kconfig"
dd84058d 1722source "board/woodburn/Kconfig"
6da4f67a 1723source "board/xilinx/Kconfig"
37e3a36a 1724source "board/xilinx/zynq/Kconfig"
c436bf92 1725source "board/xilinx/zynqmp/Kconfig"
dd84058d 1726
51b17d49
MY
1727source "arch/arm/Kconfig.debug"
1728
dd84058d 1729endmenu
b529993e
PT
1730
1731config SPL_LDSCRIPT
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MS
1732 default "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds" if (ARCH_MX23 || ARCH_MX28) && !SPL_FRAMEWORK
1733 default "arch/arm/cpu/arm1136/u-boot-spl.lds" if CPU_ARM1136
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PT
1734 default "arch/arm/cpu/armv8/u-boot-spl.lds" if ARM64
1735
1736
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