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83d290c5 | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
0d04f34a | 2 | /* |
fe84ebf0 | 3 | * (C) Copyright 2012-2016 Stephen Warren |
0d04f34a SW |
4 | */ |
5 | ||
6 | #ifndef __CONFIG_H | |
7 | #define __CONFIG_H | |
8 | ||
fe84ebf0 SW |
9 | #include <linux/sizes.h> |
10 | #include <asm/arch/timer.h> | |
11 | ||
8e3361c8 MB |
12 | #ifndef __ASSEMBLY__ |
13 | #include <asm/arch/base.h> | |
14 | #endif | |
15 | ||
fe84ebf0 | 16 | /* Architecture, CPU, etc.*/ |
fe84ebf0 SW |
17 | |
18 | /* Use SoC timer for AArch32, but architected timer for AArch64 */ | |
19 | #ifndef CONFIG_ARM64 | |
20 | #define CONFIG_SYS_TIMER_RATE 1000000 | |
21 | #define CONFIG_SYS_TIMER_COUNTER \ | |
22 | (&((struct bcm2835_timer_regs *)BCM2835_TIMER_PHYSADDR)->clo) | |
23 | #endif | |
24 | ||
fe84ebf0 | 25 | /* Memory layout */ |
fe84ebf0 | 26 | #define CONFIG_SYS_SDRAM_BASE 0x00000000 |
98463903 | 27 | #define CONFIG_SYS_UBOOT_BASE CONFIG_TEXT_BASE |
fe84ebf0 SW |
28 | /* |
29 | * The board really has 256M. However, the VC (VideoCore co-processor) shares | |
30 | * the RAM, and uses a configurable portion at the top. We tell U-Boot that a | |
31 | * smaller amount of RAM is present in order to avoid stomping on the area | |
32 | * the VC uses. | |
33 | */ | |
34 | #define CONFIG_SYS_SDRAM_SIZE SZ_128M | |
fe84ebf0 | 35 | |
fe84ebf0 | 36 | /* Devices */ |
fe84ebf0 | 37 | /* LCD */ |
fe84ebf0 | 38 | |
f29002fc MS |
39 | /* DFU over USB/UDC */ |
40 | #ifdef CONFIG_CMD_DFU | |
f29002fc MS |
41 | #ifdef CONFIG_ARM64 |
42 | #define KERNEL_FILENAME "Image" | |
43 | #else | |
44 | #define KERNEL_FILENAME "zImage" | |
45 | #endif | |
46 | ||
47 | #define ENV_DFU_SETTINGS \ | |
48 | "dfu_alt_info=u-boot.bin fat 0 1;uboot.env fat 0 1;" \ | |
49 | "config.txt fat 0 1;" \ | |
50 | KERNEL_FILENAME " fat 0 1\0" | |
51 | #else | |
52 | #define ENV_DFU_SETTINGS "" | |
53 | #endif | |
54 | ||
fe84ebf0 | 55 | /* Console configuration */ |
fe84ebf0 SW |
56 | |
57 | /* Environment */ | |
fe84ebf0 SW |
58 | |
59 | /* Shell */ | |
fe84ebf0 | 60 | |
fe84ebf0 | 61 | /* Environment */ |
fe84ebf0 SW |
62 | #define ENV_DEVICE_SETTINGS \ |
63 | "stdin=serial,usbkbd\0" \ | |
ea843b6d SG |
64 | "stdout=serial,vidconsole\0" \ |
65 | "stderr=serial,vidconsole\0" | |
fe84ebf0 | 66 | |
72274259 TT |
67 | #ifdef CONFIG_ARM64 |
68 | #define FDT_HIGH "ffffffffffffffff" | |
69 | #define INITRD_HIGH "ffffffffffffffff" | |
70 | #else | |
71 | #define FDT_HIGH "ffffffff" | |
72 | #define INITRD_HIGH "ffffffff" | |
73 | #endif | |
74 | ||
fe84ebf0 SW |
75 | /* |
76 | * Memory layout for where various images get loaded by boot scripts: | |
77 | * | |
78 | * I suspect address 0 is used as the SMP pen on the RPi2, so avoid this. | |
79 | * | |
385cbe29 TT |
80 | * Older versions of the boot firmware place the firmware-loaded DTB at 0x100, |
81 | * newer versions place it in high memory. So prevent U-Boot from doing its own | |
82 | * DTB + initrd relocation so that we won't accidentally relocate the initrd | |
83 | * over the firmware-loaded DTB and generally try to lay out things starting | |
84 | * from the bottom of RAM. | |
fe84ebf0 | 85 | * |
385cbe29 TT |
86 | * kernel_addr_r has different constraints on ARM and Aarch64. For 32-bit ARM, |
87 | * it must be within the first 128M of RAM in order for the kernel's | |
88 | * CONFIG_AUTO_ZRELADDR option to work. The kernel itself will be decompressed | |
89 | * to 0x8000 but the decompressor clobbers 0x4000-0x8000 as well. The | |
90 | * decompressor also likes to relocate itself to right past the end of the | |
91 | * decompressed kernel, so in total the sum of the compressed and and | |
92 | * decompressed kernel needs to be reserved. | |
fe84ebf0 | 93 | * |
385cbe29 TT |
94 | * For Aarch64, the kernel image is uncompressed and must be loaded at |
95 | * text_offset bytes (specified in the header of the Image) into a 2MB | |
96 | * boundary. The 'booti' command relocates the image if necessary. Linux uses | |
97 | * a default text_offset of 0x80000. In summary, loading at 0x80000 | |
98 | * satisfies all these constraints and reserving memory up to 0x02400000 | |
99 | * permits fairly large (roughly 36M) kernels. | |
fe84ebf0 | 100 | * |
385cbe29 TT |
101 | * scriptaddr and pxefile_addr_r can be pretty much anywhere that doesn't |
102 | * conflict with something else. Reserving 1M for each of them at | |
103 | * 0x02400000-0x02500000 and 0x02500000-0x02600000 should be plenty. | |
fe84ebf0 | 104 | * |
385cbe29 TT |
105 | * On ARM, both the DTB and any possible initrd must be loaded such that they |
106 | * fit inside the lowmem mapping in Linux. In practice, this usually means not | |
107 | * more than ~700M away from the start of the kernel image but this number can | |
108 | * be larger OR smaller depending on e.g. the 'vmalloc=xxxM' command line | |
109 | * parameter given to the kernel. So reserving memory from low to high | |
110 | * satisfies this constraint again. Reserving 1M at 0x02600000-0x02700000 for | |
111 | * the DTB leaves rest of the free RAM to the initrd starting at 0x02700000. | |
112 | * Even with the smallest possible CPU-GPU memory split of the CPU getting | |
113 | * only 64M, the remaining 25M starting at 0x02700000 should allow quite | |
114 | * large initrds before they start colliding with U-Boot. | |
fe84ebf0 SW |
115 | */ |
116 | #define ENV_MEM_LAYOUT_SETTINGS \ | |
72274259 TT |
117 | "fdt_high=" FDT_HIGH "\0" \ |
118 | "initrd_high=" INITRD_HIGH "\0" \ | |
385cbe29 TT |
119 | "kernel_addr_r=0x00080000\0" \ |
120 | "scriptaddr=0x02400000\0" \ | |
121 | "pxefile_addr_r=0x02500000\0" \ | |
122 | "fdt_addr_r=0x02600000\0" \ | |
123 | "ramdisk_addr_r=0x02700000\0" | |
fe84ebf0 | 124 | |
e4617bdb | 125 | #if CONFIG_IS_ENABLED(CMD_MMC) |
126 | #define BOOT_TARGET_MMC(func) \ | |
127 | func(MMC, mmc, 0) \ | |
874e544e MK |
128 | func(MMC, mmc, 1) \ |
129 | func(MMC, mmc, 2) | |
e4617bdb | 130 | #else |
131 | #define BOOT_TARGET_MMC(func) | |
132 | #endif | |
133 | ||
134 | #if CONFIG_IS_ENABLED(CMD_USB) | |
135 | #define BOOT_TARGET_USB(func) func(USB, usb, 0) | |
136 | #else | |
137 | #define BOOT_TARGET_USB(func) | |
138 | #endif | |
139 | ||
140 | #if CONFIG_IS_ENABLED(CMD_PXE) | |
141 | #define BOOT_TARGET_PXE(func) func(PXE, pxe, na) | |
142 | #else | |
143 | #define BOOT_TARGET_PXE(func) | |
144 | #endif | |
145 | ||
146 | #if CONFIG_IS_ENABLED(CMD_DHCP) | |
147 | #define BOOT_TARGET_DHCP(func) func(DHCP, dhcp, na) | |
148 | #else | |
149 | #define BOOT_TARGET_DHCP(func) | |
150 | #endif | |
151 | ||
fe84ebf0 | 152 | #define BOOT_TARGET_DEVICES(func) \ |
e4617bdb | 153 | BOOT_TARGET_MMC(func) \ |
154 | BOOT_TARGET_USB(func) \ | |
155 | BOOT_TARGET_PXE(func) \ | |
156 | BOOT_TARGET_DHCP(func) | |
157 | ||
fe84ebf0 SW |
158 | #include <config_distro_bootcmd.h> |
159 | ||
160 | #define CONFIG_EXTRA_ENV_SETTINGS \ | |
161 | "dhcpuboot=usb start; dhcp u-boot.uimg; bootm\0" \ | |
162 | ENV_DEVICE_SETTINGS \ | |
f29002fc | 163 | ENV_DFU_SETTINGS \ |
fe84ebf0 SW |
164 | ENV_MEM_LAYOUT_SETTINGS \ |
165 | BOOTENV | |
060f9bf5 | 166 | |
0d04f34a | 167 | |
0d04f34a | 168 | #endif |