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Fix config problems on SC3 board; make ide_reset_timeout work.
[u-boot.git] / lib_ppc / board.c
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fe8c2806 1/*
4707fb50 2 * (C) Copyright 2000-2006
fe8c2806
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3 * Wolfgang Denk, DENX Software Engineering, [email protected].
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24#include <common.h>
25#include <watchdog.h>
26#include <command.h>
27#include <malloc.h>
28#include <devices.h>
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29#ifdef CONFIG_8xx
30#include <mpc8xx.h>
31#endif
0db5bca8
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32#ifdef CONFIG_5xx
33#include <mpc5xx.h>
34#endif
cbd8a35c 35#ifdef CONFIG_MPC5xxx
945af8d7
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36#include <mpc5xxx.h>
37#endif
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38#if (CONFIG_COMMANDS & CFG_CMD_IDE)
39#include <ide.h>
40#endif
41#if (CONFIG_COMMANDS & CFG_CMD_SCSI)
42#include <scsi.h>
43#endif
44#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
45#include <kgdb.h>
46#endif
47#ifdef CONFIG_STATUS_LED
48#include <status_led.h>
49#endif
50#include <net.h>
281e00a3 51#include <serial.h>
fe8c2806 52#ifdef CFG_ALLOC_DPRAM
9c4c5ae3 53#if !defined(CONFIG_CPM2)
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54#include <commproc.h>
55#endif
7aa78614 56#endif
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57#include <version.h>
58#if defined(CONFIG_BAB7xx)
59#include <w83c553f.h>
60#endif
61#include <dtt.h>
62#if defined(CONFIG_POST)
63#include <post.h>
64#endif
56f94be3
WD
65#if defined(CONFIG_LOGBUFFER)
66#include <logbuff.h>
67#endif
42d1f039
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68#if defined(CFG_INIT_RAM_LOCK) && defined(CONFIG_E500)
69#include <asm/cache.h>
70#endif
1c43771b
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71#ifdef CONFIG_PS2KBD
72#include <keyboard.h>
73#endif
fe8c2806 74
fa230445
HS
75#ifdef CFG_UPDATE_FLASH_SIZE
76extern int update_flash_size (int flash_size);
77#endif
78
9045f33c 79#if defined(CONFIG_SC3)
ca43ba18
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80extern void sc3_read_eeprom(void);
81#endif
82
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83#if (CONFIG_COMMANDS & CFG_CMD_DOC)
84void doc_init (void);
85#endif
86#if defined(CONFIG_HARD_I2C) || \
87 defined(CONFIG_SOFT_I2C)
88#include <i2c.h>
89#endif
bedc4970
SR
90#if (CONFIG_COMMANDS & CFG_CMD_NAND)
91void nand_init (void);
92#endif
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93
94static char *failed = "*** failed ***\n";
95
17d704eb 96#if defined(CONFIG_OXC) || defined(CONFIG_PCU_E) || defined(CONFIG_RMU)
fe8c2806 97extern flash_info_t flash_info[];
17d704eb 98#endif
fe8c2806 99
ca43ba18
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100#if defined(CONFIG_START_IDE)
101extern int board_start_ide(void);
102#endif
fe8c2806 103#include <environment.h>
d87080b7 104
bce84c4d 105DECLARE_GLOBAL_DATA_PTR;
fe8c2806 106
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107#if defined(CFG_ENV_IS_EMBEDDED)
108#define TOTAL_MALLOC_LEN CFG_MALLOC_LEN
109#elif ( ((CFG_ENV_ADDR+CFG_ENV_SIZE) < CFG_MONITOR_BASE) || \
04a85b3b 110 (CFG_ENV_ADDR >= (CFG_MONITOR_BASE + CFG_MONITOR_LEN)) ) || \
7e780369 111 defined(CFG_ENV_IS_IN_NVRAM)
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112#define TOTAL_MALLOC_LEN (CFG_MALLOC_LEN + CFG_ENV_SIZE)
113#else
114#define TOTAL_MALLOC_LEN CFG_MALLOC_LEN
115#endif
116
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117extern ulong __init_end;
118extern ulong _end;
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119ulong monitor_flash_len;
120
8bde7f77
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121#if (CONFIG_COMMANDS & CFG_CMD_BEDBUG)
122#include <bedbug/type.h>
123#endif
124
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125/*
126 * Begin and End of memory area for malloc(), and current "brk"
127 */
128static ulong mem_malloc_start = 0;
129static ulong mem_malloc_end = 0;
130static ulong mem_malloc_brk = 0;
131
132/************************************************************************
133 * Utilities *
134 ************************************************************************
135 */
136
137/*
138 * The Malloc area is immediately below the monitor copy in DRAM
139 */
140static void mem_malloc_init (void)
141{
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142 ulong dest_addr = CFG_MONITOR_BASE + gd->reloc_off;
143
144 mem_malloc_end = dest_addr;
145 mem_malloc_start = dest_addr - TOTAL_MALLOC_LEN;
146 mem_malloc_brk = mem_malloc_start;
147
148 memset ((void *) mem_malloc_start,
149 0,
150 mem_malloc_end - mem_malloc_start);
151}
152
153void *sbrk (ptrdiff_t increment)
154{
155 ulong old = mem_malloc_brk;
156 ulong new = old + increment;
157
158 if ((new < mem_malloc_start) || (new > mem_malloc_end)) {
159 return (NULL);
160 }
161 mem_malloc_brk = new;
162 return ((void *) old);
163}
164
165char *strmhz (char *buf, long hz)
166{
167 long l, n;
168 long m;
169
170 n = hz / 1000000L;
171 l = sprintf (buf, "%ld", n);
172 m = (hz % 1000000L) / 1000L;
173 if (m != 0)
174 sprintf (buf + l, ".%03ld", m);
175 return (buf);
176}
177
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178/*
179 * All attempts to come up with a "common" initialization sequence
180 * that works for all boards and architectures failed: some of the
181 * requirements are just _too_ different. To get rid of the resulting
182 * mess of board dependend #ifdef'ed code we now make the whole
183 * initialization sequence configurable to the user.
184 *
185 * The requirements for any new initalization function is simple: it
186 * receives a pointer to the "global data" structure as it's only
187 * argument, and returns an integer return code, where 0 means
188 * "continue" and != 0 means "fatal error, hang the system".
189 */
190typedef int (init_fnc_t) (void);
191
192/************************************************************************
193 * Init Utilities *
194 ************************************************************************
195 * Some of this code should be moved into the core functions,
196 * but let's get it working (again) first...
197 */
198
199static int init_baudrate (void)
200{
77ddac94 201 char tmp[64]; /* long enough for environment variables */
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202 int i = getenv_r ("baudrate", tmp, sizeof (tmp));
203
204 gd->baudrate = (i > 0)
205 ? (int) simple_strtoul (tmp, NULL, 10)
206 : CONFIG_BAUDRATE;
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207 return (0);
208}
209
210/***********************************************************************/
211
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212#ifdef CONFIG_ADD_RAM_INFO
213void board_add_ram_info(int);
214#endif
215
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216static int init_func_ram (void)
217{
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218#ifdef CONFIG_BOARD_TYPES
219 int board_type = gd->board_type;
220#else
221 int board_type = 0; /* use dummy arg */
222#endif
223 puts ("DRAM: ");
224
225 if ((gd->ram_size = initdram (board_type)) > 0) {
d96f41e0
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226 print_size (gd->ram_size, "");
227#ifdef CONFIG_ADD_RAM_INFO
228 board_add_ram_info(0);
229#endif
230 putc('\n');
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231 return (0);
232 }
233 puts (failed);
234 return (1);
235}
236
237/***********************************************************************/
238
239#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C)
240static int init_func_i2c (void)
241{
242 puts ("I2C: ");
243 i2c_init (CFG_I2C_SPEED, CFG_I2C_SLAVE);
244 puts ("ready\n");
245 return (0);
246}
247#endif
248
249/***********************************************************************/
250
251#if defined(CONFIG_WATCHDOG)
252static int init_func_watchdog_init (void)
253{
254 puts (" Watchdog enabled\n");
255 WATCHDOG_RESET ();
256 return (0);
257}
258# define INIT_FUNC_WATCHDOG_INIT init_func_watchdog_init,
259
260static int init_func_watchdog_reset (void)
261{
262 WATCHDOG_RESET ();
263 return (0);
264}
265# define INIT_FUNC_WATCHDOG_RESET init_func_watchdog_reset,
266#else
267# define INIT_FUNC_WATCHDOG_INIT /* undef */
268# define INIT_FUNC_WATCHDOG_RESET /* undef */
269#endif /* CONFIG_WATCHDOG */
270
271/************************************************************************
272 * Initialization sequence *
273 ************************************************************************
274 */
275
276init_fnc_t *init_sequence[] = {
277
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278#if defined(CONFIG_BOARD_EARLY_INIT_F)
279 board_early_init_f,
fe8c2806 280#endif
c178d3da 281
66ca92a5 282#if !defined(CONFIG_8xx_CPUCLK_DEFAULT)
fe8c2806 283 get_clocks, /* get CPU and bus clocks (etc.) */
090eb735
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284#if defined(CONFIG_TQM8xxL) && !defined(CONFIG_TQM866M) \
285 && !defined(CONFIG_TQM885D)
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286 adjust_sdram_tbs_8xx,
287#endif
fe8c2806 288 init_timebase,
c178d3da 289#endif
fe8c2806 290#ifdef CFG_ALLOC_DPRAM
9c4c5ae3 291#if !defined(CONFIG_CPM2)
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292 dpram_init,
293#endif
7aa78614 294#endif
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295#if defined(CONFIG_BOARD_POSTCLK_INIT)
296 board_postclk_init,
297#endif
298 env_init,
66ca92a5 299#if defined(CONFIG_8xx_CPUCLK_DEFAULT)
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300 get_clocks_866, /* get CPU and bus clocks according to the environment variable */
301 sdram_adjust_866, /* adjust sdram refresh rate according to the new clock */
302 init_timebase,
303#endif
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304 init_baudrate,
305 serial_init,
306 console_init_f,
307 display_options,
308#if defined(CONFIG_8260)
309 prt_8260_rsr,
310 prt_8260_clks,
311#endif /* CONFIG_8260 */
f046ccd1 312
fe8c2806 313 checkcpu,
cbd8a35c 314#if defined(CONFIG_MPC5xxx)
945af8d7 315 prt_mpc5xxx_clks,
cbd8a35c 316#endif /* CONFIG_MPC5xxx */
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317#if defined(CONFIG_MPC8220)
318 prt_mpc8220_clks,
319#endif
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320 checkboard,
321 INIT_FUNC_WATCHDOG_INIT
c837dcb1 322#if defined(CONFIG_MISC_INIT_F)
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323 misc_init_f,
324#endif
325 INIT_FUNC_WATCHDOG_RESET
326#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C)
327 init_func_i2c,
328#endif
329#if defined(CONFIG_DTT) /* Digital Thermometers and Thermostats */
330 dtt_init,
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331#endif
332#ifdef CONFIG_POST
333 post_init_f,
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334#endif
335 INIT_FUNC_WATCHDOG_RESET
336 init_func_ram,
337#if defined(CFG_DRAM_TEST)
338 testdram,
339#endif /* CFG_DRAM_TEST */
340 INIT_FUNC_WATCHDOG_RESET
341
342 NULL, /* Terminate this list */
343};
344
345/************************************************************************
346 *
347 * This is the first part of the initialization sequence that is
348 * implemented in C, but still running from ROM.
349 *
350 * The main purpose is to provide a (serial) console interface as
351 * soon as possible (so we can see any error messages), and to
352 * initialize the RAM so that we can relocate the monitor code to
353 * RAM.
354 *
355 * Be aware of the restrictions: global data is read-only, BSS is not
356 * initialized, and stack space is limited to a few kB.
357 *
358 ************************************************************************
359 */
360
361void board_init_f (ulong bootflag)
362{
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363 bd_t *bd;
364 ulong len, addr, addr_sp;
7bc5ee07 365 ulong *s;
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366 gd_t *id;
367 init_fnc_t **init_fnc_ptr;
368#ifdef CONFIG_PRAM
369 int i;
370 ulong reg;
371 uchar tmp[64]; /* long enough for environment variables */
372#endif
373
374 /* Pointer is writable since we allocated a register for it */
375 gd = (gd_t *) (CFG_INIT_RAM_ADDR + CFG_GBL_DATA_OFFSET);
93f6a677
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376 /* compiler optimization barrier needed for GCC >= 3.4 */
377 __asm__ __volatile__("": : :"memory");
fe8c2806 378
9c4c5ae3 379#if !defined(CONFIG_CPM2)
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380 /* Clear initial global data */
381 memset ((void *) gd, 0, sizeof (gd_t));
382#endif
383
384 for (init_fnc_ptr = init_sequence; *init_fnc_ptr; ++init_fnc_ptr) {
385 if ((*init_fnc_ptr) () != 0) {
386 hang ();
387 }
388 }
389
390 /*
391 * Now that we have DRAM mapped and working, we can
392 * relocate the code and continue running from DRAM.
393 *
394 * Reserve memory at end of RAM for (top down in that order):
8bde7f77 395 * - kernel log buffer
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396 * - protected RAM
397 * - LCD framebuffer
398 * - monitor code
399 * - board info struct
400 */
3b57fe0a 401 len = (ulong)&_end - CFG_MONITOR_BASE;
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402
403#ifndef CONFIG_VERY_BIG_RAM
404 addr = CFG_SDRAM_BASE + gd->ram_size;
405#else
406 /* only allow stack below 256M */
407 addr = CFG_SDRAM_BASE +
408 (gd->ram_size > 256 << 20) ? 256 << 20 : gd->ram_size;
409#endif
410
228f29ac
WD
411#ifdef CONFIG_LOGBUFFER
412 /* reserve kernel log buffer */
413 addr -= (LOGBUFF_RESERVE);
9d2b18a0 414 debug ("Reserving %dk for kernel logbuffer at %08lx\n", LOGBUFF_LEN, addr);
228f29ac
WD
415#endif
416
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417#ifdef CONFIG_PRAM
418 /*
419 * reserve protected RAM
420 */
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421 i = getenv_r ("pram", (char *)tmp, sizeof (tmp));
422 reg = (i > 0) ? simple_strtoul ((const char *)tmp, NULL, 10) : CONFIG_PRAM;
fe8c2806 423 addr -= (reg << 10); /* size is in kB */
9d2b18a0 424 debug ("Reserving %ldk for protected RAM at %08lx\n", reg, addr);
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425#endif /* CONFIG_PRAM */
426
427 /* round down to next 4 kB limit */
428 addr &= ~(4096 - 1);
9d2b18a0 429 debug ("Top of RAM usable for U-Boot at: %08lx\n", addr);
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430
431#ifdef CONFIG_LCD
432 /* reserve memory for LCD display (always full pages) */
433 addr = lcd_setmem (addr);
434 gd->fb_base = addr;
435#endif /* CONFIG_LCD */
436
437#if defined(CONFIG_VIDEO) && defined(CONFIG_8xx)
438 /* reserve memory for video display (always full pages) */
439 addr = video_setmem (addr);
440 gd->fb_base = addr;
441#endif /* CONFIG_VIDEO */
442
443 /*
444 * reserve memory for U-Boot code, data & bss
682011ff 445 * round down to next 4 kB limit
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446 */
447 addr -= len;
682011ff 448 addr &= ~(4096 - 1);
7d314992
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449#ifdef CONFIG_E500
450 /* round down to next 64 kB limit so that IVPR stays aligned */
451 addr &= ~(65536 - 1);
452#endif
fe8c2806 453
9d2b18a0 454 debug ("Reserving %ldk for U-Boot at: %08lx\n", len >> 10, addr);
fe8c2806 455
c7de829c
WD
456#ifdef CONFIG_AMIGAONEG3SE
457 gd->relocaddr = addr;
458#endif
459
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460 /*
461 * reserve memory for malloc() arena
462 */
463 addr_sp = addr - TOTAL_MALLOC_LEN;
9d2b18a0 464 debug ("Reserving %dk for malloc() at: %08lx\n",
fe8c2806 465 TOTAL_MALLOC_LEN >> 10, addr_sp);
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466
467 /*
468 * (permanently) allocate a Board Info struct
469 * and a permanent copy of the "global" data
470 */
471 addr_sp -= sizeof (bd_t);
472 bd = (bd_t *) addr_sp;
473 gd->bd = bd;
9d2b18a0 474 debug ("Reserving %d Bytes for Board Info at: %08lx\n",
fe8c2806 475 sizeof (bd_t), addr_sp);
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476 addr_sp -= sizeof (gd_t);
477 id = (gd_t *) addr_sp;
9d2b18a0 478 debug ("Reserving %d Bytes for Global Data at: %08lx\n",
fe8c2806 479 sizeof (gd_t), addr_sp);
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480
481 /*
482 * Finally, we set up a new (bigger) stack.
483 *
484 * Leave some safety gap for SP, force alignment on 16 byte boundary
485 * Clear initial stack frame
486 */
487 addr_sp -= 16;
488 addr_sp &= ~0xF;
7bc5ee07
WD
489 s = (ulong *)addr_sp;
490 *s-- = 0;
491 *s-- = 0;
492 addr_sp = (ulong)s;
9d2b18a0 493 debug ("Stack Pointer at: %08lx\n", addr_sp);
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494
495 /*
496 * Save local variables to board info struct
497 */
498
c837dcb1 499 bd->bi_memstart = CFG_SDRAM_BASE; /* start of DRAM memory */
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500 bd->bi_memsize = gd->ram_size; /* size of DRAM memory in bytes */
501
502#ifdef CONFIG_IP860
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503 bd->bi_sramstart = SRAM_BASE; /* start of SRAM memory */
504 bd->bi_sramsize = SRAM_SIZE; /* size of SRAM memory */
983fda83
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505#elif defined CONFIG_MPC8220
506 bd->bi_sramstart = CFG_SRAM_BASE; /* start of SRAM memory */
507 bd->bi_sramsize = CFG_SRAM_SIZE; /* size of SRAM memory */
fe8c2806 508#else
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509 bd->bi_sramstart = 0; /* FIXME */ /* start of SRAM memory */
510 bd->bi_sramsize = 0; /* FIXME */ /* size of SRAM memory */
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511#endif
512
42d1f039 513#if defined(CONFIG_8xx) || defined(CONFIG_8260) || defined(CONFIG_5xx) || \
debb7354 514 defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
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515 bd->bi_immr_base = CFG_IMMR; /* base of IMMR register */
516#endif
cbd8a35c 517#if defined(CONFIG_MPC5xxx)
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518 bd->bi_mbar_base = CFG_MBAR; /* base of internal registers */
519#endif
f046ccd1 520#if defined(CONFIG_MPC83XX)
d239d74b 521 bd->bi_immrbar = CFG_IMMR;
f046ccd1 522#endif
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523#if defined(CONFIG_MPC8220)
524 bd->bi_mbar_base = CFG_MBAR; /* base of internal registers */
525 bd->bi_inpfreq = gd->inp_clk;
526 bd->bi_pcifreq = gd->pci_clk;
527 bd->bi_vcofreq = gd->vco_clk;
528 bd->bi_pevfreq = gd->pev_clk;
529 bd->bi_flbfreq = gd->flb_clk;
530
dd520bf3
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531 /* store bootparam to sram (backward compatible), here? */
532 {
533 u32 *sram = (u32 *)CFG_SRAM_BASE;
534 *sram++ = gd->ram_size;
535 *sram++ = gd->bus_clk;
536 *sram++ = gd->inp_clk;
537 *sram++ = gd->cpu_clk;
538 *sram++ = gd->vco_clk;
539 *sram++ = gd->flb_clk;
540 *sram++ = 0xb8c3ba11; /* boot signature */
541 }
983fda83 542#endif
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543
544 bd->bi_bootflags = bootflag; /* boot / reboot flag (for LynxOS) */
545
546 WATCHDOG_RESET ();
547 bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */
548 bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */
9c4c5ae3 549#if defined(CONFIG_CPM2)
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550 bd->bi_cpmfreq = gd->cpm_clk;
551 bd->bi_brgfreq = gd->brg_clk;
552 bd->bi_sccfreq = gd->scc_clk;
553 bd->bi_vco = gd->vco_out;
9c4c5ae3 554#endif /* CONFIG_CPM2 */
cbd8a35c 555#if defined(CONFIG_MPC5xxx)
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556 bd->bi_ipbfreq = gd->ipb_clk;
557 bd->bi_pcifreq = gd->pci_clk;
cbd8a35c 558#endif /* CONFIG_MPC5xxx */
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559 bd->bi_baudrate = gd->baudrate; /* Console Baudrate */
560
561#ifdef CFG_EXTBDINFO
77ddac94
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562 strncpy ((char *)bd->bi_s_version, "1.2", sizeof (bd->bi_s_version));
563 strncpy ((char *)bd->bi_r_version, U_BOOT_VERSION, sizeof (bd->bi_r_version));
fe8c2806
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564
565 bd->bi_procfreq = gd->cpu_clk; /* Processor Speed, In Hz */
566 bd->bi_plb_busfreq = gd->bus_clk;
343c48bd
SR
567#if defined(CONFIG_405GP) || defined(CONFIG_405EP) || \
568 defined(CONFIG_440EP) || defined(CONFIG_440GR) || \
569 defined(CONFIG_440EPX) || defined(CONFIG_440GRX)
fe8c2806 570 bd->bi_pci_busfreq = get_PCI_freq ();
109c0e3a 571 bd->bi_opbfreq = get_OPB_freq ();
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572#elif defined(CONFIG_XILINX_ML300)
573 bd->bi_pci_busfreq = get_PCI_freq ();
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574#endif
575#endif
576
9d2b18a0 577 debug ("New Stack Pointer is: %08lx\n", addr_sp);
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578
579 WATCHDOG_RESET ();
580
581#ifdef CONFIG_POST
582 post_bootmode_init();
6dff5529 583 post_run (NULL, POST_ROM | post_bootmode_get(0));
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584#endif
585
586 WATCHDOG_RESET();
587
27b207fd 588 memcpy (id, (void *)gd, sizeof (gd_t));
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589
590 relocate_code (addr_sp, id, addr);
591
592 /* NOTREACHED - relocate_code() does not return */
593}
594
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595/************************************************************************
596 *
597 * This is the next part if the initialization sequence: we are now
598 * running from RAM and have a "normal" C environment, i. e. global
599 * data can be written, BSS has been cleared, the stack size in not
600 * that critical any more, etc.
601 *
602 ************************************************************************
603 */
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604void board_init_r (gd_t *id, ulong dest_addr)
605{
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606 cmd_tbl_t *cmdtp;
607 char *s, *e;
608 bd_t *bd;
609 int i;
610 extern void malloc_bin_reloc (void);
611#ifndef CFG_ENV_IS_NOWHERE
612 extern char * env_name_spec;
613#endif
614
615#ifndef CFG_NO_FLASH
616 ulong flash_size;
617#endif
618
619 gd = id; /* initialize RAM version of global data */
620 bd = gd->bd;
621
622 gd->flags |= GD_FLG_RELOC; /* tell others: relocation done */
bb105f24
MB
623 gd->reloc_off = dest_addr - CFG_MONITOR_BASE;
624
625#ifdef CONFIG_SERIAL_MULTI
626 serial_initialize();
627#endif
fe8c2806 628
9d2b18a0 629 debug ("Now running in RAM - U-Boot at: %08lx\n", dest_addr);
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WD
630
631 WATCHDOG_RESET ();
632
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WD
633#if defined(CONFIG_BOARD_EARLY_INIT_R)
634 board_early_init_r ();
635#endif
636
3b57fe0a 637 monitor_flash_len = (ulong)&__init_end - dest_addr;
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WD
638
639 /*
640 * We have to relocate the command table manually
641 */
8bde7f77 642 for (cmdtp = &__u_boot_cmd_start; cmdtp != &__u_boot_cmd_end; cmdtp++) {
fe8c2806 643 ulong addr;
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WD
644 addr = (ulong) (cmdtp->cmd) + gd->reloc_off;
645#if 0
646 printf ("Command \"%s\": 0x%08lx => 0x%08lx\n",
647 cmdtp->name, (ulong) (cmdtp->cmd), addr);
648#endif
649 cmdtp->cmd =
650 (int (*)(struct cmd_tbl_s *, int, int, char *[]))addr;
651
652 addr = (ulong)(cmdtp->name) + gd->reloc_off;
653 cmdtp->name = (char *)addr;
654
655 if (cmdtp->usage) {
656 addr = (ulong)(cmdtp->usage) + gd->reloc_off;
657 cmdtp->usage = (char *)addr;
658 }
659#ifdef CFG_LONGHELP
660 if (cmdtp->help) {
661 addr = (ulong)(cmdtp->help) + gd->reloc_off;
662 cmdtp->help = (char *)addr;
663 }
664#endif
665 }
666 /* there are some other pointer constants we must deal with */
667#ifndef CFG_ENV_IS_NOWHERE
668 env_name_spec += gd->reloc_off;
669#endif
670
671 WATCHDOG_RESET ();
672
56f94be3 673#ifdef CONFIG_LOGBUFFER
228f29ac 674 logbuff_init_ptrs ();
56f94be3 675#endif
fe8c2806 676#ifdef CONFIG_POST
228f29ac 677 post_output_backlog ();
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WD
678 post_reloc ();
679#endif
680
681 WATCHDOG_RESET();
682
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KG
683#if defined(CONFIG_IP860) || defined(CONFIG_PCU_E) || \
684 defined (CONFIG_FLAGADM) || defined(CONFIG_MPC83XX)
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WD
685 icache_enable (); /* it's time to enable the instruction cache */
686#endif
687
1c8f6d8f 688#if defined(CFG_INIT_RAM_LOCK) && defined(CONFIG_E500)
c837dcb1 689 unlock_ram_in_cache(); /* it's time to unlock D-cache in e500 */
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WD
690#endif
691
3bac3513 692#if defined(CONFIG_BAB7xx) || defined(CONFIG_CPC45)
fe8c2806 693 /*
3bac3513
WD
694 * Do PCI configuration on BAB7xx and CPC45 _before_ the flash
695 * gets initialised, because we need the ISA resp. PCI_to_LOCAL bus
696 * bridge there.
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697 */
698 pci_init ();
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WD
699#endif
700#if defined(CONFIG_BAB7xx)
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701 /*
702 * Initialise the ISA bridge
703 */
704 initialise_w83c553f ();
705#endif
706
707 asm ("sync ; isync");
708
709 /*
710 * Setup trap handlers
711 */
712 trap_init (dest_addr);
713
714#if !defined(CFG_NO_FLASH)
715 puts ("FLASH: ");
716
717 if ((flash_size = flash_init ()) > 0) {
0cb61d7d 718# ifdef CFG_FLASH_CHECKSUM
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WD
719 print_size (flash_size, "");
720 /*
721 * Compute and print flash CRC if flashchecksum is set to 'y'
722 *
723 * NOTE: Maybe we should add some WATCHDOG_RESET()? XXX
724 */
725 s = getenv ("flashchecksum");
726 if (s && (*s == 'y')) {
727 printf (" CRC: %08lX",
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728 crc32 (0, (const unsigned char *) CFG_FLASH_BASE, flash_size)
729 );
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730 }
731 putc ('\n');
0cb61d7d 732# else /* !CFG_FLASH_CHECKSUM */
fe8c2806 733 print_size (flash_size, "\n");
0cb61d7d 734# endif /* CFG_FLASH_CHECKSUM */
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WD
735 } else {
736 puts (failed);
737 hang ();
738 }
739
740 bd->bi_flashstart = CFG_FLASH_BASE; /* update start of FLASH memory */
741 bd->bi_flashsize = flash_size; /* size of FLASH memory (final value) */
fa230445
HS
742
743#if defined(CFG_UPDATE_FLASH_SIZE)
744 /* Make a update of the Memctrl. */
745 update_flash_size (flash_size);
746#endif
747
748
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WD
749# if defined(CONFIG_PCU_E) || defined(CONFIG_OXC) || defined(CONFIG_RMU)
750 /* flash mapped at end of memory map */
751 bd->bi_flashoffset = TEXT_BASE + flash_size;
0cb61d7d 752# elif CFG_MONITOR_BASE == CFG_FLASH_BASE
3b57fe0a 753 bd->bi_flashoffset = monitor_flash_len; /* reserved area for startup monitor */
0cb61d7d 754# else
fe8c2806 755 bd->bi_flashoffset = 0;
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WD
756# endif
757#else /* CFG_NO_FLASH */
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758
759 bd->bi_flashsize = 0;
760 bd->bi_flashstart = 0;
761 bd->bi_flashoffset = 0;
762#endif /* !CFG_NO_FLASH */
763
764 WATCHDOG_RESET ();
765
766 /* initialize higher level parts of CPU like time base and timers */
767 cpu_init_r ();
768
769 WATCHDOG_RESET ();
770
771 /* initialize malloc() area */
772 mem_malloc_init ();
773 malloc_bin_reloc ();
774
775#ifdef CONFIG_SPI
776# if !defined(CFG_ENV_IS_IN_EEPROM)
777 spi_init_f ();
778# endif
779 spi_init_r ();
780#endif
781
887e2ec9
SR
782#if (CONFIG_COMMANDS & CFG_CMD_NAND)
783 WATCHDOG_RESET ();
784 puts ("NAND: ");
785 nand_init(); /* go init the NAND */
786#endif
787
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WD
788 /* relocate environment function pointers etc. */
789 env_relocate ();
790
791 /*
792 * Fill in missing fields of bd_info.
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WD
793 * We do this here, where we have "normal" access to the
794 * environment; we used to do this still running from ROM,
795 * where had to use getenv_r(), which can be pretty slow when
796 * the environment is in EEPROM.
fe8c2806 797 */
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798
799#if defined(CFG_EXTBDINFO)
800#if defined(CONFIG_405GP) || defined(CONFIG_405EP)
801#if defined(CONFIG_I2CFAST)
802 /*
803 * set bi_iic_fast for linux taking environment variable
804 * "i2cfast" into account
805 */
806 {
807 char *s = getenv ("i2cfast");
808 if (s && ((*s == 'y') || (*s == 'Y'))) {
809 bd->bi_iic_fast[0] = 1;
810 bd->bi_iic_fast[1] = 1;
811 } else {
812 bd->bi_iic_fast[0] = 0;
813 bd->bi_iic_fast[1] = 0;
814 }
815 }
816#else
817 bd->bi_iic_fast[0] = 0;
818 bd->bi_iic_fast[1] = 0;
819#endif /* CONFIG_I2CFAST */
820#endif /* CONFIG_405GP, CONFIG_405EP */
821#endif /* CFG_EXTBDINFO */
822
9045f33c 823#if defined(CONFIG_SC3)
ca43ba18
HS
824 sc3_read_eeprom();
825#endif
fe8c2806 826 s = getenv ("ethaddr");
4707fb50
BS
827#if defined (CONFIG_MBX) || \
828 defined (CONFIG_RPXCLASSIC) || \
829 defined(CONFIG_IAD210) || \
830 defined(CONFIG_V38B)
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WD
831 if (s == NULL)
832 board_get_enetaddr (bd->bi_enetaddr);
833 else
834#endif
835 for (i = 0; i < 6; ++i) {
836 bd->bi_enetaddr[i] = s ? simple_strtoul (s, &e, 16) : 0;
837 if (s)
838 s = (*e) ? e + 1 : e;
839 }
840#ifdef CONFIG_HERMES
841 if ((gd->board_type >> 16) == 2)
842 bd->bi_ethspeed = gd->board_type & 0xFFFF;
843 else
844 bd->bi_ethspeed = 0xFFFF;
845#endif
846
847#ifdef CONFIG_NX823
848 load_sernum_ethaddr ();
849#endif
850
e2ffd59b 851#ifdef CONFIG_HAS_ETH1
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WD
852 /* handle the 2nd ethernet address */
853
854 s = getenv ("eth1addr");
855
856 for (i = 0; i < 6; ++i) {
857 bd->bi_enet1addr[i] = s ? simple_strtoul (s, &e, 16) : 0;
858 if (s)
859 s = (*e) ? e + 1 : e;
860 }
861#endif
e2ffd59b 862#ifdef CONFIG_HAS_ETH2
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WD
863 /* handle the 3rd ethernet address */
864
865 s = getenv ("eth2addr");
b79316f2 866#if defined(CONFIG_XPEDITE1K) || defined(CONFIG_METROBOX) || defined(CONFIG_KAREF)
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WD
867 if (s == NULL)
868 board_get_enetaddr(bd->bi_enet2addr);
869 else
870#endif
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WD
871 for (i = 0; i < 6; ++i) {
872 bd->bi_enet2addr[i] = s ? simple_strtoul (s, &e, 16) : 0;
873 if (s)
874 s = (*e) ? e + 1 : e;
875 }
876#endif
877
e2ffd59b 878#ifdef CONFIG_HAS_ETH3
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WD
879 /* handle 4th ethernet address */
880 s = getenv("eth3addr");
b79316f2 881#if defined(CONFIG_XPEDITE1K) || defined(CONFIG_METROBOX) || defined(CONFIG_KAREF)
ba56f625
WD
882 if (s == NULL)
883 board_get_enetaddr(bd->bi_enet3addr);
884 else
885#endif
886 for (i = 0; i < 6; ++i) {
887 bd->bi_enet3addr[i] = s ? simple_strtoul (s, &e, 16) : 0;
888 if (s)
889 s = (*e) ? e + 1 : e;
890 }
891#endif
fe8c2806 892
bea3f28d
HW
893#ifdef CFG_ID_EEPROM
894 mac_read_from_eeprom();
895#endif
896
fe8c2806 897#if defined(CONFIG_TQM8xxL) || defined(CONFIG_TQM8260) || \
fa230445 898 defined(CONFIG_TQM8272) || \
02b11f8e 899 defined(CONFIG_CCM) || defined(CONFIG_KUP4K) || defined(CONFIG_KUP4X)
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WD
900 load_sernum_ethaddr ();
901#endif
902 /* IP Address */
903 bd->bi_ip_addr = getenv_IPaddr ("ipaddr");
904
905 WATCHDOG_RESET ();
906
979bdbc7 907#if defined(CONFIG_PCI) && !defined(CONFIG_BAB7xx) && !defined(CONFIG_CPC45)
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WD
908 /*
909 * Do pci configuration
910 */
911 pci_init ();
912#endif
913
914/** leave this here (after malloc(), environment and PCI are working) **/
915 /* Initialize devices */
916 devices_init ();
917
27b207fd
WD
918 /* Initialize the jump table for applications */
919 jumptable_init ();
fe8c2806
WD
920
921 /* Initialize the console (after the relocation and devices init) */
922 console_init_r ();
fe8c2806
WD
923
924#if defined(CONFIG_CCM) || \
925 defined(CONFIG_COGENT) || \
926 defined(CONFIG_CPCI405) || \
927 defined(CONFIG_EVB64260) || \
56f94be3 928 defined(CONFIG_KUP4K) || \
0608e04d 929 defined(CONFIG_KUP4X) || \
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WD
930 defined(CONFIG_LWMON) || \
931 defined(CONFIG_PCU_E) || \
9045f33c 932 defined(CONFIG_SC3) || \
fe8c2806
WD
933 defined(CONFIG_W7O) || \
934 defined(CONFIG_MISC_INIT_R)
935 /* miscellaneous platform dependent initialisations */
936 misc_init_r ();
937#endif
938
939#ifdef CONFIG_HERMES
940 if (bd->bi_ethspeed != 0xFFFF)
941 hermes_start_lxt980 ((int) bd->bi_ethspeed);
942#endif
943
fe8c2806
WD
944#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
945 WATCHDOG_RESET ();
946 puts ("KGDB: ");
947 kgdb_init ();
948#endif
949
9d2b18a0 950 debug ("U-Boot relocated to %08lx\n", dest_addr);
fe8c2806
WD
951
952 /*
953 * Enable Interrupts
954 */
955 interrupt_init ();
956
957 /* Must happen after interrupts are initialized since
958 * an irq handler gets installed
959 */
42dfe7a1 960#ifdef CONFIG_SERIAL_SOFTWARE_FIFO
fe8c2806
WD
961 serial_buffered_init();
962#endif
963
964#ifdef CONFIG_STATUS_LED
965 status_led_set (STATUS_LED_BOOT, STATUS_LED_BLINKING);
966#endif
967
968 udelay (20);
969
970 set_timer (0);
971
fe8c2806
WD
972 /* Initialize from environment */
973 if ((s = getenv ("loadaddr")) != NULL) {
974 load_addr = simple_strtoul (s, NULL, 16);
975 }
976#if (CONFIG_COMMANDS & CFG_CMD_NET)
977 if ((s = getenv ("bootfile")) != NULL) {
978 copy_filename (BootFile, s, sizeof (BootFile));
979 }
980#endif /* CFG_CMD_NET */
981
982 WATCHDOG_RESET ();
983
984#if (CONFIG_COMMANDS & CFG_CMD_SCSI)
985 WATCHDOG_RESET ();
986 puts ("SCSI: ");
987 scsi_init ();
988#endif
989
990#if (CONFIG_COMMANDS & CFG_CMD_DOC)
991 WATCHDOG_RESET ();
992 puts ("DOC: ");
993 doc_init ();
994#endif
995
63ff004c
MB
996#if (CONFIG_COMMANDS & CFG_CMD_NET)
997#if defined(CONFIG_NET_MULTI)
fe8c2806
WD
998 WATCHDOG_RESET ();
999 puts ("Net: ");
63ff004c 1000#endif
fe8c2806
WD
1001 eth_initialize (bd);
1002#endif
1003
63ff004c
MB
1004#if (CONFIG_COMMANDS & CFG_CMD_NET) && ( \
1005 defined(CONFIG_CCM) || \
1006 defined(CONFIG_ELPT860) || \
1007 defined(CONFIG_EP8260) || \
1008 defined(CONFIG_IP860) || \
1009 defined(CONFIG_IVML24) || \
1010 defined(CONFIG_IVMS8) || \
1011 defined(CONFIG_MPC8260ADS) || \
1012 defined(CONFIG_MPC8266ADS) || \
1013 defined(CONFIG_MPC8560ADS) || \
1014 defined(CONFIG_PCU_E) || \
1015 defined(CONFIG_RPXSUPER) || \
1016 defined(CONFIG_STXGP3) || \
1017 defined(CONFIG_SPD823TS) || \
1018 defined(CONFIG_RESET_PHY_R) )
1019
1020 WATCHDOG_RESET ();
1021 debug ("Reset Ethernet PHY\n");
1022 reset_phy ();
1023#endif
1024
fe8c2806 1025#ifdef CONFIG_POST
6dff5529 1026 post_run (NULL, POST_RAM | post_bootmode_get(0));
fe8c2806
WD
1027#endif
1028
1029#if (CONFIG_COMMANDS & CFG_CMD_PCMCIA) && !(CONFIG_COMMANDS & CFG_CMD_IDE)
1030 WATCHDOG_RESET ();
1031 puts ("PCMCIA:");
1032 pcmcia_init ();
1033#endif
1034
1035#if (CONFIG_COMMANDS & CFG_CMD_IDE)
1036 WATCHDOG_RESET ();
1037# ifdef CONFIG_IDE_8xx_PCCARD
1038 puts ("PCMCIA:");
1039# else
1040 puts ("IDE: ");
1041#endif
ca43ba18
HS
1042#if defined(CONFIG_START_IDE)
1043 if (board_start_ide())
1044 ide_init ();
1045#else
fe8c2806 1046 ide_init ();
ca43ba18 1047#endif
fe8c2806
WD
1048#endif /* CFG_CMD_IDE */
1049
1050#ifdef CONFIG_LAST_STAGE_INIT
1051 WATCHDOG_RESET ();
1052 /*
1053 * Some parts can be only initialized if all others (like
1054 * Interrupts) are up and running (i.e. the PC-style ISA
1055 * keyboard).
1056 */
1057 last_stage_init ();
1058#endif
1059
1060#if (CONFIG_COMMANDS & CFG_CMD_BEDBUG)
1061 WATCHDOG_RESET ();
1062 bedbug_init ();
1063#endif
1064
228f29ac 1065#if defined(CONFIG_PRAM) || defined(CONFIG_LOGBUFFER)
fe8c2806
WD
1066 /*
1067 * Export available size of memory for Linux,
1068 * taking into account the protected RAM at top of memory
1069 */
1070 {
1071 ulong pram;
fe8c2806 1072 uchar memsz[32];
228f29ac
WD
1073#ifdef CONFIG_PRAM
1074 char *s;
fe8c2806
WD
1075
1076 if ((s = getenv ("pram")) != NULL) {
1077 pram = simple_strtoul (s, NULL, 10);
1078 } else {
1079 pram = CONFIG_PRAM;
1080 }
228f29ac
WD
1081#else
1082 pram=0;
1083#endif
1084#ifdef CONFIG_LOGBUFFER
1085 /* Also take the logbuffer into account (pram is in kB) */
1086 pram += (LOGBUFF_LEN+LOGBUFF_OVERHEAD)/1024;
1087#endif
77ddac94
WD
1088 sprintf ((char *)memsz, "%ldk", (bd->bi_memsize / 1024) - pram);
1089 setenv ("mem", (char *)memsz);
fe8c2806
WD
1090 }
1091#endif
1092
1c43771b
WD
1093#ifdef CONFIG_PS2KBD
1094 puts ("PS/2: ");
1095 kbd_init();
1096#endif
1097
4532cb69
WD
1098#ifdef CONFIG_MODEM_SUPPORT
1099 {
1100 extern int do_mdm_init;
1101 do_mdm_init = gd->do_mdm_init;
1102 }
1103#endif
1104
fe8c2806
WD
1105 /* Initialization complete - start the monitor */
1106
1107 /* main_loop() can return to retry autoboot, if so just run it again. */
1108 for (;;) {
1109 WATCHDOG_RESET ();
1110 main_loop ();
1111 }
1112
1113 /* NOTREACHED - no way out of command loop except booting */
1114}
1115
1116void hang (void)
1117{
1118 puts ("### ERROR ### Please RESET the board ###\n");
63e73c9a
WD
1119#ifdef CONFIG_SHOW_BOOT_PROGRESS
1120 show_boot_progress(-30);
1121#endif
fe8c2806
WD
1122 for (;;);
1123}
1124
4532cb69
WD
1125#ifdef CONFIG_MODEM_SUPPORT
1126/* called from main loop (common/main.c) */
77ddac94
WD
1127/* 'inline' - We have to do it fast */
1128static inline void mdm_readline(char *buf, int bufsiz)
1129{
1130 char c;
1131 char *p;
1132 int n;
1133
1134 n = 0;
1135 p = buf;
1136 for(;;) {
1137 c = serial_getc();
1138
1139 /* dbg("(%c)", c); */
1140
1141 switch(c) {
1142 case '\r':
1143 break;
1144 case '\n':
1145 *p = '\0';
1146 return;
1147
1148 default:
1149 if(n++ > bufsiz) {
1150 *p = '\0';
1151 return; /* sanity check */
1152 }
1153 *p = c;
1154 p++;
1155 break;
1156 }
1157 }
1158}
1159
4532cb69
WD
1160extern void dbg(const char *fmt, ...);
1161int mdm_init (void)
1162{
1163 char env_str[16];
1164 char *init_str;
1165 int i;
1166 extern char console_buffer[];
4532cb69
WD
1167 extern void enable_putc(void);
1168 extern int hwflow_onoff(int);
1169
1170 enable_putc(); /* enable serial_putc() */
1171
1172#ifdef CONFIG_HWFLOW
1173 init_str = getenv("mdm_flow_control");
1174 if (init_str && (strcmp(init_str, "rts/cts") == 0))
1175 hwflow_onoff (1);
1176 else
1177 hwflow_onoff(-1);
1178#endif
1179
1180 for (i = 1;;i++) {
1181 sprintf(env_str, "mdm_init%d", i);
1182 if ((init_str = getenv(env_str)) != NULL) {
1183 serial_puts(init_str);
1184 serial_puts("\n");
1185 for(;;) {
1186 mdm_readline(console_buffer, CFG_CBSIZE);
1187 dbg("ini%d: [%s]", i, console_buffer);
1188
1189 if ((strcmp(console_buffer, "OK") == 0) ||
1190 (strcmp(console_buffer, "ERROR") == 0)) {
1191 dbg("ini%d: cmd done", i);
1192 break;
1193 } else /* in case we are originating call ... */
1194 if (strncmp(console_buffer, "CONNECT", 7) == 0) {
1195 dbg("ini%d: connect", i);
1196 return 0;
1197 }
1198 }
1199 } else
1200 break; /* no init string - stop modem init */
1201
1202 udelay(100000);
1203 }
1204
1205 udelay(100000);
1206
1207 /* final stage - wait for connect */
1208 for(;i > 1;) { /* if 'i' > 1 - wait for connection
1209 message from modem */
1210 mdm_readline(console_buffer, CFG_CBSIZE);
1211 dbg("ini_f: [%s]", console_buffer);
1212 if (strncmp(console_buffer, "CONNECT", 7) == 0) {
1213 dbg("ini_f: connected");
1214 return 0;
1215 }
1216 }
1217
1218 return 0;
1219}
1220
4532cb69
WD
1221#endif
1222
fe8c2806
WD
1223#if 0 /* We could use plain global data, but the resulting code is bigger */
1224/*
1225 * Pointer to initial global data area
1226 *
1227 * Here we initialize it.
1228 */
1229#undef XTRN_DECLARE_GLOBAL_DATA_PTR
1230#define XTRN_DECLARE_GLOBAL_DATA_PTR /* empty = allocate here */
1231DECLARE_GLOBAL_DATA_PTR = (gd_t *) (CFG_INIT_RAM_ADDR + CFG_GBL_DATA_OFFSET);
1232#endif /* 0 */
1233
1234/************************************************************************/
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