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Make R5200 specific low level initialization board conditional.
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1======================================================================
2Changes since U-Boot 1.1.4:
3======================================================================
4
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5* Make R5200 specific low level initialization board conditional.
6
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7* Update CPU target identification strings for Coldfire family.
8
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9* Update register definitions for MCF5271.
10
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11* Fix serial console support for MCF5271.
12
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13* Fixes for gcc 3.4 based m68k toolchain,
14 based on patch by Jate Sujjavanich.
15
6ca24c64 16* Added support for BC3450 board
17 Patch by Stefan Strobl, 21. Oct 2005
18
a367d426 19* Update for NC650 board:
20 - Support rev1 and rev2 hardware
21 - adapt to new NAND layer
22 - add CP850 configuration based on NC650
23
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24* MPC5200: enable snooping of DMA transactions on XLB even if no PCI
25 is configured; othrwise DMA accesses aren't cache coherent which
26 causes for example USB to fail.
27
cf48eb9a 28* Some code cleanup
bb74140d 29
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30* Fix dbau1x00 boards broken by dbau1550 patch
31 PLL:s were not set for boards other than 1550.
32 Flash CFI caused card to hang due to undefined CFG_FLASH_BANKS_LIST.
33 Default boot is now bootp for cards other than 1550.
34 Patch by Thomas Lange, 10 Aug 2005
35
36* Fixes common/cmd_flash.c:
37 - fix some compiler/parser error, if using m68k tool chain
38 - optical fix for protect on/off all messages, if using more
39 then one bank
40 Patch by Jens Scharsig, 28 Jul 2005
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42* Fix Quad UART mapping on MCC200 board due to new HW revision
43
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44* Fix JFFS2 support for legacy NAND driver.
45
46* Remove dependencies between DoC code and old legacy NAND driver.
47
48* Fix PM828_PCI target, for which PCI was *not* configured in.
49
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50* Fix Lite5200B support: initialize SDelay register
51 See Freescale's AN3221 "MPC5200B SDRAM Initialization and
52 Configuration", 3.3.1 SDelay--MBAR + 0x0190
53
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54* Changes/fixes for drivers/cfi_flash.c:
55
56 - Add Intel legacy lock/unlock support to common CFI driver
57
58 On some Intel flash's (e.g. Intel J3) legacy unlocking is
59 supported, meaning that unlocking of one sector will unlock
60 all sectors of this bank. Using this feature, unlocking
61 of all sectors upon startup (via env var "unlock=yes") will
62 get much faster.
63
64 - Fixed problem with multiple reads of envronment variable
65 "unlock" as pointed out by Reinhard Arlt & Anders Larsen.
66
67 - Removed unwanted linefeeds from "protect" command when
68 CFG_FLASH_PROTECTION is enabled.
69
70 - Changed p3p400 board to use CFG_FLASH_PROTECTION
71
72 Patch by Stefan Roese, 01 Apr 2006
73
74* Changes/fixes for drivers/cfi_flash.c:
75 - Correctly handle the cases where CFG_HZ != 1000 (several
76 XScale-based boards)
77 - Fix the timeout calculation of buffered writes (off by a
78 factor of 1000)
79 Patch by Anders Larsen, 31 Mar 2006
80
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81* Updates to common PPC4xx onboard (DDR)SDRAM init code (405 and 440)
82
83 405 SDRAM: - The SDRAM parameters can now be defined in the board
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84 config file and the 405 SDRAM controller values will
85 be calculated upon bootup (see PPChameleonEVB).
86 When those settings are not defined in the board
87 config file, the register setup will be as it is now,
88 so this implementation should not break any current
89 design using this code.
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cf48eb9a 91 Thanks to Andrea Marson from DAVE for this patch.
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92
93 440 DDR: - Added function sdram_tr1_set to auto calculate the
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94 TR1 value for the DDR.
95 - Added ECC support (see p3p440).
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96
97 Patch by Stefan Roese, 17 Mar 2006
98
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99* Fix CONFIG_SKIP_LOWLEVEL_INIT dependency in cpu/arm920t/start.S
100 Patch by Peter Menzebach, 13 Oct 2005 [DNX#2006040142000473]
101
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102* Add support for ymodem protocol download
103 Patch by Stefano Babic, 29 Mar 2006
104
105* Memory Map Update for Delta board: U-Boot is at 0x80000000-0x84000000
106