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324f6cfd WD |
1 | /* |
2 | * (C) Copyright 2002 | |
3 | * Wolfgang Denk, DENX Software Engineering, [email protected]. | |
4 | * | |
5 | * See file CREDITS for list of people who contributed to this | |
6 | * project. | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or | |
9 | * modify it under the terms of the GNU General Public License as | |
10 | * published by the Free Software Foundation; either version 2 of | |
11 | * the License, or (at your option) any later version. | |
12 | * | |
13 | * This program is distributed in the hope that it will be useful, | |
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | * GNU General Public License for more details. | |
17 | * | |
18 | * You should have received a copy of the GNU General Public License | |
19 | * along with this program; if not, write to the Free Software | |
20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
21 | * MA 02111-1307 USA | |
228f29ac WD |
22 | * |
23 | * Be sure to mark tests to be run before relocation as such with the | |
24 | * CFG_POST_PREREL flag so that logging is done correctly if the | |
25 | * logbuffer support is enabled. | |
324f6cfd WD |
26 | */ |
27 | ||
28 | #include <common.h> | |
29 | ||
324f6cfd WD |
30 | #include <post.h> |
31 | ||
32 | extern int cache_post_test (int flags); | |
33 | extern int watchdog_post_test (int flags); | |
34 | extern int i2c_post_test (int flags); | |
35 | extern int rtc_post_test (int flags); | |
36 | extern int memory_post_test (int flags); | |
37 | extern int cpu_post_test (int flags); | |
a11e0696 | 38 | extern int fpu_post_test (int flags); |
324f6cfd WD |
39 | extern int uart_post_test (int flags); |
40 | extern int ether_post_test (int flags); | |
41 | extern int spi_post_test (int flags); | |
42 | extern int usb_post_test (int flags); | |
43 | extern int spr_post_test (int flags); | |
4532cb69 | 44 | extern int sysmon_post_test (int flags); |
5a8c51cd | 45 | extern int dsp_post_test (int flags); |
79fa88f3 | 46 | extern int codec_post_test (int flags); |
531e3e8b | 47 | extern int ecc_post_test (int flags); |
4532cb69 | 48 | |
65b20dce YT |
49 | extern int dspic_init_post_test (int flags); |
50 | extern int dspic_post_test (int flags); | |
51 | extern int gdc_post_test (int flags); | |
52 | extern int fpga_post_test (int flags); | |
53 | extern int lwmon5_watchdog_post_test(int flags); | |
54 | extern int sysmon1_post_test(int flags); | |
55 | ||
4532cb69 WD |
56 | extern int sysmon_init_f (void); |
57 | ||
58 | extern void sysmon_reloc (void); | |
59 | ||
324f6cfd WD |
60 | |
61 | struct post_test post_list[] = | |
62 | { | |
63 | #if CONFIG_POST & CFG_POST_CACHE | |
64 | { | |
8bde7f77 WD |
65 | "Cache test", |
66 | "cache", | |
67 | "This test verifies the CPU cache operation.", | |
68 | POST_RAM | POST_ALWAYS, | |
69 | &cache_post_test, | |
70 | NULL, | |
71 | NULL, | |
228f29ac | 72 | CFG_POST_CACHE |
324f6cfd WD |
73 | }, |
74 | #endif | |
75 | #if CONFIG_POST & CFG_POST_WATCHDOG | |
65b20dce YT |
76 | #if defined(CONFIG_POST_WATCHDOG) |
77 | CONFIG_POST_WATCHDOG, | |
78 | #else | |
324f6cfd | 79 | { |
8bde7f77 WD |
80 | "Watchdog timer test", |
81 | "watchdog", | |
82 | "This test checks the watchdog timer.", | |
8564acf9 | 83 | POST_RAM | POST_POWERON | POST_SLOWTEST | POST_MANUAL | POST_REBOOT, |
8bde7f77 WD |
84 | &watchdog_post_test, |
85 | NULL, | |
86 | NULL, | |
228f29ac | 87 | CFG_POST_WATCHDOG |
324f6cfd WD |
88 | }, |
89 | #endif | |
65b20dce | 90 | #endif |
324f6cfd WD |
91 | #if CONFIG_POST & CFG_POST_I2C |
92 | { | |
8bde7f77 WD |
93 | "I2C test", |
94 | "i2c", | |
95 | "This test verifies the I2C operation.", | |
96 | POST_RAM | POST_ALWAYS, | |
97 | &i2c_post_test, | |
98 | NULL, | |
99 | NULL, | |
228f29ac | 100 | CFG_POST_I2C |
324f6cfd WD |
101 | }, |
102 | #endif | |
103 | #if CONFIG_POST & CFG_POST_RTC | |
104 | { | |
8bde7f77 WD |
105 | "RTC test", |
106 | "rtc", | |
107 | "This test verifies the RTC operation.", | |
8564acf9 | 108 | POST_RAM | POST_SLOWTEST | POST_MANUAL, |
8bde7f77 WD |
109 | &rtc_post_test, |
110 | NULL, | |
111 | NULL, | |
228f29ac | 112 | CFG_POST_RTC |
324f6cfd WD |
113 | }, |
114 | #endif | |
115 | #if CONFIG_POST & CFG_POST_MEMORY | |
116 | { | |
8bde7f77 WD |
117 | "Memory test", |
118 | "memory", | |
119 | "This test checks RAM.", | |
8564acf9 | 120 | POST_ROM | POST_POWERON | POST_SLOWTEST | POST_PREREL, |
8bde7f77 WD |
121 | &memory_post_test, |
122 | NULL, | |
123 | NULL, | |
228f29ac | 124 | CFG_POST_MEMORY |
324f6cfd WD |
125 | }, |
126 | #endif | |
127 | #if CONFIG_POST & CFG_POST_CPU | |
128 | { | |
8bde7f77 WD |
129 | "CPU test", |
130 | "cpu", | |
131 | "This test verifies the arithmetic logic unit of" | |
132 | " CPU.", | |
133 | POST_RAM | POST_ALWAYS, | |
134 | &cpu_post_test, | |
135 | NULL, | |
136 | NULL, | |
228f29ac | 137 | CFG_POST_CPU |
324f6cfd WD |
138 | }, |
139 | #endif | |
a11e0696 IL |
140 | #if CONFIG_POST & CFG_POST_FPU |
141 | { | |
142 | "FPU test", | |
143 | "fpu", | |
144 | "This test verifies the arithmetic logic unit of" | |
145 | " FPU.", | |
146 | POST_RAM | POST_ALWAYS, | |
147 | &fpu_post_test, | |
148 | NULL, | |
149 | NULL, | |
150 | CFG_POST_FPU | |
151 | }, | |
152 | #endif | |
324f6cfd WD |
153 | #if CONFIG_POST & CFG_POST_UART |
154 | { | |
8bde7f77 WD |
155 | "UART test", |
156 | "uart", | |
157 | "This test verifies the UART operation.", | |
8564acf9 | 158 | POST_RAM | POST_SLOWTEST | POST_MANUAL, |
8bde7f77 WD |
159 | &uart_post_test, |
160 | NULL, | |
161 | NULL, | |
228f29ac | 162 | CFG_POST_UART |
324f6cfd WD |
163 | }, |
164 | #endif | |
165 | #if CONFIG_POST & CFG_POST_ETHER | |
166 | { | |
8bde7f77 WD |
167 | "ETHERNET test", |
168 | "ethernet", | |
169 | "This test verifies the ETHERNET operation.", | |
170 | POST_RAM | POST_ALWAYS | POST_MANUAL, | |
171 | ðer_post_test, | |
172 | NULL, | |
173 | NULL, | |
228f29ac | 174 | CFG_POST_ETHER |
324f6cfd WD |
175 | }, |
176 | #endif | |
177 | #if CONFIG_POST & CFG_POST_SPI | |
178 | { | |
8bde7f77 WD |
179 | "SPI test", |
180 | "spi", | |
181 | "This test verifies the SPI operation.", | |
182 | POST_RAM | POST_ALWAYS | POST_MANUAL, | |
183 | &spi_post_test, | |
184 | NULL, | |
185 | NULL, | |
228f29ac | 186 | CFG_POST_SPI |
324f6cfd WD |
187 | }, |
188 | #endif | |
189 | #if CONFIG_POST & CFG_POST_USB | |
190 | { | |
8bde7f77 WD |
191 | "USB test", |
192 | "usb", | |
193 | "This test verifies the USB operation.", | |
194 | POST_RAM | POST_ALWAYS | POST_MANUAL, | |
195 | &usb_post_test, | |
196 | NULL, | |
197 | NULL, | |
228f29ac | 198 | CFG_POST_USB |
324f6cfd WD |
199 | }, |
200 | #endif | |
201 | #if CONFIG_POST & CFG_POST_SPR | |
202 | { | |
8bde7f77 WD |
203 | "SPR test", |
204 | "spr", | |
205 | "This test checks SPR contents.", | |
b2e2142c | 206 | POST_RAM | POST_ALWAYS, |
8bde7f77 WD |
207 | &spr_post_test, |
208 | NULL, | |
209 | NULL, | |
228f29ac | 210 | CFG_POST_SPR |
324f6cfd WD |
211 | }, |
212 | #endif | |
4532cb69 WD |
213 | #if CONFIG_POST & CFG_POST_SYSMON |
214 | { | |
8bde7f77 WD |
215 | "SYSMON test", |
216 | "sysmon", | |
217 | "This test monitors system hardware.", | |
218 | POST_RAM | POST_ALWAYS, | |
219 | &sysmon_post_test, | |
220 | &sysmon_init_f, | |
221 | &sysmon_reloc, | |
4532cb69 WD |
222 | CFG_POST_SYSMON |
223 | }, | |
224 | #endif | |
5a8c51cd WD |
225 | #if CONFIG_POST & CFG_POST_DSP |
226 | { | |
227 | "DSP test", | |
228 | "dsp", | |
229 | "This test checks any connected DSP(s).", | |
230 | POST_RAM | POST_MANUAL, | |
231 | &dsp_post_test, | |
232 | NULL, | |
233 | NULL, | |
234 | CFG_POST_DSP | |
235 | }, | |
236 | #endif | |
8dc3b230 | 237 | #if CONFIG_POST & CFG_POST_CODEC |
79fa88f3 WD |
238 | { |
239 | "CODEC test", | |
240 | "codec", | |
241 | "This test checks any connected codec(s).", | |
242 | POST_RAM | POST_MANUAL, | |
243 | &codec_post_test, | |
244 | NULL, | |
245 | NULL, | |
246 | CFG_POST_CODEC | |
247 | }, | |
248 | #endif | |
531e3e8b PK |
249 | #if CONFIG_POST & CFG_POST_ECC |
250 | { | |
251 | "ECC test", | |
252 | "ecc", | |
8dafa874 LJ |
253 | "This test checks the ECC facility of memory.", |
254 | POST_ROM | POST_ALWAYS | POST_PREREL, | |
531e3e8b PK |
255 | &ecc_post_test, |
256 | NULL, | |
257 | NULL, | |
258 | CFG_POST_ECC | |
259 | }, | |
260 | #endif | |
65b20dce YT |
261 | #if CONFIG_POST & CFG_POST_BSPEC1 |
262 | CONFIG_POST_BSPEC1, | |
263 | #endif | |
264 | #if CONFIG_POST & CFG_POST_BSPEC2 | |
265 | CONFIG_POST_BSPEC2, | |
266 | #endif | |
267 | #if CONFIG_POST & CFG_POST_BSPEC3 | |
268 | CONFIG_POST_BSPEC3, | |
269 | #endif | |
270 | #if CONFIG_POST & CFG_POST_BSPEC4 | |
271 | CONFIG_POST_BSPEC4, | |
272 | #endif | |
273 | #if CONFIG_POST & CFG_POST_BSPEC4 | |
274 | CONFIG_POST_BSPEC5, | |
275 | #endif | |
324f6cfd WD |
276 | }; |
277 | ||
278 | unsigned int post_list_size = sizeof (post_list) / sizeof (struct post_test); |