]> Git Repo - u-boot.git/blame - drivers/bios_emulator/atibios.c
dm: core: Add functions to set priv/plat
[u-boot.git] / drivers / bios_emulator / atibios.c
CommitLineData
ece92f85
JJ
1/****************************************************************************
2*
9c7e4b06 3* Video BOOT Graphics Card POST Module
ece92f85
JJ
4*
5* ========================================================================
4c2e3da8 6* Copyright (C) 2007 Freescale Semiconductor, Inc.
ece92f85
JJ
7* Jason Jin <[email protected]>
8*
9* Copyright (C) 1991-2004 SciTech Software, Inc. All rights reserved.
10*
11* This file may be distributed and/or modified under the terms of the
12* GNU General Public License version 2.0 as published by the Free
13* Software Foundation and appearing in the file LICENSE.GPL included
14* in the packaging of this file.
15*
16* Licensees holding a valid Commercial License for this product from
17* SciTech Software, Inc. may use this file in accordance with the
18* Commercial License Agreement provided with the Software.
19*
20* This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING
21* THE WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22* PURPOSE.
23*
24* See http://www.scitechsoft.com/license/ for information about
25* the licensing options available and how to purchase a Commercial
26* License Agreement.
27*
28* Contact [email protected] if any conditions of this licensing
29* are not clear to you, or you have questions about licensing options.
30*
31* ========================================================================
32*
9c7e4b06
WD
33* Language: ANSI C
34* Environment: Linux Kernel
35* Developer: Kendall Bennett
ece92f85 36*
9c7e4b06
WD
37* Description: Module to implement booting PCI/AGP controllers on the
38* bus. We use the x86 real mode emulator to run the BIOS on
39* graphics controllers to bring the cards up.
ece92f85 40*
9c7e4b06
WD
41* Note that at present this module does *not* support
42* multiple controllers.
ece92f85 43*
9c7e4b06
WD
44* The orignal name of this file is warmboot.c.
45* Jason ported this file to u-boot to run the ATI video card
46* BIOS in u-boot.
ece92f85
JJ
47****************************************************************************/
48#include <common.h>
4c59f953
SG
49#include <bios_emul.h>
50#include <errno.h>
f7ae49fc 51#include <log.h>
ece92f85 52#include <malloc.h>
4c59f953 53#include <vbe.h>
c05ed00a 54#include <linux/delay.h>
4c59f953 55#include "biosemui.h"
ece92f85
JJ
56
57/* Length of the BIOS image */
9c7e4b06 58#define MAX_BIOSLEN (128 * 1024L)
ece92f85 59
ece92f85
JJ
60/* Place to save PCI BAR's that we change and later restore */
61static u32 saveROMBaseAddress;
62static u32 saveBaseAddress10;
63static u32 saveBaseAddress14;
64static u32 saveBaseAddress18;
65static u32 saveBaseAddress20;
66
222f25f8
SG
67/* Addres im memory of VBE region */
68const int vbe_offset = 0x2000;
69
ca5eb0c5 70#ifdef CONFIG_FRAMEBUFFER_SET_VESA_MODE
222f25f8
SG
71static const void *bios_ptr(const void *buf, BE_VGAInfo *vga_info,
72 u32 x86_dword_ptr)
73{
74 u32 seg_ofs, flat;
75
76 seg_ofs = le32_to_cpu(x86_dword_ptr);
77 flat = ((seg_ofs & 0xffff0000) >> 12) | (seg_ofs & 0xffff);
78 if (flat >= 0xc0000)
79 return vga_info->BIOSImage + flat - 0xc0000;
80 else
81 return buf + (flat - vbe_offset);
82}
83
84static int atibios_debug_mode(BE_VGAInfo *vga_info, RMREGS *regs,
85 int vesa_mode, struct vbe_mode_info *mode_info)
4c59f953 86{
222f25f8
SG
87 void *buffer = (void *)(M.mem_base + vbe_offset);
88 u16 buffer_seg = (((unsigned long)vbe_offset) >> 4) & 0xff00;
89 u16 buffer_adr = ((unsigned long)vbe_offset) & 0xffff;
90 struct vesa_mode_info *vm;
91 struct vbe_info *info;
92 const u16 *modes_bios, *ptr;
93 u16 *modes;
94 int size;
95
96 debug("VBE: Getting information\n");
97 regs->e.eax = VESA_GET_INFO;
98 regs->e.esi = buffer_seg;
99 regs->e.edi = buffer_adr;
100 info = buffer;
101 memset(info, '\0', sizeof(*info));
102 strcpy(info->signature, "VBE2");
103 BE_int86(0x10, regs, regs);
104 if (regs->e.eax != 0x4f) {
105 debug("VESA_GET_INFO: error %x\n", regs->e.eax);
106 return -ENOSYS;
107 }
108 debug("version %x\n", le16_to_cpu(info->version));
109 debug("oem '%s'\n", (char *)bios_ptr(buffer, vga_info,
110 info->oem_string_ptr));
111 debug("vendor '%s'\n", (char *)bios_ptr(buffer, vga_info,
112 info->vendor_name_ptr));
113 debug("product '%s'\n", (char *)bios_ptr(buffer, vga_info,
114 info->product_name_ptr));
115 debug("rev '%s'\n", (char *)bios_ptr(buffer, vga_info,
116 info->product_rev_ptr));
117 modes_bios = bios_ptr(buffer, vga_info, info->modes_ptr);
118 debug("Modes: ");
119 for (ptr = modes_bios; *ptr != 0xffff; ptr++)
120 debug("%x ", le16_to_cpu(*ptr));
121 debug("\nmemory %dMB\n", le16_to_cpu(info->total_memory) >> 4);
122 size = (ptr - modes_bios) * sizeof(u16) + 2;
123 modes = malloc(size);
124 if (!modes)
125 return -ENOMEM;
126 memcpy(modes, modes_bios, size);
127
128 regs->e.eax = VESA_GET_CUR_MODE;
129 BE_int86(0x10, regs, regs);
130 if (regs->e.eax != 0x4f) {
131 debug("VESA_GET_CUR_MODE: error %x\n", regs->e.eax);
132 return -ENOSYS;
133 }
134 debug("Current mode %x\n", regs->e.ebx);
135
136 for (ptr = modes; *ptr != 0xffff; ptr++) {
137 int mode = le16_to_cpu(*ptr);
138 bool linear_ok;
139 int attr;
140
222f25f8
SG
141 debug("Mode %x: ", mode);
142 memset(buffer, '\0', sizeof(struct vbe_mode_info));
143 regs->e.eax = VESA_GET_MODE_INFO;
144 regs->e.ebx = 0;
145 regs->e.ecx = mode;
146 regs->e.edx = 0;
147 regs->e.esi = buffer_seg;
148 regs->e.edi = buffer_adr;
149 BE_int86(0x10, regs, regs);
150 if (regs->e.eax != 0x4f) {
151 debug("VESA_GET_MODE_INFO: error %x\n", regs->e.eax);
152 continue;
153 }
154 memcpy(mode_info->mode_info_block, buffer,
155 sizeof(struct vesa_mode_info));
156 mode_info->valid = true;
157 vm = &mode_info->vesa;
158 attr = le16_to_cpu(vm->mode_attributes);
159 linear_ok = attr & 0x80;
160 debug("res %d x %d, %d bpp, mm %d, (Linear %s, attr %02x)\n",
161 le16_to_cpu(vm->x_resolution),
162 le16_to_cpu(vm->y_resolution),
163 vm->bits_per_pixel, vm->memory_model,
164 linear_ok ? "OK" : "not available",
165 attr);
166 debug("\tRGB pos=%d,%d,%d, size=%d,%d,%d\n",
167 vm->red_mask_pos, vm->green_mask_pos, vm->blue_mask_pos,
168 vm->red_mask_size, vm->green_mask_size,
169 vm->blue_mask_size);
170 }
171
172 return 0;
173}
174
175static int atibios_set_vesa_mode(RMREGS *regs, int vesa_mode,
176 struct vbe_mode_info *mode_info)
177{
178 void *buffer = (void *)(M.mem_base + vbe_offset);
179 u16 buffer_seg = (((unsigned long)vbe_offset) >> 4) & 0xff00;
180 u16 buffer_adr = ((unsigned long)vbe_offset) & 0xffff;
181 struct vesa_mode_info *vm;
182
4c59f953 183 debug("VBE: Setting VESA mode %#04x\n", vesa_mode);
4c59f953
SG
184 regs->e.eax = VESA_SET_MODE;
185 regs->e.ebx = vesa_mode;
222f25f8
SG
186 /* request linear framebuffer mode and don't clear display */
187 regs->e.ebx |= (1 << 14) | (1 << 15);
4c59f953 188 BE_int86(0x10, regs, regs);
222f25f8
SG
189 if (regs->e.eax != 0x4f) {
190 debug("VESA_SET_MODE: error %x\n", regs->e.eax);
191 return -ENOSYS;
192 }
4c59f953 193
222f25f8
SG
194 memset(buffer, '\0', sizeof(struct vbe_mode_info));
195 debug("VBE: Geting info for VESA mode %#04x\n", vesa_mode);
4c59f953 196 regs->e.eax = VESA_GET_MODE_INFO;
4c59f953 197 regs->e.ecx = vesa_mode;
4c59f953
SG
198 regs->e.esi = buffer_seg;
199 regs->e.edi = buffer_adr;
200 BE_int86(0x10, regs, regs);
222f25f8
SG
201 if (regs->e.eax != 0x4f) {
202 debug("VESA_GET_MODE_INFO: error %x\n", regs->e.eax);
203 return -ENOSYS;
204 }
205
4c59f953 206 memcpy(mode_info->mode_info_block, buffer,
222f25f8 207 sizeof(struct vesa_mode_info));
4c59f953 208 mode_info->valid = true;
222f25f8
SG
209 mode_info->video_mode = vesa_mode;
210 vm = &mode_info->vesa;
211 vm->x_resolution = le16_to_cpu(vm->x_resolution);
212 vm->y_resolution = le16_to_cpu(vm->y_resolution);
213 vm->bytes_per_scanline = le16_to_cpu(vm->bytes_per_scanline);
214 vm->phys_base_ptr = le32_to_cpu(vm->phys_base_ptr);
215 vm->mode_attributes = le16_to_cpu(vm->mode_attributes);
216 debug("VBE: Init complete\n");
4c59f953 217
222f25f8 218 return 0;
4c59f953 219}
ca5eb0c5 220#endif /* CONFIG_FRAMEBUFFER_SET_VESA_MODE */
4c59f953 221
ece92f85
JJ
222/****************************************************************************
223PARAMETERS:
9c7e4b06 224pcidev - PCI device info for the video card on the bus to boot
4c59f953 225vga_info - BIOS emulator VGA info structure
ece92f85
JJ
226
227REMARKS:
228This function executes the BIOS POST code on the controller. We assume that
229at this stage the controller has its I/O and memory space enabled and
230that all other controllers are in a disabled state.
231****************************************************************************/
7282672d
SG
232#ifdef CONFIG_DM_PCI
233static void PCI_doBIOSPOST(struct udevice *pcidev, BE_VGAInfo *vga_info,
234 int vesa_mode, struct vbe_mode_info *mode_info)
235#else
4c59f953
SG
236static void PCI_doBIOSPOST(pci_dev_t pcidev, BE_VGAInfo *vga_info,
237 int vesa_mode, struct vbe_mode_info *mode_info)
7282672d 238#endif
ece92f85
JJ
239{
240 RMREGS regs;
241 RMSREGS sregs;
7282672d
SG
242#ifdef CONFIG_DM_PCI
243 pci_dev_t bdf;
244#endif
ece92f85
JJ
245
246 /* Determine the value to store in AX for BIOS POST. Per the PCI specs,
247 AH must contain the bus and AL must contain the devfn, encoded as
248 (dev << 3) | fn
249 */
250 memset(&regs, 0, sizeof(regs));
251 memset(&sregs, 0, sizeof(sregs));
7282672d
SG
252#ifdef CONFIG_DM_PCI
253 bdf = dm_pci_get_bdf(pcidev);
254 regs.x.ax = (int)PCI_BUS(bdf) << 8 |
255 (int)PCI_DEV(bdf) << 3 | (int)PCI_FUNC(bdf);
256#else
ece92f85
JJ
257 regs.x.ax = ((int)PCI_BUS(pcidev) << 8) |
258 ((int)PCI_DEV(pcidev) << 3) | (int)PCI_FUNC(pcidev);
7282672d 259#endif
ece92f85 260 /*Setup the X86 emulator for the VGA BIOS*/
4c59f953 261 BE_setVGA(vga_info);
ece92f85
JJ
262
263 /*Execute the BIOS POST code*/
264 BE_callRealMode(0xC000, 0x0003, &regs, &sregs);
265
266 /*Cleanup and exit*/
4c59f953
SG
267 BE_getVGA(vga_info);
268
ca5eb0c5 269#ifdef CONFIG_FRAMEBUFFER_SET_VESA_MODE
222f25f8
SG
270 /* Useful for debugging */
271 if (0)
272 atibios_debug_mode(vga_info, &regs, vesa_mode, mode_info);
4c59f953
SG
273 if (vesa_mode != -1)
274 atibios_set_vesa_mode(&regs, vesa_mode, mode_info);
ca5eb0c5 275#endif
ece92f85
JJ
276}
277
278/****************************************************************************
279PARAMETERS:
9c7e4b06
WD
280pcidev - PCI device info for the video card on the bus
281bar - Place to return the base address register offset to use
ece92f85
JJ
282
283RETURNS:
284The address to use to map the secondary BIOS (AGP devices)
285
286REMARKS:
287Searches all the PCI base address registers for the device looking for a
288memory mapping that is large enough to hold our ROM BIOS. We usually end up
289finding the framebuffer mapping (usually BAR 0x10), and we use this mapping
290to map the BIOS for the device into. We use a mapping that is already
291assigned to the device to ensure the memory range will be passed through
292by any PCI->PCI or AGP->PCI bridge that may be present.
293
294NOTE: Usually this function is only used for AGP devices, but it may be
295 used for PCI devices that have already been POST'ed and the BIOS
296 ROM base address has been zero'ed out.
297
298NOTE: This function leaves the original memory aperture disabled by leaving
299 it programmed to all 1's. It must be restored to the correct value
300 later.
301****************************************************************************/
7282672d
SG
302#ifdef CONFIG_DM_PCI
303static u32 PCI_findBIOSAddr(struct udevice *pcidev, int *bar)
304#else
ece92f85 305static u32 PCI_findBIOSAddr(pci_dev_t pcidev, int *bar)
7282672d 306#endif
ece92f85
JJ
307{
308 u32 base, size;
309
310 for (*bar = 0x10; *bar <= 0x14; (*bar) += 4) {
7282672d
SG
311#ifdef CONFIG_DM_PCI
312 dm_pci_read_config32(pcidev, *bar, &base);
313#else
ece92f85 314 pci_read_config_dword(pcidev, *bar, &base);
7282672d 315#endif
ece92f85 316 if (!(base & 0x1)) {
7282672d
SG
317#ifdef CONFIG_DM_PCI
318 dm_pci_write_config32(pcidev, *bar, 0xFFFFFFFF);
319 dm_pci_read_config32(pcidev, *bar, &size);
320#else
ece92f85
JJ
321 pci_write_config_dword(pcidev, *bar, 0xFFFFFFFF);
322 pci_read_config_dword(pcidev, *bar, &size);
7282672d 323#endif
ece92f85
JJ
324 size = ~(size & ~0xFF) + 1;
325 if (size >= MAX_BIOSLEN)
326 return base & ~0xFF;
327 }
328 }
329 return 0;
330}
331
332/****************************************************************************
333REMARKS:
334Some non-x86 Linux kernels map PCI relocateable I/O to values that
335are above 64K, which will not work with the BIOS image that requires
336the offset for the I/O ports to be a maximum of 16-bits. Ideally
337someone should fix the kernel to map the I/O ports for VGA compatible
338devices to a different location (or just all I/O ports since it is
339unlikely you can have enough devices in the machine to use up all
34064K of the I/O space - a total of more than 256 cards would be
341necessary).
342
343Anyway to fix this we change all I/O mapped base registers and
344chop off the top bits.
345****************************************************************************/
7282672d
SG
346#ifdef CONFIG_DM_PCI
347static void PCI_fixupIObase(struct udevice *pcidev, int reg, u32 *base)
348#else
ece92f85 349static void PCI_fixupIObase(pci_dev_t pcidev, int reg, u32 * base)
7282672d 350#endif
ece92f85
JJ
351{
352 if ((*base & 0x1) && (*base > 0xFFFE)) {
353 *base &= 0xFFFF;
7282672d
SG
354#ifdef CONFIG_DM_PCI
355 dm_pci_write_config32(pcidev, reg, *base);
356#else
ece92f85 357 pci_write_config_dword(pcidev, reg, *base);
7282672d 358#endif
ece92f85
JJ
359
360 }
361}
362
363/****************************************************************************
364PARAMETERS:
9c7e4b06 365pcidev - PCI device info for the video card on the bus
ece92f85
JJ
366
367RETURNS:
368Pointers to the mapped BIOS image
369
370REMARKS:
371Maps a pointer to the BIOS image on the graphics card on the PCI bus.
372****************************************************************************/
7282672d
SG
373#ifdef CONFIG_DM_PCI
374void *PCI_mapBIOSImage(struct udevice *pcidev)
375#else
ece92f85 376void *PCI_mapBIOSImage(pci_dev_t pcidev)
7282672d 377#endif
ece92f85 378{
f6a7a2e8 379 u32 BIOSImageBus;
ece92f85
JJ
380 int BIOSImageBAR;
381 u8 *BIOSImage;
382
383 /*Save PCI BAR registers that might get changed*/
7282672d
SG
384#ifdef CONFIG_DM_PCI
385 dm_pci_read_config32(pcidev, PCI_ROM_ADDRESS, &saveROMBaseAddress);
386 dm_pci_read_config32(pcidev, PCI_BASE_ADDRESS_0, &saveBaseAddress10);
387 dm_pci_read_config32(pcidev, PCI_BASE_ADDRESS_1, &saveBaseAddress14);
388 dm_pci_read_config32(pcidev, PCI_BASE_ADDRESS_2, &saveBaseAddress18);
389 dm_pci_read_config32(pcidev, PCI_BASE_ADDRESS_4, &saveBaseAddress20);
390#else
ece92f85
JJ
391 pci_read_config_dword(pcidev, PCI_ROM_ADDRESS, &saveROMBaseAddress);
392 pci_read_config_dword(pcidev, PCI_BASE_ADDRESS_0, &saveBaseAddress10);
393 pci_read_config_dword(pcidev, PCI_BASE_ADDRESS_1, &saveBaseAddress14);
394 pci_read_config_dword(pcidev, PCI_BASE_ADDRESS_2, &saveBaseAddress18);
395 pci_read_config_dword(pcidev, PCI_BASE_ADDRESS_4, &saveBaseAddress20);
7282672d 396#endif
ece92f85
JJ
397
398 /*Fix up I/O base registers to less than 64K */
399 if(saveBaseAddress14 != 0)
400 PCI_fixupIObase(pcidev, PCI_BASE_ADDRESS_1, &saveBaseAddress14);
401 else
402 PCI_fixupIObase(pcidev, PCI_BASE_ADDRESS_4, &saveBaseAddress20);
403
404 /* Some cards have problems that stop us from being able to read the
405 BIOS image from the ROM BAR. To fix this we have to do some chipset
406 specific programming for different cards to solve this problem.
9c7e4b06 407 */
ece92f85 408
f6a7a2e8
ES
409 BIOSImageBus = PCI_findBIOSAddr(pcidev, &BIOSImageBAR);
410 if (BIOSImageBus == 0) {
ece92f85
JJ
411 printf("Find bios addr error\n");
412 return NULL;
413 }
414
7282672d
SG
415#ifdef CONFIG_DM_PCI
416 BIOSImage = dm_pci_bus_to_virt(pcidev, BIOSImageBus,
417 PCI_REGION_MEM, 0, MAP_NOCACHE);
418
419 /*Change the PCI BAR registers to map it onto the bus.*/
420 dm_pci_write_config32(pcidev, BIOSImageBAR, 0);
421 dm_pci_write_config32(pcidev, PCI_ROM_ADDRESS, BIOSImageBus | 0x1);
422#else
f6a7a2e8
ES
423 BIOSImage = pci_bus_to_virt(pcidev, BIOSImageBus,
424 PCI_REGION_MEM, 0, MAP_NOCACHE);
ece92f85
JJ
425
426 /*Change the PCI BAR registers to map it onto the bus.*/
427 pci_write_config_dword(pcidev, BIOSImageBAR, 0);
f6a7a2e8 428 pci_write_config_dword(pcidev, PCI_ROM_ADDRESS, BIOSImageBus | 0x1);
7282672d 429#endif
ece92f85
JJ
430 udelay(1);
431
432 /*Check that the BIOS image is valid. If not fail, or return the
433 compiled in BIOS image if that option was enabled
434 */
435 if (BIOSImage[0] != 0x55 || BIOSImage[1] != 0xAA || BIOSImage[2] == 0) {
436 return NULL;
437 }
438
439 return BIOSImage;
440}
441
442/****************************************************************************
443PARAMETERS:
9c7e4b06 444pcidev - PCI device info for the video card on the bus
ece92f85
JJ
445
446REMARKS:
447Unmaps the BIOS image for the device and restores framebuffer mappings
448****************************************************************************/
7282672d
SG
449#ifdef CONFIG_DM_PCI
450void PCI_unmapBIOSImage(struct udevice *pcidev, void *BIOSImage)
451{
452 dm_pci_write_config32(pcidev, PCI_ROM_ADDRESS, saveROMBaseAddress);
453 dm_pci_write_config32(pcidev, PCI_BASE_ADDRESS_0, saveBaseAddress10);
454 dm_pci_write_config32(pcidev, PCI_BASE_ADDRESS_1, saveBaseAddress14);
455 dm_pci_write_config32(pcidev, PCI_BASE_ADDRESS_2, saveBaseAddress18);
456 dm_pci_write_config32(pcidev, PCI_BASE_ADDRESS_4, saveBaseAddress20);
457}
458#else
ece92f85
JJ
459void PCI_unmapBIOSImage(pci_dev_t pcidev, void *BIOSImage)
460{
461 pci_write_config_dword(pcidev, PCI_ROM_ADDRESS, saveROMBaseAddress);
462 pci_write_config_dword(pcidev, PCI_BASE_ADDRESS_0, saveBaseAddress10);
463 pci_write_config_dword(pcidev, PCI_BASE_ADDRESS_1, saveBaseAddress14);
464 pci_write_config_dword(pcidev, PCI_BASE_ADDRESS_2, saveBaseAddress18);
465 pci_write_config_dword(pcidev, PCI_BASE_ADDRESS_4, saveBaseAddress20);
466}
7282672d 467#endif
ece92f85
JJ
468
469/****************************************************************************
470PARAMETERS:
9c7e4b06 471pcidev - PCI device info for the video card on the bus to boot
ece92f85
JJ
472VGAInfo - BIOS emulator VGA info structure
473
474RETURNS:
472d5460 475true if successfully initialised, false if not.
ece92f85
JJ
476
477REMARKS:
478Loads and POST's the display controllers BIOS, directly from the BIOS
479image we can extract over the PCI bus.
480****************************************************************************/
7282672d
SG
481#ifdef CONFIG_DM_PCI
482static int PCI_postController(struct udevice *pcidev, uchar *bios_rom,
483 int bios_len, BE_VGAInfo *vga_info,
484 int vesa_mode, struct vbe_mode_info *mode_info)
485#else
4c59f953
SG
486static int PCI_postController(pci_dev_t pcidev, uchar *bios_rom, int bios_len,
487 BE_VGAInfo *vga_info, int vesa_mode,
488 struct vbe_mode_info *mode_info)
7282672d 489#endif
ece92f85 490{
4c59f953
SG
491 u32 bios_image_len;
492 uchar *mapped_bios;
493 uchar *copy_of_bios;
7282672d
SG
494#ifdef CONFIG_DM_PCI
495 pci_dev_t bdf;
496#endif
4c59f953
SG
497
498 if (bios_rom) {
499 copy_of_bios = bios_rom;
500 bios_image_len = bios_len;
501 } else {
502 /*
503 * Allocate memory to store copy of BIOS from display
504 * controller
505 */
506 mapped_bios = PCI_mapBIOSImage(pcidev);
507 if (mapped_bios == NULL) {
508 printf("videoboot: Video ROM failed to map!\n");
509 return false;
510 }
ece92f85 511
4c59f953 512 bios_image_len = mapped_bios[2] * 512;
ece92f85 513
4c59f953
SG
514 copy_of_bios = malloc(bios_image_len);
515 if (copy_of_bios == NULL) {
516 printf("videoboot: Out of memory!\n");
517 return false;
518 }
519 memcpy(copy_of_bios, mapped_bios, bios_image_len);
520 PCI_unmapBIOSImage(pcidev, mapped_bios);
ece92f85 521 }
ece92f85 522
4c59f953 523 /*Save information in vga_info structure*/
7282672d
SG
524#ifdef CONFIG_DM_PCI
525 bdf = dm_pci_get_bdf(pcidev);
526 vga_info->function = PCI_FUNC(bdf);
527 vga_info->device = PCI_DEV(bdf);
528 vga_info->bus = PCI_BUS(bdf);
529#else
4c59f953
SG
530 vga_info->function = PCI_FUNC(pcidev);
531 vga_info->device = PCI_DEV(pcidev);
532 vga_info->bus = PCI_BUS(pcidev);
7282672d 533#endif
4c59f953
SG
534 vga_info->pcidev = pcidev;
535 vga_info->BIOSImage = copy_of_bios;
536 vga_info->BIOSImageLen = bios_image_len;
ece92f85
JJ
537
538 /*Now execute the BIOS POST for the device*/
4c59f953 539 if (copy_of_bios[0] != 0x55 || copy_of_bios[1] != 0xAA) {
ece92f85
JJ
540 printf("videoboot: Video ROM image is invalid!\n");
541 return false;
542 }
543
4c59f953 544 PCI_doBIOSPOST(pcidev, vga_info, vesa_mode, mode_info);
ece92f85
JJ
545
546 /*Reset the size of the BIOS image to the final size*/
4c59f953 547 vga_info->BIOSImageLen = copy_of_bios[2] * 512;
ece92f85
JJ
548 return true;
549}
550
7282672d
SG
551#ifdef CONFIG_DM_PCI
552int biosemu_setup(struct udevice *pcidev, BE_VGAInfo **vga_infop)
553#else
4c59f953 554int biosemu_setup(pci_dev_t pcidev, BE_VGAInfo **vga_infop)
7282672d 555#endif
ece92f85
JJ
556{
557 BE_VGAInfo *VGAInfo;
7282672d
SG
558#ifdef CONFIG_DM_PCI
559 pci_dev_t bdf = dm_pci_get_bdf(pcidev);
ece92f85
JJ
560
561 printf("videoboot: Booting PCI video card bus %d, function %d, device %d\n",
7282672d
SG
562 PCI_BUS(bdf), PCI_FUNC(bdf), PCI_DEV(bdf));
563#else
564 printf("videoboot: Booting PCI video card bus %d, function %d, device %d\n",
565 PCI_BUS(pcidev), PCI_FUNC(pcidev), PCI_DEV(pcidev));
566#endif
ece92f85
JJ
567 /*Initialise the x86 BIOS emulator*/
568 if ((VGAInfo = malloc(sizeof(*VGAInfo))) == NULL) {
569 printf("videoboot: Out of memory!\n");
4c59f953 570 return -ENOMEM;
ece92f85
JJ
571 }
572 memset(VGAInfo, 0, sizeof(*VGAInfo));
573 BE_init(0, 65536, VGAInfo, 0);
4c59f953 574 *vga_infop = VGAInfo;
ece92f85 575
4c59f953
SG
576 return 0;
577}
ece92f85 578
4c59f953
SG
579void biosemu_set_interrupt_handler(int intnum, int (*int_func)(void))
580{
581 X86EMU_setupIntrFunc(intnum, (X86EMU_intrFuncs)int_func);
582}
583
7282672d
SG
584#ifdef CONFIG_DM_PCI
585int biosemu_run(struct udevice *pcidev, uchar *bios_rom, int bios_len,
586 BE_VGAInfo *vga_info, int clean_up, int vesa_mode,
587 struct vbe_mode_info *mode_info)
588#else
4c59f953
SG
589int biosemu_run(pci_dev_t pcidev, uchar *bios_rom, int bios_len,
590 BE_VGAInfo *vga_info, int clean_up, int vesa_mode,
591 struct vbe_mode_info *mode_info)
7282672d 592#endif
4c59f953
SG
593{
594 /*Post all the display controller BIOS'es*/
595 if (!PCI_postController(pcidev, bios_rom, bios_len, vga_info,
596 vesa_mode, mode_info))
597 return -EINVAL;
598
599 /*
600 * Cleanup and exit the emulator if requested. If the BIOS emulator
601 * is needed after booting the card, we will not call BE_exit and
602 * leave it enabled for further use (ie: VESA driver etc).
ece92f85 603 */
4c59f953 604 if (clean_up) {
ece92f85 605 BE_exit();
6e7b5f22 606 if (vga_info->BIOSImage &&
2cd11a23 607 (ulong)(vga_info->BIOSImage) != 0xc0000)
4c59f953
SG
608 free(vga_info->BIOSImage);
609 free(vga_info);
ece92f85 610 }
4c59f953
SG
611
612 return 0;
613}
614
615/****************************************************************************
616PARAMETERS:
617pcidev - PCI device info for the video card on the bus to boot
618pVGAInfo - Place to return VGA info structure is requested
619cleanUp - true to clean up on exit, false to leave emulator active
620
621REMARKS:
622Boots the PCI/AGP video card on the bus using the Video ROM BIOS image
623and the X86 BIOS emulator module.
624****************************************************************************/
7282672d
SG
625#ifdef CONFIG_DM_PCI
626int BootVideoCardBIOS(struct udevice *pcidev, BE_VGAInfo **pVGAInfo,
627 int clean_up)
628#else
4c59f953 629int BootVideoCardBIOS(pci_dev_t pcidev, BE_VGAInfo **pVGAInfo, int clean_up)
7282672d 630#endif
4c59f953
SG
631{
632 BE_VGAInfo *VGAInfo;
633 int ret;
634
635 ret = biosemu_setup(pcidev, &VGAInfo);
636 if (ret)
637 return false;
638 ret = biosemu_run(pcidev, NULL, 0, VGAInfo, clean_up, -1, NULL);
639 if (ret)
640 return false;
641
642 /* Return VGA info pointer if the caller requested it*/
ece92f85
JJ
643 if (pVGAInfo)
644 *pVGAInfo = VGAInfo;
4c59f953 645
ece92f85
JJ
646 return true;
647}
This page took 0.360802 seconds and 4 git commands to generate.