projects / u-boot.git / blame
| Commit | Line | Data |
|---|---|---|
| 83d290c5 | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
| b5d289fc AD |
2 | /* |
| 3 | * (C) Copyright 2010 | |
| 4 | * Ilko Iliev <[email protected]> | |
| 5 | * Asen Dimov <[email protected]> | |
| 6 | * Ronetix GmbH <www.ronetix.at> | |
| 7 | * | |
| 8 | * (C) Copyright 2007-2008 | |
| c9e798d3 | 9 | * Stelian Pop <[email protected]> |
| b5d289fc AD |
10 | * Lead Tech Design <www.leadtechdesign.com> |
| 11 | * | |
| 12 | * Configuation settings for the PM9G45 board. | |
| b5d289fc AD |
13 | */ |
| 14 | ||
| 15 | #ifndef __CONFIG_H | |
| 16 | #define __CONFIG_H | |
| 17 | ||
| b5d289fc | 18 | /* ARM asynchronous clock */ |
| d9bd4290 II |
19 | #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 |
| 20 | #define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* from 12 MHz crystal */ | |
| b5d289fc | 21 | |
| b5d289fc | 22 | /* SDRAM */ |
| d9bd4290 II |
23 | #define CONFIG_SYS_SDRAM_BASE 0x70000000 |
| 24 | #define CONFIG_SYS_SDRAM_SIZE 0x08000000 | |
| 25 | ||
| b5d289fc AD |
26 | /* NAND flash */ |
| 27 | #ifdef CONFIG_CMD_NAND | |
| d9bd4290 II |
28 | #define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3 |
| 29 | #define CONFIG_SYS_NAND_DBW_8 | |
| b5d289fc | 30 | /* our ALE is AD21 */ |
| d9bd4290 | 31 | #define CONFIG_SYS_NAND_MASK_ALE BIT(21) |
| b5d289fc | 32 | /* our CLE is AD22 */ |
| d9bd4290 II |
33 | #define CONFIG_SYS_NAND_MASK_CLE BIT(22) |
| 34 | #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14 | |
| 35 | #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PD3 | |
| b5d289fc AD |
36 | #endif |
| 37 | ||
| d9bd4290 II |
38 | #ifdef CONFIG_NAND_BOOT |
| 39 | /* bootstrap + u-boot + env in nandflash */ | |
| d9bd4290 II |
40 | #elif CONFIG_SD_BOOT |
| 41 | /* bootstrap + u-boot + env + linux in mmc */ | |
| d9bd4290 | 42 | #endif |
| b5d289fc | 43 | |
| d9bd4290 | 44 | /* Defines for SPL */ |
| d9bd4290 | 45 | |
| d9bd4290 | 46 | #ifdef CONFIG_SD_BOOT |
| d9bd4290 | 47 | #elif CONFIG_NAND_BOOT |
| d9bd4290 | 48 | #define CONFIG_SYS_NAND_U_BOOT_SIZE 0x80000 |
| d9bd4290 | 49 | |
| d9bd4290 II |
50 | #define CONFIG_SYS_NAND_ECCSIZE 256 |
| 51 | #define CONFIG_SYS_NAND_ECCBYTES 3 | |
| d9bd4290 II |
52 | #define CONFIG_SYS_NAND_ECCPOS { 40, 41, 42, 43, 44, 45, 46, 47, \ |
| 53 | 48, 49, 50, 51, 52, 53, 54, 55, \ | |
| 54 | 56, 57, 58, 59, 60, 61, 62, 63, } | |
| 55 | #endif | |
| b5d289fc | 56 | |
| d9bd4290 II |
57 | #define CONFIG_SYS_MASTER_CLOCK 132096000 |
| 58 | #define CONFIG_SYS_AT91_PLLA 0x20c73f03 | |
| 59 | #define CONFIG_SYS_MCKR 0x1301 | |
| 60 | #define CONFIG_SYS_MCKR_CSS 0x1302 | |
| 510f794c | 61 | |
| b5d289fc | 62 | #endif |