[u-boot.git] / drivers / video / imx / mxc_ipuv3_fb.c

// SPDX-License-Identifier: GPL-2.0+
/*
 * Porting to u-boot:
 *
 * (C) Copyright 2010
 * Stefano Babic, DENX Software Engineering, [email protected]
 *
 * MX51 Linux framebuffer:
 *
 * (C) Copyright 2004-2010 Freescale Semiconductor, Inc.
 */

#include <log.h>
#include <part.h>
#include <asm/cache.h>
#include <linux/errno.h>
#include <asm/global_data.h>
#include <linux/string.h>
#include <linux/list.h>
#include <linux/fb.h>
#include <asm/io.h>
#include <asm/mach-imx/video.h>
#include <malloc.h>
#include "../videomodes.h"
#include "ipu.h"
#include "mxcfb.h"
#include "ipu_regs.h"
#include "display.h"
#include <panel.h>

#include <dm.h>
#include <video.h>

DECLARE_GLOBAL_DATA_PTR;

static int mxcfb_map_video_memory(struct fb_info *fbi);
static int mxcfb_unmap_video_memory(struct fb_info *fbi);

static struct fb_videomode const *gmode;
static uint8_t gdisp;
static uint32_t gpixfmt;

static void fb_videomode_to_var(struct fb_var_screeninfo *var,
			 const struct fb_videomode *mode)
{
	var->xres = mode->xres;
	var->yres = mode->yres;
	var->xres_virtual = mode->xres;
	var->yres_virtual = mode->yres;
	var->xoffset = 0;
	var->yoffset = 0;
	var->pixclock = mode->pixclock;
	var->left_margin = mode->left_margin;
	var->right_margin = mode->right_margin;
	var->upper_margin = mode->upper_margin;
	var->lower_margin = mode->lower_margin;
	var->hsync_len = mode->hsync_len;
	var->vsync_len = mode->vsync_len;
	var->sync = mode->sync;
	var->vmode = mode->vmode & FB_VMODE_MASK;
}

/*
 * Structure containing the MXC specific framebuffer information.
 */
struct mxcfb_info {
	struct udevice *udev;
	int blank;
	ipu_channel_t ipu_ch;
	int ipu_di;
	u32 ipu_di_pix_fmt;
	unsigned char overlay;
	unsigned char alpha_chan_en;
	dma_addr_t alpha_phy_addr0;
	dma_addr_t alpha_phy_addr1;
	void *alpha_virt_addr0;
	void *alpha_virt_addr1;
	uint32_t alpha_mem_len;
	uint32_t cur_ipu_buf;
	uint32_t cur_ipu_alpha_buf;

	u32 pseudo_palette[16];
};

enum {
	BOTH_ON,
	SRC_ON,
	TGT_ON,
	BOTH_OFF
};

static unsigned long default_bpp = 16;
static unsigned char g_dp_in_use;
static struct fb_info *mxcfb_info[3];
static int ext_clk_used;

static uint32_t bpp_to_pixfmt(struct fb_info *fbi)
{
	uint32_t pixfmt = 0;

	debug("bpp_to_pixfmt: %d\n", fbi->var.bits_per_pixel);

	if (fbi->var.nonstd)
		return fbi->var.nonstd;

	switch (fbi->var.bits_per_pixel) {
	case 24:
		pixfmt = IPU_PIX_FMT_BGR24;
		break;
	case 32:
		pixfmt = IPU_PIX_FMT_BGR32;
		break;
	case 16:
		pixfmt = IPU_PIX_FMT_RGB565;
		break;
	}
	return pixfmt;
}

static int setup_disp_channel1(struct fb_info *fbi)
{
	ipu_channel_params_t params;
	struct mxcfb_info *mxc_fbi = (struct mxcfb_info *)fbi->par;

	memset(&params, 0, sizeof(params));
	params.mem_dp_bg_sync.di = mxc_fbi->ipu_di;

	debug("%s called\n", __func__);
	/*
	 * Assuming interlaced means yuv output, below setting also
	 * valid for mem_dc_sync. FG should have the same vmode as BG.
	 */
	if (fbi->var.vmode & FB_VMODE_INTERLACED) {
		params.mem_dp_bg_sync.interlaced = 1;
		params.mem_dp_bg_sync.out_pixel_fmt =
			IPU_PIX_FMT_YUV444;
	} else {
		if (mxc_fbi->ipu_di_pix_fmt) {
			params.mem_dp_bg_sync.out_pixel_fmt =
				mxc_fbi->ipu_di_pix_fmt;
		} else {
			params.mem_dp_bg_sync.out_pixel_fmt =
				IPU_PIX_FMT_RGB666;
		}
	}
	params.mem_dp_bg_sync.in_pixel_fmt = bpp_to_pixfmt(fbi);
	if (mxc_fbi->alpha_chan_en)
		params.mem_dp_bg_sync.alpha_chan_en = 1;

	ipu_init_channel(mxc_fbi->ipu_ch, &params);

	return 0;
}

static int setup_disp_channel2(struct fb_info *fbi)
{
	int retval = 0;
	struct mxcfb_info *mxc_fbi = (struct mxcfb_info *)fbi->par;

	mxc_fbi->cur_ipu_buf = 1;
	if (mxc_fbi->alpha_chan_en)
		mxc_fbi->cur_ipu_alpha_buf = 1;

	fbi->var.xoffset = fbi->var.yoffset = 0;

	debug("%s: %x %d %d %d %lx %lx\n",
		__func__,
		mxc_fbi->ipu_ch,
		fbi->var.xres,
		fbi->var.yres,
		fbi->fix.line_length,
		fbi->fix.smem_start,
		fbi->fix.smem_start +
		(fbi->fix.line_length * fbi->var.yres));

	retval = ipu_init_channel_buffer(mxc_fbi->ipu_ch, IPU_INPUT_BUFFER,
					 bpp_to_pixfmt(fbi),
					 fbi->var.xres, fbi->var.yres,
					 fbi->fix.line_length,
					 fbi->fix.smem_start +
					 (fbi->fix.line_length * fbi->var.yres),
					 fbi->fix.smem_start,
					 0, 0);
	if (retval)
		printf("ipu_init_channel_buffer error %d\n", retval);

	return retval;
}

/*
 * Set framebuffer parameters and change the operating mode.
 *
 * @param       info     framebuffer information pointer
 */
static int mxcfb_set_par(struct fb_info *fbi)
{
	int retval = 0;
	u32 mem_len;
	ipu_di_signal_cfg_t sig_cfg;
	struct mxcfb_info *mxc_fbi = (struct mxcfb_info *)fbi->par;
	uint32_t out_pixel_fmt;

	ipu_disable_channel(mxc_fbi->ipu_ch);
	ipu_uninit_channel(mxc_fbi->ipu_ch);

	mem_len = fbi->var.yres_virtual * fbi->fix.line_length;
	if (!fbi->fix.smem_start || (mem_len > fbi->fix.smem_len)) {
		if (fbi->fix.smem_start)
			mxcfb_unmap_video_memory(fbi);

		if (mxcfb_map_video_memory(fbi) < 0)
			return -ENOMEM;
	}

	setup_disp_channel1(fbi);

	memset(&sig_cfg, 0, sizeof(sig_cfg));
	if (fbi->var.vmode & FB_VMODE_INTERLACED) {
		sig_cfg.interlaced = 1;
		out_pixel_fmt = IPU_PIX_FMT_YUV444;
	} else {
		if (mxc_fbi->ipu_di_pix_fmt)
			out_pixel_fmt = mxc_fbi->ipu_di_pix_fmt;
		else
			out_pixel_fmt = IPU_PIX_FMT_RGB666;
	}
	if (fbi->var.vmode & FB_VMODE_ODD_FLD_FIRST) /* PAL */
		sig_cfg.odd_field_first = 1;
	if ((fbi->var.sync & FB_SYNC_EXT) || ext_clk_used)
		sig_cfg.ext_clk = 1;
	if (fbi->var.sync & FB_SYNC_HOR_HIGH_ACT)
		sig_cfg.Hsync_pol = 1;
	if (fbi->var.sync & FB_SYNC_VERT_HIGH_ACT)
		sig_cfg.Vsync_pol = 1;
	if (!(fbi->var.sync & FB_SYNC_CLK_LAT_FALL))
		sig_cfg.clk_pol = 1;
	if (fbi->var.sync & FB_SYNC_DATA_INVERT)
		sig_cfg.data_pol = 1;
	if (!(fbi->var.sync & FB_SYNC_OE_LOW_ACT))
		sig_cfg.enable_pol = 1;
	if (fbi->var.sync & FB_SYNC_CLK_IDLE_EN)
		sig_cfg.clkidle_en = 1;

	debug("pixclock = %lu Hz\n", PICOS2KHZ(fbi->var.pixclock) * 1000UL);

	if (ipu_init_sync_panel(mxc_fbi->ipu_di,
				(PICOS2KHZ(fbi->var.pixclock)) * 1000UL,
				fbi->var.xres, fbi->var.yres,
				out_pixel_fmt,
				fbi->var.left_margin,
				fbi->var.hsync_len,
				fbi->var.right_margin,
				fbi->var.upper_margin,
				fbi->var.vsync_len,
				fbi->var.lower_margin,
				0, sig_cfg) != 0) {
		puts("mxcfb: Error initializing panel.\n");
		return -EINVAL;
	}

	retval = setup_disp_channel2(fbi);
	if (retval)
		return retval;

	if (mxc_fbi->blank == FB_BLANK_UNBLANK)
		ipu_enable_channel(mxc_fbi->ipu_ch);

	return retval;
}

/*
 * Check framebuffer variable parameters and adjust to valid values.
 *
 * @param       var      framebuffer variable parameters
 *
 * @param       info     framebuffer information pointer
 */
static int mxcfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
{
	u32 vtotal;
	u32 htotal;

	if (var->xres_virtual < var->xres)
		var->xres_virtual = var->xres;
	if (var->yres_virtual < var->yres)
		var->yres_virtual = var->yres;

	if ((var->bits_per_pixel != 32) && (var->bits_per_pixel != 24) &&
	    (var->bits_per_pixel != 16) && (var->bits_per_pixel != 8))
		var->bits_per_pixel = default_bpp;

	switch (var->bits_per_pixel) {
	case 8:
		var->red.length = 3;
		var->red.offset = 5;
		var->red.msb_right = 0;

		var->green.length = 3;
		var->green.offset = 2;
		var->green.msb_right = 0;

		var->blue.length = 2;
		var->blue.offset = 0;
		var->blue.msb_right = 0;

		var->transp.length = 0;
		var->transp.offset = 0;
		var->transp.msb_right = 0;
		break;
	case 16:
		var->red.length = 5;
		var->red.offset = 11;
		var->red.msb_right = 0;

		var->green.length = 6;
		var->green.offset = 5;
		var->green.msb_right = 0;

		var->blue.length = 5;
		var->blue.offset = 0;
		var->blue.msb_right = 0;

		var->transp.length = 0;
		var->transp.offset = 0;
		var->transp.msb_right = 0;
		break;
	case 24:
		var->red.length = 8;
		var->red.offset = 16;
		var->red.msb_right = 0;

		var->green.length = 8;
		var->green.offset = 8;
		var->green.msb_right = 0;

		var->blue.length = 8;
		var->blue.offset = 0;
		var->blue.msb_right = 0;

		var->transp.length = 0;
		var->transp.offset = 0;
		var->transp.msb_right = 0;
		break;
	case 32:
		var->red.length = 8;
		var->red.offset = 16;
		var->red.msb_right = 0;

		var->green.length = 8;
		var->green.offset = 8;
		var->green.msb_right = 0;

		var->blue.length = 8;
		var->blue.offset = 0;
		var->blue.msb_right = 0;

		var->transp.length = 8;
		var->transp.offset = 24;
		var->transp.msb_right = 0;
		break;
	}

	if (var->pixclock < 1000) {
		htotal = var->xres + var->right_margin + var->hsync_len +
		    var->left_margin;
		vtotal = var->yres + var->lower_margin + var->vsync_len +
		    var->upper_margin;
		var->pixclock = (vtotal * htotal * 6UL) / 100UL;
		var->pixclock = KHZ2PICOS(var->pixclock);
		printf("pixclock set for 60Hz refresh = %u ps\n",
			var->pixclock);
	}

	var->height = -1;
	var->width = -1;
	var->grayscale = 0;

	return 0;
}

static int mxcfb_map_video_memory(struct fb_info *fbi)
{
	struct mxcfb_info *mxc_fbi = (struct mxcfb_info *)fbi->par;
	struct video_uc_plat *plat = dev_get_uclass_plat(mxc_fbi->udev);

	if (fbi->fix.smem_len < fbi->var.yres_virtual * fbi->fix.line_length) {
		fbi->fix.smem_len = fbi->var.yres_virtual *
				    fbi->fix.line_length;
	}
	fbi->fix.smem_len = roundup(fbi->fix.smem_len, ARCH_DMA_MINALIGN);

	fbi->screen_base = (char *)plat->base;

	fbi->fix.smem_start = (unsigned long)fbi->screen_base;
	if (fbi->screen_base == 0) {
		puts("Unable to allocate framebuffer memory\n");
		fbi->fix.smem_len = 0;
		fbi->fix.smem_start = 0;
		return -EBUSY;
	}

	debug("allocated fb @ paddr=0x%08X, size=%d.\n",
		(uint32_t) fbi->fix.smem_start, fbi->fix.smem_len);

	fbi->screen_size = fbi->fix.smem_len;
	gd->fb_base = fbi->fix.smem_start;

	/* Clear the screen */
	memset((char *)fbi->screen_base, 0, fbi->fix.smem_len);

	return 0;
}

static int mxcfb_unmap_video_memory(struct fb_info *fbi)
{
	fbi->screen_base = 0;
	fbi->fix.smem_start = 0;
	fbi->fix.smem_len = 0;
	return 0;
}

/*
 * Initializes the framebuffer information pointer. After allocating
 * sufficient memory for the framebuffer structure, the fields are
 * filled with custom information passed in from the configurable
 * structures.  This includes information such as bits per pixel,
 * color maps, screen width/height and RGBA offsets.
 *
 * Return:      Framebuffer structure initialized with our information
 */
static struct fb_info *mxcfb_init_fbinfo(void)
{
#define BYTES_PER_LONG 4
#define PADDING (BYTES_PER_LONG - (sizeof(struct fb_info) % BYTES_PER_LONG))
	struct fb_info *fbi;
	struct mxcfb_info *mxcfbi;
	char *p;
	int size = sizeof(struct mxcfb_info) + PADDING +
		sizeof(struct fb_info);

	debug("%s: %d %d %d %d\n",
		__func__,
		PADDING,
		size,
		sizeof(struct mxcfb_info),
		sizeof(struct fb_info));
	/*
	 * Allocate sufficient memory for the fb structure
	 */

	p = malloc(size);
	if (!p)
		return NULL;

	memset(p, 0, size);

	fbi = (struct fb_info *)p;
	fbi->par = p + sizeof(struct fb_info) + PADDING;

	mxcfbi = (struct mxcfb_info *)fbi->par;
	debug("Framebuffer structures at: fbi=0x%x mxcfbi=0x%x\n",
		(unsigned int)fbi, (unsigned int)mxcfbi);

	fbi->var.activate = FB_ACTIVATE_NOW;

	fbi->flags = FBINFO_FLAG_DEFAULT;
	fbi->pseudo_palette = mxcfbi->pseudo_palette;

	return fbi;
}

extern struct clk *g_ipu_clk;

/*
 * Probe routine for the framebuffer driver. It is called during the
 * driver binding process. The following functions are performed in
 * this routine: Framebuffer initialization, Memory allocation and
 * mapping, Framebuffer registration, IPU initialization.
 *
 * Return:      Appropriate error code to the kernel common code
 */
static int mxcfb_probe(struct udevice *dev, u32 interface_pix_fmt,
		       uint8_t disp, struct fb_videomode const *mode)
{
	struct fb_info *fbi;
	struct mxcfb_info *mxcfbi;

	/*
	 * Initialize FB structures
	 */
	fbi = mxcfb_init_fbinfo();
	if (!fbi)
		return -ENOMEM;

	mxcfbi = (struct mxcfb_info *)fbi->par;

	if (!g_dp_in_use) {
		mxcfbi->ipu_ch = MEM_BG_SYNC;
		mxcfbi->blank = FB_BLANK_UNBLANK;
	} else {
		mxcfbi->ipu_ch = MEM_DC_SYNC;
		mxcfbi->blank = FB_BLANK_POWERDOWN;
	}

	mxcfbi->ipu_di = disp;
	mxcfbi->udev = dev;

	if (!ipu_clk_enabled())
		clk_enable(g_ipu_clk);

	ipu_disp_set_global_alpha(mxcfbi->ipu_ch, 1, 0x80);
	ipu_disp_set_color_key(mxcfbi->ipu_ch, 0, 0);

	g_dp_in_use = 1;

	mxcfb_info[mxcfbi->ipu_di] = fbi;

	/* Need dummy values until real panel is configured */

	mxcfbi->ipu_di_pix_fmt = interface_pix_fmt;
	fb_videomode_to_var(&fbi->var, mode);
	fbi->var.bits_per_pixel = 16;
	fbi->fix.line_length = fbi->var.xres_virtual *
			       (fbi->var.bits_per_pixel / 8);
	fbi->fix.smem_len = fbi->var.yres_virtual * fbi->fix.line_length;

	mxcfb_check_var(&fbi->var, fbi);

	/* Default Y virtual size is 2x panel size */
	fbi->var.yres_virtual = fbi->var.yres * 2;

	/* allocate fb first */
	if (mxcfb_map_video_memory(fbi) < 0)
		return -ENOMEM;

	mxcfb_set_par(fbi);

#ifdef DEBUG
	ipu_dump_registers();
#endif

	return 0;
}

void ipuv3_fb_shutdown(void)
{
	int i;
	struct ipu_stat *stat = (struct ipu_stat *)IPU_STAT;

	if (!ipu_clk_enabled())
		return;

	for (i = 0; i < ARRAY_SIZE(mxcfb_info); i++) {
		struct fb_info *fbi = mxcfb_info[i];
		if (fbi) {
			struct mxcfb_info *mxc_fbi = fbi->par;
			ipu_disable_channel(mxc_fbi->ipu_ch);
			ipu_uninit_channel(mxc_fbi->ipu_ch);
		}
	}
	for (i = 0; i < ARRAY_SIZE(stat->int_stat); i++) {
		__raw_writel(__raw_readl(&stat->int_stat[i]),
			     &stat->int_stat[i]);
	}
}

int ipuv3_fb_init(struct fb_videomode const *mode,
		  uint8_t disp,
		  uint32_t pixfmt)
{
	gmode = mode;
	gdisp = disp;
	gpixfmt = pixfmt;

	return 0;
}

enum {
	/* Maximum display size we support */
	LCD_MAX_WIDTH		= 1920,
	LCD_MAX_HEIGHT		= 1080,
	LCD_MAX_LOG2_BPP	= VIDEO_BPP16,
};

static int ipuv3_video_probe(struct udevice *dev)
{
	struct video_uc_plat *plat = dev_get_uclass_plat(dev);
	struct video_priv *uc_priv = dev_get_uclass_priv(dev);
#if defined(CONFIG_DISPLAY)
	struct udevice *disp_dev;
#endif
	u32 fb_start, fb_end;
	int ret;

	debug("%s() plat: base 0x%lx, size 0x%x\n",
	      __func__, plat->base, plat->size);

	ret = ipu_probe();
	if (ret)
		return ret;

	ret = ipu_displays_init();
	if (ret < 0)
		return ret;

	ret = mxcfb_probe(dev, gpixfmt, gdisp, gmode);
	if (ret < 0)
		return ret;

#if defined(CONFIG_DISPLAY)
	ret = uclass_first_device_err(UCLASS_DISPLAY, &disp_dev);
	if (!ret)
		ret = display_enable(disp_dev, 16, NULL);
	if (ret < 0)
		return ret;
#endif
	if (IS_ENABLED(CONFIG_PANEL)) {
		struct udevice *panel_dev;

		ret = uclass_get_device(UCLASS_PANEL, 0, &panel_dev);
		if (panel_dev)
			panel_enable_backlight(panel_dev);
	}

	uc_priv->xsize = gmode->xres;
	uc_priv->ysize = gmode->yres;
	uc_priv->bpix = LCD_MAX_LOG2_BPP;

	/* Enable dcache for the frame buffer */
	fb_start = plat->base & ~(MMU_SECTION_SIZE - 1);
	fb_end = plat->base + plat->size;
	fb_end = ALIGN(fb_end, 1 << MMU_SECTION_SHIFT);
	mmu_set_region_dcache_behaviour(fb_start, fb_end - fb_start,
					DCACHE_WRITEBACK);
	video_set_flush_dcache(dev, true);
	gd->fb_base = fb_start;

	return 0;
}

struct ipuv3_video_priv {
	ulong regs;
};

static int ipuv3_video_bind(struct udevice *dev)
{
	struct video_uc_plat *plat = dev_get_uclass_plat(dev);

	plat->size = LCD_MAX_WIDTH * LCD_MAX_HEIGHT *
		     (1 << VIDEO_BPP32) / 8;

	return 0;
}

static const struct udevice_id ipuv3_video_ids[] = {
#ifdef CONFIG_ARCH_MX6
	{ .compatible = "fsl,imx6q-ipu" },
#endif
#ifdef CONFIG_ARCH_MX5
	{ .compatible = "fsl,imx53-ipu" },
#endif
	{ }
};

U_BOOT_DRIVER(fsl_imx6q_ipu) = {
	.name	= "fsl_imx6q_ipu",
	.id	= UCLASS_VIDEO,
	.of_match = ipuv3_video_ids,
	.bind	= ipuv3_video_bind,
	.probe	= ipuv3_video_probe,
	.priv_auto	= sizeof(struct ipuv3_video_priv),
	.flags	= DM_FLAG_PRE_RELOC,
};
Commit	Line	Data
83d290c5	1	// SPDX-License-Identifier: GPL-2.0+
5dda7945 SB	2	/*
	3	* Porting to u-boot:
	4	*
	5	* (C) Copyright 2010
	6	* Stefano Babic, DENX Software Engineering, [email protected]
	7	*
	8	* MX51 Linux framebuffer:
	9	*
	10	* (C) Copyright 2004-2010 Freescale Semiconductor, Inc.
5dda7945 SB	11	*/
5dda7945 SB	12
f7ae49fc	13	#include <log.h>
e6f6f9e6	14	#include <part.h>
90526e9f	15	#include <asm/cache.h>
1221ce45	16	#include <linux/errno.h>
a69214dc	17	#include <asm/global_data.h>
5dda7945 SB	18	#include <linux/string.h>
	19	#include <linux/list.h>
	20	#include <linux/fb.h>
	21	#include <asm/io.h>
57f065fe	22	#include <asm/mach-imx/video.h>
5dda7945	23	#include <malloc.h>
bffd1314	24	#include "../videomodes.h"
5dda7945 SB	25	#include "ipu.h"
5dda7945 SB	26	#include "mxcfb.h"
5f8e17ce	27	#include "ipu_regs.h"
f4ec1ae0	28	#include "display.h"
42a7ce27	29	#include <panel.h>
5dda7945	30
57f065fe AG	31	#include <dm.h>
	32	#include <video.h>
	33
a69214dc EN	34	DECLARE_GLOBAL_DATA_PTR;
a69214dc EN	35
5dda7945 SB	36	static int mxcfb_map_video_memory(struct fb_info *fbi);
	37	static int mxcfb_unmap_video_memory(struct fb_info *fbi);
	38
09c8bb26	39	static struct fb_videomode const *gmode;
02ae1a18 MV	40	static uint8_t gdisp;
02ae1a18 MV	41	static uint32_t gpixfmt;
5dda7945	42
c5fe2532	43	static void fb_videomode_to_var(struct fb_var_screeninfo *var,
5dda7945 SB	44	const struct fb_videomode *mode)
	45	{
	46	var->xres = mode->xres;
	47	var->yres = mode->yres;
	48	var->xres_virtual = mode->xres;
	49	var->yres_virtual = mode->yres;
	50	var->xoffset = 0;
	51	var->yoffset = 0;
	52	var->pixclock = mode->pixclock;
	53	var->left_margin = mode->left_margin;
	54	var->right_margin = mode->right_margin;
	55	var->upper_margin = mode->upper_margin;
	56	var->lower_margin = mode->lower_margin;
	57	var->hsync_len = mode->hsync_len;
	58	var->vsync_len = mode->vsync_len;
	59	var->sync = mode->sync;
	60	var->vmode = mode->vmode & FB_VMODE_MASK;
	61	}
	62
	63	/*
	64	* Structure containing the MXC specific framebuffer information.
	65	*/
	66	struct mxcfb_info {
3ce83ee0	67	struct udevice *udev;
5dda7945 SB	68	int blank;
	69	ipu_channel_t ipu_ch;
	70	int ipu_di;
	71	u32 ipu_di_pix_fmt;
	72	unsigned char overlay;
	73	unsigned char alpha_chan_en;
	74	dma_addr_t alpha_phy_addr0;
	75	dma_addr_t alpha_phy_addr1;
	76	void *alpha_virt_addr0;
	77	void *alpha_virt_addr1;
	78	uint32_t alpha_mem_len;
	79	uint32_t cur_ipu_buf;
	80	uint32_t cur_ipu_alpha_buf;
	81
	82	u32 pseudo_palette[16];
	83	};
	84
	85	enum {
	86	BOTH_ON,
	87	SRC_ON,
	88	TGT_ON,
	89	BOTH_OFF
	90	};
	91
	92	static unsigned long default_bpp = 16;
	93	static unsigned char g_dp_in_use;
	94	static struct fb_info *mxcfb_info[3];
	95	static int ext_clk_used;
	96
	97	static uint32_t bpp_to_pixfmt(struct fb_info *fbi)
	98	{
	99	uint32_t pixfmt = 0;
	100
	101	debug("bpp_to_pixfmt: %d\n", fbi->var.bits_per_pixel);
	102
	103	if (fbi->var.nonstd)
	104	return fbi->var.nonstd;
	105
	106	switch (fbi->var.bits_per_pixel) {
	107	case 24:
	108	pixfmt = IPU_PIX_FMT_BGR24;
	109	break;
	110	case 32:
	111	pixfmt = IPU_PIX_FMT_BGR32;
	112	break;
	113	case 16:
	114	pixfmt = IPU_PIX_FMT_RGB565;
	115	break;
	116	}
	117	return pixfmt;
	118	}
	119
5dda7945 SB	120	static int setup_disp_channel1(struct fb_info *fbi)
	121	{
	122	ipu_channel_params_t params;
	123	struct mxcfb_info mxc_fbi = (struct mxcfb_info )fbi->par;
	124
	125	memset(&params, 0, sizeof(params));
	126	params.mem_dp_bg_sync.di = mxc_fbi->ipu_di;
	127
	128	debug("%s called\n", __func__);
	129	/*
	130	* Assuming interlaced means yuv output, below setting also
	131	* valid for mem_dc_sync. FG should have the same vmode as BG.
	132	*/
	133	if (fbi->var.vmode & FB_VMODE_INTERLACED) {
	134	params.mem_dp_bg_sync.interlaced = 1;
	135	params.mem_dp_bg_sync.out_pixel_fmt =
	136	IPU_PIX_FMT_YUV444;
	137	} else {
	138	if (mxc_fbi->ipu_di_pix_fmt) {
	139	params.mem_dp_bg_sync.out_pixel_fmt =
	140	mxc_fbi->ipu_di_pix_fmt;
	141	} else {
	142	params.mem_dp_bg_sync.out_pixel_fmt =
	143	IPU_PIX_FMT_RGB666;
	144	}
	145	}
	146	params.mem_dp_bg_sync.in_pixel_fmt = bpp_to_pixfmt(fbi);
	147	if (mxc_fbi->alpha_chan_en)
	148	params.mem_dp_bg_sync.alpha_chan_en = 1;
	149
	150	ipu_init_channel(mxc_fbi->ipu_ch, &params);
	151
	152	return 0;
	153	}
	154
	155	static int setup_disp_channel2(struct fb_info *fbi)
	156	{
	157	int retval = 0;
	158	struct mxcfb_info mxc_fbi = (struct mxcfb_info )fbi->par;
	159
	160	mxc_fbi->cur_ipu_buf = 1;
	161	if (mxc_fbi->alpha_chan_en)
	162	mxc_fbi->cur_ipu_alpha_buf = 1;
	163
	164	fbi->var.xoffset = fbi->var.yoffset = 0;
	165
	166	debug("%s: %x %d %d %d %lx %lx\n",
	167	__func__,
	168	mxc_fbi->ipu_ch,
	169	fbi->var.xres,
	170	fbi->var.yres,
	171	fbi->fix.line_length,
	172	fbi->fix.smem_start,
	173	fbi->fix.smem_start +
	174	(fbi->fix.line_length * fbi->var.yres));
	175
	176	retval = ipu_init_channel_buffer(mxc_fbi->ipu_ch, IPU_INPUT_BUFFER,
	177	bpp_to_pixfmt(fbi),
	178	fbi->var.xres, fbi->var.yres,
	179	fbi->fix.line_length,
	180	fbi->fix.smem_start +
	181	(fbi->fix.line_length * fbi->var.yres),
	182	fbi->fix.smem_start,
	183	0, 0);
184	if (retval)
185	printf("ipu_init_channel_buffer error %d\n", retval);
186
187	return retval;
188	}
189
190	/*
191	* Set framebuffer parameters and change the operating mode.
192	*
193	* @param info framebuffer information pointer
194	*/
195	static int mxcfb_set_par(struct fb_info *fbi)
196	{
197	int retval = 0;
198	u32 mem_len;
199	ipu_di_signal_cfg_t sig_cfg;
200	struct mxcfb_info mxc_fbi = (struct mxcfb_info )fbi->par;
201	uint32_t out_pixel_fmt;
202
203	ipu_disable_channel(mxc_fbi->ipu_ch);
204	ipu_uninit_channel(mxc_fbi->ipu_ch);
5dda7945 SB	205
	206	mem_len = fbi->var.yres_virtual * fbi->fix.line_length;
	207	if (!fbi->fix.smem_start \|\| (mem_len > fbi->fix.smem_len)) {
	208	if (fbi->fix.smem_start)
	209	mxcfb_unmap_video_memory(fbi);
	210
	211	if (mxcfb_map_video_memory(fbi) < 0)
	212	return -ENOMEM;
	213	}
	214
	215	setup_disp_channel1(fbi);
	216
	217	memset(&sig_cfg, 0, sizeof(sig_cfg));
	218	if (fbi->var.vmode & FB_VMODE_INTERLACED) {
	219	sig_cfg.interlaced = 1;
	220	out_pixel_fmt = IPU_PIX_FMT_YUV444;
	221	} else {
	222	if (mxc_fbi->ipu_di_pix_fmt)
	223	out_pixel_fmt = mxc_fbi->ipu_di_pix_fmt;
	224	else
	225	out_pixel_fmt = IPU_PIX_FMT_RGB666;
	226	}
	227	if (fbi->var.vmode & FB_VMODE_ODD_FLD_FIRST) /* PAL */
	228	sig_cfg.odd_field_first = 1;
	229	if ((fbi->var.sync & FB_SYNC_EXT) \|\| ext_clk_used)
	230	sig_cfg.ext_clk = 1;
	231	if (fbi->var.sync & FB_SYNC_HOR_HIGH_ACT)
	232	sig_cfg.Hsync_pol = 1;
	233	if (fbi->var.sync & FB_SYNC_VERT_HIGH_ACT)
	234	sig_cfg.Vsync_pol = 1;
	235	if (!(fbi->var.sync & FB_SYNC_CLK_LAT_FALL))
	236	sig_cfg.clk_pol = 1;
	237	if (fbi->var.sync & FB_SYNC_DATA_INVERT)
	238	sig_cfg.data_pol = 1;
	239	if (!(fbi->var.sync & FB_SYNC_OE_LOW_ACT))
	240	sig_cfg.enable_pol = 1;
	241	if (fbi->var.sync & FB_SYNC_CLK_IDLE_EN)
	242	sig_cfg.clkidle_en = 1;
	243
c1420328	244	debug("pixclock = %lu Hz\n", PICOS2KHZ(fbi->var.pixclock) * 1000UL);
5dda7945 SB	245
	246	if (ipu_init_sync_panel(mxc_fbi->ipu_di,
	247	(PICOS2KHZ(fbi->var.pixclock)) * 1000UL,
	248	fbi->var.xres, fbi->var.yres,
	249	out_pixel_fmt,
	250	fbi->var.left_margin,
	251	fbi->var.hsync_len,
	252	fbi->var.right_margin,
	253	fbi->var.upper_margin,
	254	fbi->var.vsync_len,
	255	fbi->var.lower_margin,
	256	0, sig_cfg) != 0) {
	257	puts("mxcfb: Error initializing panel.\n");
	258	return -EINVAL;
	259	}
	260
	261	retval = setup_disp_channel2(fbi);
	262	if (retval)
	263	return retval;
	264
	265	if (mxc_fbi->blank == FB_BLANK_UNBLANK)
	266	ipu_enable_channel(mxc_fbi->ipu_ch);
	267
	268	return retval;
	269	}
	270
	271	/*
	272	* Check framebuffer variable parameters and adjust to valid values.
	273	*
	274	* @param var framebuffer variable parameters
	275	*
	276	* @param info framebuffer information pointer
	277	*/
	278	static int mxcfb_check_var(struct fb_var_screeninfo var, struct fb_info info)
	279	{
	280	u32 vtotal;
	281	u32 htotal;
	282
	283	if (var->xres_virtual < var->xres)
	284	var->xres_virtual = var->xres;
	285	if (var->yres_virtual < var->yres)
	286	var->yres_virtual = var->yres;
	287
	288	if ((var->bits_per_pixel != 32) && (var->bits_per_pixel != 24) &&
	289	(var->bits_per_pixel != 16) && (var->bits_per_pixel != 8))
	290	var->bits_per_pixel = default_bpp;
	291
	292	switch (var->bits_per_pixel) {
	293	case 8:
	294	var->red.length = 3;
	295	var->red.offset = 5;
	296	var->red.msb_right = 0;
	297
	298	var->green.length = 3;
	299	var->green.offset = 2;
	300	var->green.msb_right = 0;
	301
	302	var->blue.length = 2;
	303	var->blue.offset = 0;
	304	var->blue.msb_right = 0;
	305
	306	var->transp.length = 0;
	307	var->transp.offset = 0;
	308	var->transp.msb_right = 0;
309	break;
310	case 16:
311	var->red.length = 5;
312	var->red.offset = 11;
313	var->red.msb_right = 0;
314
315	var->green.length = 6;
316	var->green.offset = 5;
317	var->green.msb_right = 0;
318
319	var->blue.length = 5;
320	var->blue.offset = 0;
321	var->blue.msb_right = 0;
322
323	var->transp.length = 0;
324	var->transp.offset = 0;
325	var->transp.msb_right = 0;
326	break;
327	case 24:
328	var->red.length = 8;
329	var->red.offset = 16;
330	var->red.msb_right = 0;
331
332	var->green.length = 8;
333	var->green.offset = 8;
334	var->green.msb_right = 0;
335
336	var->blue.length = 8;
337	var->blue.offset = 0;
338	var->blue.msb_right = 0;
339
340	var->transp.length = 0;
341	var->transp.offset = 0;
342	var->transp.msb_right = 0;
343	break;
344	case 32:
345	var->red.length = 8;
346	var->red.offset = 16;
347	var->red.msb_right = 0;
348
349	var->green.length = 8;
350	var->green.offset = 8;
351	var->green.msb_right = 0;
352
353	var->blue.length = 8;
354	var->blue.offset = 0;
355	var->blue.msb_right = 0;
356
357	var->transp.length = 8;
358	var->transp.offset = 24;
359	var->transp.msb_right = 0;
360	break;
361	}
362
363	if (var->pixclock < 1000) {
364	htotal = var->xres + var->right_margin + var->hsync_len +
365	var->left_margin;
366	vtotal = var->yres + var->lower_margin + var->vsync_len +
367	var->upper_margin;
368	var->pixclock = (vtotal * htotal * 6UL) / 100UL;
369	var->pixclock = KHZ2PICOS(var->pixclock);
370	printf("pixclock set for 60Hz refresh = %u ps\n",
371	var->pixclock);
372	}
373
374	var->height = -1;
375	var->width = -1;
376	var->grayscale = 0;
377
378	return 0;
379	}
380
381	static int mxcfb_map_video_memory(struct fb_info *fbi)
382	{
3ce83ee0	383	struct mxcfb_info mxc_fbi = (struct mxcfb_info )fbi->par;
8a8d24bd	384	struct video_uc_plat *plat = dev_get_uclass_plat(mxc_fbi->udev);
3ce83ee0	385
5dda7945 SB	386	if (fbi->fix.smem_len < fbi->var.yres_virtual * fbi->fix.line_length) {
	387	fbi->fix.smem_len = fbi->var.yres_virtual *
	388	fbi->fix.line_length;
	389	}
4acb4d39	390	fbi->fix.smem_len = roundup(fbi->fix.smem_len, ARCH_DMA_MINALIGN);
57f065fe	391
3ce83ee0	392	fbi->screen_base = (char *)plat->base;
57f065fe	393
e9934f0b	394	fbi->fix.smem_start = (unsigned long)fbi->screen_base;
5dda7945 SB	395	if (fbi->screen_base == 0) {
	396	puts("Unable to allocate framebuffer memory\n");
	397	fbi->fix.smem_len = 0;
	398	fbi->fix.smem_start = 0;
	399	return -EBUSY;
	400	}
	401
	402	debug("allocated fb @ paddr=0x%08X, size=%d.\n",
	403	(uint32_t) fbi->fix.smem_start, fbi->fix.smem_len);
	404
	405	fbi->screen_size = fbi->fix.smem_len;
a69214dc EN	406	gd->fb_base = fbi->fix.smem_start;
a69214dc EN	407
5dda7945 SB	408	/* Clear the screen */
	409	memset((char *)fbi->screen_base, 0, fbi->fix.smem_len);
	410
	411	return 0;
	412	}
	413
	414	static int mxcfb_unmap_video_memory(struct fb_info *fbi)
	415	{
	416	fbi->screen_base = 0;
	417	fbi->fix.smem_start = 0;
	418	fbi->fix.smem_len = 0;
	419	return 0;
	420	}
	421
	422	/*
	423	* Initializes the framebuffer information pointer. After allocating
	424	* sufficient memory for the framebuffer structure, the fields are
	425	* filled with custom information passed in from the configurable
	426	* structures. This includes information such as bits per pixel,
	427	* color maps, screen width/height and RGBA offsets.
	428	*
185f812c	429	* Return: Framebuffer structure initialized with our information
5dda7945 SB	430	*/
	431	static struct fb_info *mxcfb_init_fbinfo(void)
	432	{
	433	#define BYTES_PER_LONG 4
	434	#define PADDING (BYTES_PER_LONG - (sizeof(struct fb_info) % BYTES_PER_LONG))
	435	struct fb_info *fbi;
	436	struct mxcfb_info *mxcfbi;
	437	char *p;
	438	int size = sizeof(struct mxcfb_info) + PADDING +
	439	sizeof(struct fb_info);
	440
	441	debug("%s: %d %d %d %d\n",
	442	__func__,
	443	PADDING,
	444	size,
	445	sizeof(struct mxcfb_info),
	446	sizeof(struct fb_info));
	447	/*
	448	* Allocate sufficient memory for the fb structure
	449	*/
	450
	451	p = malloc(size);
	452	if (!p)
	453	return NULL;
	454
	455	memset(p, 0, size);
	456
	457	fbi = (struct fb_info *)p;
	458	fbi->par = p + sizeof(struct fb_info) + PADDING;
	459
	460	mxcfbi = (struct mxcfb_info *)fbi->par;
	461	debug("Framebuffer structures at: fbi=0x%x mxcfbi=0x%x\n",
	462	(unsigned int)fbi, (unsigned int)mxcfbi);
	463
	464	fbi->var.activate = FB_ACTIVATE_NOW;
	465
	466	fbi->flags = FBINFO_FLAG_DEFAULT;
	467	fbi->pseudo_palette = mxcfbi->pseudo_palette;
	468
	469	return fbi;
	470	}
	471
db755b36 AG	472	extern struct clk *g_ipu_clk;
db755b36 AG	473
5dda7945 SB	474	/*
5dda7945 SB	475	* Probe routine for the framebuffer driver. It is called during the
c1420328	476	* driver binding process. The following functions are performed in
5dda7945 SB	477	* this routine: Framebuffer initialization, Memory allocation and
	478	* mapping, Framebuffer registration, IPU initialization.
	479	*
185f812c	480	* Return: Appropriate error code to the kernel common code
5dda7945	481	*/
3ce83ee0 AG	482	static int mxcfb_probe(struct udevice *dev, u32 interface_pix_fmt,
3ce83ee0 AG	483	uint8_t disp, struct fb_videomode const *mode)
5dda7945 SB	484	{
	485	struct fb_info *fbi;
	486	struct mxcfb_info *mxcfbi;
5dda7945 SB	487
	488	/*
	489	* Initialize FB structures
	490	*/
	491	fbi = mxcfb_init_fbinfo();
db755b36 AG	492	if (!fbi)
	493	return -ENOMEM;
	494
5dda7945 SB	495	mxcfbi = (struct mxcfb_info *)fbi->par;
	496
	497	if (!g_dp_in_use) {
	498	mxcfbi->ipu_ch = MEM_BG_SYNC;
	499	mxcfbi->blank = FB_BLANK_UNBLANK;
	500	} else {
	501	mxcfbi->ipu_ch = MEM_DC_SYNC;
	502	mxcfbi->blank = FB_BLANK_POWERDOWN;
	503	}
	504
02ae1a18	505	mxcfbi->ipu_di = disp;
3ce83ee0	506	mxcfbi->udev = dev;
5dda7945	507
db755b36 AG	508	if (!ipu_clk_enabled())
	509	clk_enable(g_ipu_clk);
	510
5dda7945 SB	511	ipu_disp_set_global_alpha(mxcfbi->ipu_ch, 1, 0x80);
5dda7945 SB	512	ipu_disp_set_color_key(mxcfbi->ipu_ch, 0, 0);
5dda7945 SB	513
	514	g_dp_in_use = 1;
	515
	516	mxcfb_info[mxcfbi->ipu_di] = fbi;
	517
	518	/* Need dummy values until real panel is configured */
5dda7945 SB	519
	520	mxcfbi->ipu_di_pix_fmt = interface_pix_fmt;
	521	fb_videomode_to_var(&fbi->var, mode);
e9934f0b	522	fbi->var.bits_per_pixel = 16;
db755b36 AG	523	fbi->fix.line_length = fbi->var.xres_virtual *
db755b36 AG	524	(fbi->var.bits_per_pixel / 8);
e9934f0b	525	fbi->fix.smem_len = fbi->var.yres_virtual * fbi->fix.line_length;
5dda7945 SB	526
	527	mxcfb_check_var(&fbi->var, fbi);
	528
	529	/* Default Y virtual size is 2x panel size */
	530	fbi->var.yres_virtual = fbi->var.yres * 2;
	531
c1420328	532	/* allocate fb first */
5dda7945 SB	533	if (mxcfb_map_video_memory(fbi) < 0)
	534	return -ENOMEM;
	535
	536	mxcfb_set_par(fbi);
	537
db755b36	538	#ifdef DEBUG
5dda7945	539	ipu_dump_registers();
db755b36	540	#endif
5dda7945 SB	541
5dda7945 SB	542	return 0;
5dda7945 SB	543	}
5dda7945 SB	544
5f8e17ce EN	545	void ipuv3_fb_shutdown(void)
5f8e17ce EN	546	{
0d1ae97c	547	int i;
9493d05a	548	struct ipu_stat stat = (struct ipu_stat )IPU_STAT;
5f8e17ce	549
f8ba7f27 AG	550	if (!ipu_clk_enabled())
	551	return;
	552
5f8e17ce EN	553	for (i = 0; i < ARRAY_SIZE(mxcfb_info); i++) {
	554	struct fb_info *fbi = mxcfb_info[i];
	555	if (fbi) {
	556	struct mxcfb_info *mxc_fbi = fbi->par;
	557	ipu_disable_channel(mxc_fbi->ipu_ch);
	558	ipu_uninit_channel(mxc_fbi->ipu_ch);
	559	}
	560	}
	561	for (i = 0; i < ARRAY_SIZE(stat->int_stat); i++) {
	562	__raw_writel(__raw_readl(&stat->int_stat[i]),
	563	&stat->int_stat[i]);
	564	}
	565	}
	566
09c8bb26 EN	567	int ipuv3_fb_init(struct fb_videomode const *mode,
	568	uint8_t disp,
	569	uint32_t pixfmt)
e9934f0b SB	570	{
e9934f0b SB	571	gmode = mode;
02ae1a18 MV	572	gdisp = disp;
02ae1a18 MV	573	gpixfmt = pixfmt;
e9934f0b SB	574
e9934f0b SB	575	return 0;
5dda7945	576	}
57f065fe	577
57f065fe AG	578	enum {
	579	/* Maximum display size we support */
	580	LCD_MAX_WIDTH = 1920,
	581	LCD_MAX_HEIGHT = 1080,
	582	LCD_MAX_LOG2_BPP = VIDEO_BPP16,
	583	};
	584
	585	static int ipuv3_video_probe(struct udevice *dev)
	586	{
8a8d24bd	587	struct video_uc_plat *plat = dev_get_uclass_plat(dev);
57f065fe	588	struct video_priv *uc_priv = dev_get_uclass_priv(dev);
f4ec1ae0 HS	589	#if defined(CONFIG_DISPLAY)
	590	struct udevice *disp_dev;
	591	#endif
57f065fe AG	592	u32 fb_start, fb_end;
	593	int ret;
	594
	595	debug("%s() plat: base 0x%lx, size 0x%x\n",
	596	__func__, plat->base, plat->size);
	597
	598	ret = ipu_probe();
	599	if (ret)
	600	return ret;
	601
	602	ret = ipu_displays_init();
	603	if (ret < 0)
	604	return ret;
	605
3ce83ee0	606	ret = mxcfb_probe(dev, gpixfmt, gdisp, gmode);
57f065fe AG	607	if (ret < 0)
	608	return ret;
	609
f4ec1ae0	610	#if defined(CONFIG_DISPLAY)
f4264234 MS	611	ret = uclass_first_device_err(UCLASS_DISPLAY, &disp_dev);
f4264234 MS	612	if (!ret)
f4ec1ae0	613	ret = display_enable(disp_dev, 16, NULL);
f4264234 MS	614	if (ret < 0)
f4264234 MS	615	return ret;
f4ec1ae0	616	#endif
ba490b25	617	if (IS_ENABLED(CONFIG_PANEL)) {
0b12f76f AG	618	struct udevice *panel_dev;
	619
	620	ret = uclass_get_device(UCLASS_PANEL, 0, &panel_dev);
	621	if (panel_dev)
	622	panel_enable_backlight(panel_dev);
	623	}
f4ec1ae0	624
57f065fe AG	625	uc_priv->xsize = gmode->xres;
	626	uc_priv->ysize = gmode->yres;
	627	uc_priv->bpix = LCD_MAX_LOG2_BPP;
	628
	629	/* Enable dcache for the frame buffer */
	630	fb_start = plat->base & ~(MMU_SECTION_SIZE - 1);
	631	fb_end = plat->base + plat->size;
	632	fb_end = ALIGN(fb_end, 1 << MMU_SECTION_SHIFT);
	633	mmu_set_region_dcache_behaviour(fb_start, fb_end - fb_start,
	634	DCACHE_WRITEBACK);
	635	video_set_flush_dcache(dev, true);
f03e56ad	636	gd->fb_base = fb_start;
57f065fe AG	637
	638	return 0;
	639	}
	640
	641	struct ipuv3_video_priv {
	642	ulong regs;
	643	};
	644
	645	static int ipuv3_video_bind(struct udevice *dev)
	646	{
8a8d24bd	647	struct video_uc_plat *plat = dev_get_uclass_plat(dev);
57f065fe AG	648
57f065fe AG	649	plat->size = LCD_MAX_WIDTH * LCD_MAX_HEIGHT *
b5e1a82e	650	(1 << VIDEO_BPP32) / 8;
57f065fe AG	651
	652	return 0;
	653	}
	654
	655	static const struct udevice_id ipuv3_video_ids[] = {
db755b36	656	#ifdef CONFIG_ARCH_MX6
57f065fe	657	{ .compatible = "fsl,imx6q-ipu" },
db755b36 AG	658	#endif
db755b36 AG	659	#ifdef CONFIG_ARCH_MX5
01c9dd21	660	{ .compatible = "fsl,imx53-ipu" },
db755b36	661	#endif
57f065fe AG	662	{ }
	663	};
	664
24968d9e WL	665	U_BOOT_DRIVER(fsl_imx6q_ipu) = {
24968d9e WL	666	.name = "fsl_imx6q_ipu",
57f065fe AG	667	.id = UCLASS_VIDEO,
	668	.of_match = ipuv3_video_ids,
	669	.bind = ipuv3_video_bind,
	670	.probe = ipuv3_video_probe,
41575d8e	671	.priv_auto = sizeof(struct ipuv3_video_priv),
57f065fe AG	672	.flags = DM_FLAG_PRE_RELOC,
57f065fe AG	673	};