[u-boot.git] / drivers / video / imx / mxc_ipuv3_fb.c

// SPDX-License-Identifier: GPL-2.0+
/*
 * Porting to u-boot:
 *
 * (C) Copyright 2010
 * Stefano Babic, DENX Software Engineering, [email protected]
 *
 * MX51 Linux framebuffer:
 *
 * (C) Copyright 2004-2010 Freescale Semiconductor, Inc.
 */

#include <common.h>
#include <log.h>
#include <part.h>
#include <asm/cache.h>
#include <linux/errno.h>
#include <asm/global_data.h>
#include <linux/string.h>
#include <linux/list.h>
#include <linux/fb.h>
#include <asm/io.h>
#include <asm/mach-imx/video.h>
#include <malloc.h>
#include <video_fb.h>
#include "../videomodes.h"
#include "ipu.h"
#include "mxcfb.h"
#include "ipu_regs.h"
#include "display.h"
#include <panel.h>

#include <dm.h>
#include <video.h>

DECLARE_GLOBAL_DATA_PTR;

static int mxcfb_map_video_memory(struct fb_info *fbi);
static int mxcfb_unmap_video_memory(struct fb_info *fbi);

static struct fb_videomode const *gmode;
static uint8_t gdisp;
static uint32_t gpixfmt;

static void fb_videomode_to_var(struct fb_var_screeninfo *var,
			 const struct fb_videomode *mode)
{
	var->xres = mode->xres;
	var->yres = mode->yres;
	var->xres_virtual = mode->xres;
	var->yres_virtual = mode->yres;
	var->xoffset = 0;
	var->yoffset = 0;
	var->pixclock = mode->pixclock;
	var->left_margin = mode->left_margin;
	var->right_margin = mode->right_margin;
	var->upper_margin = mode->upper_margin;
	var->lower_margin = mode->lower_margin;
	var->hsync_len = mode->hsync_len;
	var->vsync_len = mode->vsync_len;
	var->sync = mode->sync;
	var->vmode = mode->vmode & FB_VMODE_MASK;
}

/*
 * Structure containing the MXC specific framebuffer information.
 */
struct mxcfb_info {
	int blank;
	ipu_channel_t ipu_ch;
	int ipu_di;
	u32 ipu_di_pix_fmt;
	unsigned char overlay;
	unsigned char alpha_chan_en;
	dma_addr_t alpha_phy_addr0;
	dma_addr_t alpha_phy_addr1;
	void *alpha_virt_addr0;
	void *alpha_virt_addr1;
	uint32_t alpha_mem_len;
	uint32_t cur_ipu_buf;
	uint32_t cur_ipu_alpha_buf;

	u32 pseudo_palette[16];
};

enum {
	BOTH_ON,
	SRC_ON,
	TGT_ON,
	BOTH_OFF
};

static unsigned long default_bpp = 16;
static unsigned char g_dp_in_use;
static struct fb_info *mxcfb_info[3];
static int ext_clk_used;

static uint32_t bpp_to_pixfmt(struct fb_info *fbi)
{
	uint32_t pixfmt = 0;

	debug("bpp_to_pixfmt: %d\n", fbi->var.bits_per_pixel);

	if (fbi->var.nonstd)
		return fbi->var.nonstd;

	switch (fbi->var.bits_per_pixel) {
	case 24:
		pixfmt = IPU_PIX_FMT_BGR24;
		break;
	case 32:
		pixfmt = IPU_PIX_FMT_BGR32;
		break;
	case 16:
		pixfmt = IPU_PIX_FMT_RGB565;
		break;
	}
	return pixfmt;
}

static int setup_disp_channel1(struct fb_info *fbi)
{
	ipu_channel_params_t params;
	struct mxcfb_info *mxc_fbi = (struct mxcfb_info *)fbi->par;

	memset(&params, 0, sizeof(params));
	params.mem_dp_bg_sync.di = mxc_fbi->ipu_di;

	debug("%s called\n", __func__);
	/*
	 * Assuming interlaced means yuv output, below setting also
	 * valid for mem_dc_sync. FG should have the same vmode as BG.
	 */
	if (fbi->var.vmode & FB_VMODE_INTERLACED) {
		params.mem_dp_bg_sync.interlaced = 1;
		params.mem_dp_bg_sync.out_pixel_fmt =
			IPU_PIX_FMT_YUV444;
	} else {
		if (mxc_fbi->ipu_di_pix_fmt) {
			params.mem_dp_bg_sync.out_pixel_fmt =
				mxc_fbi->ipu_di_pix_fmt;
		} else {
			params.mem_dp_bg_sync.out_pixel_fmt =
				IPU_PIX_FMT_RGB666;
		}
	}
	params.mem_dp_bg_sync.in_pixel_fmt = bpp_to_pixfmt(fbi);
	if (mxc_fbi->alpha_chan_en)
		params.mem_dp_bg_sync.alpha_chan_en = 1;

	ipu_init_channel(mxc_fbi->ipu_ch, &params);

	return 0;
}

static int setup_disp_channel2(struct fb_info *fbi)
{
	int retval = 0;
	struct mxcfb_info *mxc_fbi = (struct mxcfb_info *)fbi->par;

	mxc_fbi->cur_ipu_buf = 1;
	if (mxc_fbi->alpha_chan_en)
		mxc_fbi->cur_ipu_alpha_buf = 1;

	fbi->var.xoffset = fbi->var.yoffset = 0;

	debug("%s: %x %d %d %d %lx %lx\n",
		__func__,
		mxc_fbi->ipu_ch,
		fbi->var.xres,
		fbi->var.yres,
		fbi->fix.line_length,
		fbi->fix.smem_start,
		fbi->fix.smem_start +
		(fbi->fix.line_length * fbi->var.yres));

	retval = ipu_init_channel_buffer(mxc_fbi->ipu_ch, IPU_INPUT_BUFFER,
					 bpp_to_pixfmt(fbi),
					 fbi->var.xres, fbi->var.yres,
					 fbi->fix.line_length,
					 fbi->fix.smem_start +
					 (fbi->fix.line_length * fbi->var.yres),
					 fbi->fix.smem_start,
					 0, 0);
	if (retval)
		printf("ipu_init_channel_buffer error %d\n", retval);

	return retval;
}

/*
 * Set framebuffer parameters and change the operating mode.
 *
 * @param       info     framebuffer information pointer
 */
static int mxcfb_set_par(struct fb_info *fbi)
{
	int retval = 0;
	u32 mem_len;
	ipu_di_signal_cfg_t sig_cfg;
	struct mxcfb_info *mxc_fbi = (struct mxcfb_info *)fbi->par;
	uint32_t out_pixel_fmt;

	ipu_disable_channel(mxc_fbi->ipu_ch);
	ipu_uninit_channel(mxc_fbi->ipu_ch);

	mem_len = fbi->var.yres_virtual * fbi->fix.line_length;
	if (!fbi->fix.smem_start || (mem_len > fbi->fix.smem_len)) {
		if (fbi->fix.smem_start)
			mxcfb_unmap_video_memory(fbi);

		if (mxcfb_map_video_memory(fbi) < 0)
			return -ENOMEM;
	}

	setup_disp_channel1(fbi);

	memset(&sig_cfg, 0, sizeof(sig_cfg));
	if (fbi->var.vmode & FB_VMODE_INTERLACED) {
		sig_cfg.interlaced = 1;
		out_pixel_fmt = IPU_PIX_FMT_YUV444;
	} else {
		if (mxc_fbi->ipu_di_pix_fmt)
			out_pixel_fmt = mxc_fbi->ipu_di_pix_fmt;
		else
			out_pixel_fmt = IPU_PIX_FMT_RGB666;
	}
	if (fbi->var.vmode & FB_VMODE_ODD_FLD_FIRST) /* PAL */
		sig_cfg.odd_field_first = 1;
	if ((fbi->var.sync & FB_SYNC_EXT) || ext_clk_used)
		sig_cfg.ext_clk = 1;
	if (fbi->var.sync & FB_SYNC_HOR_HIGH_ACT)
		sig_cfg.Hsync_pol = 1;
	if (fbi->var.sync & FB_SYNC_VERT_HIGH_ACT)
		sig_cfg.Vsync_pol = 1;
	if (!(fbi->var.sync & FB_SYNC_CLK_LAT_FALL))
		sig_cfg.clk_pol = 1;
	if (fbi->var.sync & FB_SYNC_DATA_INVERT)
		sig_cfg.data_pol = 1;
	if (!(fbi->var.sync & FB_SYNC_OE_LOW_ACT))
		sig_cfg.enable_pol = 1;
	if (fbi->var.sync & FB_SYNC_CLK_IDLE_EN)
		sig_cfg.clkidle_en = 1;

	debug("pixclock = %lu Hz\n", PICOS2KHZ(fbi->var.pixclock) * 1000UL);

	if (ipu_init_sync_panel(mxc_fbi->ipu_di,
				(PICOS2KHZ(fbi->var.pixclock)) * 1000UL,
				fbi->var.xres, fbi->var.yres,
				out_pixel_fmt,
				fbi->var.left_margin,
				fbi->var.hsync_len,
				fbi->var.right_margin,
				fbi->var.upper_margin,
				fbi->var.vsync_len,
				fbi->var.lower_margin,
				0, sig_cfg) != 0) {
		puts("mxcfb: Error initializing panel.\n");
		return -EINVAL;
	}

	retval = setup_disp_channel2(fbi);
	if (retval)
		return retval;

	if (mxc_fbi->blank == FB_BLANK_UNBLANK)
		ipu_enable_channel(mxc_fbi->ipu_ch);

	return retval;
}

/*
 * Check framebuffer variable parameters and adjust to valid values.
 *
 * @param       var      framebuffer variable parameters
 *
 * @param       info     framebuffer information pointer
 */
static int mxcfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
{
	u32 vtotal;
	u32 htotal;

	if (var->xres_virtual < var->xres)
		var->xres_virtual = var->xres;
	if (var->yres_virtual < var->yres)
		var->yres_virtual = var->yres;

	if ((var->bits_per_pixel != 32) && (var->bits_per_pixel != 24) &&
	    (var->bits_per_pixel != 16) && (var->bits_per_pixel != 8))
		var->bits_per_pixel = default_bpp;

	switch (var->bits_per_pixel) {
	case 8:
		var->red.length = 3;
		var->red.offset = 5;
		var->red.msb_right = 0;

		var->green.length = 3;
		var->green.offset = 2;
		var->green.msb_right = 0;

		var->blue.length = 2;
		var->blue.offset = 0;
		var->blue.msb_right = 0;

		var->transp.length = 0;
		var->transp.offset = 0;
		var->transp.msb_right = 0;
		break;
	case 16:
		var->red.length = 5;
		var->red.offset = 11;
		var->red.msb_right = 0;

		var->green.length = 6;
		var->green.offset = 5;
		var->green.msb_right = 0;

		var->blue.length = 5;
		var->blue.offset = 0;
		var->blue.msb_right = 0;

		var->transp.length = 0;
		var->transp.offset = 0;
		var->transp.msb_right = 0;
		break;
	case 24:
		var->red.length = 8;
		var->red.offset = 16;
		var->red.msb_right = 0;

		var->green.length = 8;
		var->green.offset = 8;
		var->green.msb_right = 0;

		var->blue.length = 8;
		var->blue.offset = 0;
		var->blue.msb_right = 0;

		var->transp.length = 0;
		var->transp.offset = 0;
		var->transp.msb_right = 0;
		break;
	case 32:
		var->red.length = 8;
		var->red.offset = 16;
		var->red.msb_right = 0;

		var->green.length = 8;
		var->green.offset = 8;
		var->green.msb_right = 0;

		var->blue.length = 8;
		var->blue.offset = 0;
		var->blue.msb_right = 0;

		var->transp.length = 8;
		var->transp.offset = 24;
		var->transp.msb_right = 0;
		break;
	}

	if (var->pixclock < 1000) {
		htotal = var->xres + var->right_margin + var->hsync_len +
		    var->left_margin;
		vtotal = var->yres + var->lower_margin + var->vsync_len +
		    var->upper_margin;
		var->pixclock = (vtotal * htotal * 6UL) / 100UL;
		var->pixclock = KHZ2PICOS(var->pixclock);
		printf("pixclock set for 60Hz refresh = %u ps\n",
			var->pixclock);
	}

	var->height = -1;
	var->width = -1;
	var->grayscale = 0;

	return 0;
}

static int mxcfb_map_video_memory(struct fb_info *fbi)
{
	if (fbi->fix.smem_len < fbi->var.yres_virtual * fbi->fix.line_length) {
		fbi->fix.smem_len = fbi->var.yres_virtual *
				    fbi->fix.line_length;
	}
	fbi->fix.smem_len = roundup(fbi->fix.smem_len, ARCH_DMA_MINALIGN);

	fbi->screen_base = (char *)gd->video_bottom;

	fbi->fix.smem_start = (unsigned long)fbi->screen_base;
	if (fbi->screen_base == 0) {
		puts("Unable to allocate framebuffer memory\n");
		fbi->fix.smem_len = 0;
		fbi->fix.smem_start = 0;
		return -EBUSY;
	}

	debug("allocated fb @ paddr=0x%08X, size=%d.\n",
		(uint32_t) fbi->fix.smem_start, fbi->fix.smem_len);

	fbi->screen_size = fbi->fix.smem_len;
	gd->fb_base = fbi->fix.smem_start;

	/* Clear the screen */
	memset((char *)fbi->screen_base, 0, fbi->fix.smem_len);

	return 0;
}

static int mxcfb_unmap_video_memory(struct fb_info *fbi)
{
	fbi->screen_base = 0;
	fbi->fix.smem_start = 0;
	fbi->fix.smem_len = 0;
	return 0;
}

/*
 * Initializes the framebuffer information pointer. After allocating
 * sufficient memory for the framebuffer structure, the fields are
 * filled with custom information passed in from the configurable
 * structures.  This includes information such as bits per pixel,
 * color maps, screen width/height and RGBA offsets.
 *
 * @return      Framebuffer structure initialized with our information
 */
static struct fb_info *mxcfb_init_fbinfo(void)
{
#define BYTES_PER_LONG 4
#define PADDING (BYTES_PER_LONG - (sizeof(struct fb_info) % BYTES_PER_LONG))
	struct fb_info *fbi;
	struct mxcfb_info *mxcfbi;
	char *p;
	int size = sizeof(struct mxcfb_info) + PADDING +
		sizeof(struct fb_info);

	debug("%s: %d %d %d %d\n",
		__func__,
		PADDING,
		size,
		sizeof(struct mxcfb_info),
		sizeof(struct fb_info));
	/*
	 * Allocate sufficient memory for the fb structure
	 */

	p = malloc(size);
	if (!p)
		return NULL;

	memset(p, 0, size);

	fbi = (struct fb_info *)p;
	fbi->par = p + sizeof(struct fb_info) + PADDING;

	mxcfbi = (struct mxcfb_info *)fbi->par;
	debug("Framebuffer structures at: fbi=0x%x mxcfbi=0x%x\n",
		(unsigned int)fbi, (unsigned int)mxcfbi);

	fbi->var.activate = FB_ACTIVATE_NOW;

	fbi->flags = FBINFO_FLAG_DEFAULT;
	fbi->pseudo_palette = mxcfbi->pseudo_palette;

	return fbi;
}

extern struct clk *g_ipu_clk;

/*
 * Probe routine for the framebuffer driver. It is called during the
 * driver binding process. The following functions are performed in
 * this routine: Framebuffer initialization, Memory allocation and
 * mapping, Framebuffer registration, IPU initialization.
 *
 * @return      Appropriate error code to the kernel common code
 */
static int mxcfb_probe(u32 interface_pix_fmt, uint8_t disp,
			struct fb_videomode const *mode)
{
	struct fb_info *fbi;
	struct mxcfb_info *mxcfbi;

	/*
	 * Initialize FB structures
	 */
	fbi = mxcfb_init_fbinfo();
	if (!fbi)
		return -ENOMEM;

	mxcfbi = (struct mxcfb_info *)fbi->par;

	if (!g_dp_in_use) {
		mxcfbi->ipu_ch = MEM_BG_SYNC;
		mxcfbi->blank = FB_BLANK_UNBLANK;
	} else {
		mxcfbi->ipu_ch = MEM_DC_SYNC;
		mxcfbi->blank = FB_BLANK_POWERDOWN;
	}

	mxcfbi->ipu_di = disp;

	if (!ipu_clk_enabled())
		clk_enable(g_ipu_clk);

	ipu_disp_set_global_alpha(mxcfbi->ipu_ch, 1, 0x80);
	ipu_disp_set_color_key(mxcfbi->ipu_ch, 0, 0);

	g_dp_in_use = 1;

	mxcfb_info[mxcfbi->ipu_di] = fbi;

	/* Need dummy values until real panel is configured */

	mxcfbi->ipu_di_pix_fmt = interface_pix_fmt;
	fb_videomode_to_var(&fbi->var, mode);
	fbi->var.bits_per_pixel = 16;
	fbi->fix.line_length = fbi->var.xres_virtual *
			       (fbi->var.bits_per_pixel / 8);
	fbi->fix.smem_len = fbi->var.yres_virtual * fbi->fix.line_length;

	mxcfb_check_var(&fbi->var, fbi);

	/* Default Y virtual size is 2x panel size */
	fbi->var.yres_virtual = fbi->var.yres * 2;

	/* allocate fb first */
	if (mxcfb_map_video_memory(fbi) < 0)
		return -ENOMEM;

	mxcfb_set_par(fbi);

#ifdef DEBUG
	ipu_dump_registers();
#endif

	return 0;
}

void ipuv3_fb_shutdown(void)
{
	int i;
	struct ipu_stat *stat = (struct ipu_stat *)IPU_STAT;

	if (!ipu_clk_enabled())
		return;

	for (i = 0; i < ARRAY_SIZE(mxcfb_info); i++) {
		struct fb_info *fbi = mxcfb_info[i];
		if (fbi) {
			struct mxcfb_info *mxc_fbi = fbi->par;
			ipu_disable_channel(mxc_fbi->ipu_ch);
			ipu_uninit_channel(mxc_fbi->ipu_ch);
		}
	}
	for (i = 0; i < ARRAY_SIZE(stat->int_stat); i++) {
		__raw_writel(__raw_readl(&stat->int_stat[i]),
			     &stat->int_stat[i]);
	}
}

int ipuv3_fb_init(struct fb_videomode const *mode,
		  uint8_t disp,
		  uint32_t pixfmt)
{
	gmode = mode;
	gdisp = disp;
	gpixfmt = pixfmt;

	return 0;
}

enum {
	/* Maximum display size we support */
	LCD_MAX_WIDTH		= 1920,
	LCD_MAX_HEIGHT		= 1080,
	LCD_MAX_LOG2_BPP	= VIDEO_BPP16,
};

static int ipuv3_video_probe(struct udevice *dev)
{
	struct video_uc_platdata *plat = dev_get_uclass_platdata(dev);
	struct video_priv *uc_priv = dev_get_uclass_priv(dev);
#if defined(CONFIG_DISPLAY)
	struct udevice *disp_dev;
#endif
	u32 fb_start, fb_end;
	int ret;

	debug("%s() plat: base 0x%lx, size 0x%x\n",
	      __func__, plat->base, plat->size);

	ret = ipu_probe();
	if (ret)
		return ret;

	ret = ipu_displays_init();
	if (ret < 0)
		return ret;

	ret = mxcfb_probe(gpixfmt, gdisp, gmode);
	if (ret < 0)
		return ret;

#if defined(CONFIG_DISPLAY)
	ret = uclass_first_device(UCLASS_DISPLAY, &disp_dev);
	if (disp_dev) {
		ret = display_enable(disp_dev, 16, NULL);
		if (ret < 0)
			return ret;
	}
#endif
	if (CONFIG_IS_ENABLED(PANEL)) {
		struct udevice *panel_dev;

		ret = uclass_get_device(UCLASS_PANEL, 0, &panel_dev);
		if (panel_dev)
			panel_enable_backlight(panel_dev);
	}

	uc_priv->xsize = gmode->xres;
	uc_priv->ysize = gmode->yres;
	uc_priv->bpix = LCD_MAX_LOG2_BPP;

	/* Enable dcache for the frame buffer */
	fb_start = plat->base & ~(MMU_SECTION_SIZE - 1);
	fb_end = plat->base + plat->size;
	fb_end = ALIGN(fb_end, 1 << MMU_SECTION_SHIFT);
	mmu_set_region_dcache_behaviour(fb_start, fb_end - fb_start,
					DCACHE_WRITEBACK);
	video_set_flush_dcache(dev, true);
	gd->fb_base = fb_start;

	return 0;
}

struct ipuv3_video_priv {
	ulong regs;
};

static int ipuv3_video_bind(struct udevice *dev)
{
	struct video_uc_platdata *plat = dev_get_uclass_platdata(dev);

	plat->size = LCD_MAX_WIDTH * LCD_MAX_HEIGHT *
		     (1 << VIDEO_BPP32) / 8;

	return 0;
}

static const struct udevice_id ipuv3_video_ids[] = {
#ifdef CONFIG_ARCH_MX6
	{ .compatible = "fsl,imx6q-ipu" },
#endif
#ifdef CONFIG_ARCH_MX5
	{ .compatible = "fsl,imx53-ipu" },
#endif
	{ }
};

U_BOOT_DRIVER(ipuv3_video) = {
	.name	= "ipuv3_video",
	.id	= UCLASS_VIDEO,
	.of_match = ipuv3_video_ids,
	.bind	= ipuv3_video_bind,
	.probe	= ipuv3_video_probe,
	.priv_auto_alloc_size = sizeof(struct ipuv3_video_priv),
	.flags	= DM_FLAG_PRE_RELOC,
};
Commit	Line	Data
83d290c5	1	// SPDX-License-Identifier: GPL-2.0+
5dda7945 SB	2	/*
	3	* Porting to u-boot:
	4	*
	5	* (C) Copyright 2010
	6	* Stefano Babic, DENX Software Engineering, [email protected]
	7	*
	8	* MX51 Linux framebuffer:
	9	*
	10	* (C) Copyright 2004-2010 Freescale Semiconductor, Inc.
5dda7945 SB	11	*/
5dda7945 SB	12
5dda7945	13	#include <common.h>
f7ae49fc	14	#include <log.h>
e6f6f9e6	15	#include <part.h>
90526e9f	16	#include <asm/cache.h>
1221ce45	17	#include <linux/errno.h>
a69214dc	18	#include <asm/global_data.h>
5dda7945 SB	19	#include <linux/string.h>
	20	#include <linux/list.h>
	21	#include <linux/fb.h>
	22	#include <asm/io.h>
57f065fe	23	#include <asm/mach-imx/video.h>
5dda7945	24	#include <malloc.h>
e9934f0b	25	#include <video_fb.h>
bffd1314	26	#include "../videomodes.h"
5dda7945 SB	27	#include "ipu.h"
5dda7945 SB	28	#include "mxcfb.h"
5f8e17ce	29	#include "ipu_regs.h"
f4ec1ae0	30	#include "display.h"
42a7ce27	31	#include <panel.h>
5dda7945	32
57f065fe AG	33	#include <dm.h>
	34	#include <video.h>
	35
a69214dc EN	36	DECLARE_GLOBAL_DATA_PTR;
a69214dc EN	37
5dda7945 SB	38	static int mxcfb_map_video_memory(struct fb_info *fbi);
	39	static int mxcfb_unmap_video_memory(struct fb_info *fbi);
	40
09c8bb26	41	static struct fb_videomode const *gmode;
02ae1a18 MV	42	static uint8_t gdisp;
02ae1a18 MV	43	static uint32_t gpixfmt;
5dda7945	44
c5fe2532	45	static void fb_videomode_to_var(struct fb_var_screeninfo *var,
5dda7945 SB	46	const struct fb_videomode *mode)
	47	{
	48	var->xres = mode->xres;
	49	var->yres = mode->yres;
	50	var->xres_virtual = mode->xres;
	51	var->yres_virtual = mode->yres;
	52	var->xoffset = 0;
	53	var->yoffset = 0;
	54	var->pixclock = mode->pixclock;
	55	var->left_margin = mode->left_margin;
	56	var->right_margin = mode->right_margin;
	57	var->upper_margin = mode->upper_margin;
	58	var->lower_margin = mode->lower_margin;
	59	var->hsync_len = mode->hsync_len;
	60	var->vsync_len = mode->vsync_len;
	61	var->sync = mode->sync;
	62	var->vmode = mode->vmode & FB_VMODE_MASK;
	63	}
	64
	65	/*
	66	* Structure containing the MXC specific framebuffer information.
	67	*/
	68	struct mxcfb_info {
	69	int blank;
	70	ipu_channel_t ipu_ch;
	71	int ipu_di;
	72	u32 ipu_di_pix_fmt;
	73	unsigned char overlay;
	74	unsigned char alpha_chan_en;
	75	dma_addr_t alpha_phy_addr0;
	76	dma_addr_t alpha_phy_addr1;
	77	void *alpha_virt_addr0;
	78	void *alpha_virt_addr1;
	79	uint32_t alpha_mem_len;
	80	uint32_t cur_ipu_buf;
	81	uint32_t cur_ipu_alpha_buf;
	82
	83	u32 pseudo_palette[16];
	84	};
	85
	86	enum {
	87	BOTH_ON,
	88	SRC_ON,
	89	TGT_ON,
	90	BOTH_OFF
	91	};
	92
	93	static unsigned long default_bpp = 16;
	94	static unsigned char g_dp_in_use;
	95	static struct fb_info *mxcfb_info[3];
	96	static int ext_clk_used;
	97
	98	static uint32_t bpp_to_pixfmt(struct fb_info *fbi)
	99	{
	100	uint32_t pixfmt = 0;
	101
	102	debug("bpp_to_pixfmt: %d\n", fbi->var.bits_per_pixel);
	103
	104	if (fbi->var.nonstd)
	105	return fbi->var.nonstd;
	106
	107	switch (fbi->var.bits_per_pixel) {
	108	case 24:
	109	pixfmt = IPU_PIX_FMT_BGR24;
110	break;
111	case 32:
112	pixfmt = IPU_PIX_FMT_BGR32;
113	break;
114	case 16:
115	pixfmt = IPU_PIX_FMT_RGB565;
116	break;
117	}
118	return pixfmt;
119	}
120
5dda7945 SB	121	static int setup_disp_channel1(struct fb_info *fbi)
	122	{
	123	ipu_channel_params_t params;
	124	struct mxcfb_info mxc_fbi = (struct mxcfb_info )fbi->par;
	125
	126	memset(&params, 0, sizeof(params));
	127	params.mem_dp_bg_sync.di = mxc_fbi->ipu_di;
	128
	129	debug("%s called\n", __func__);
	130	/*
	131	* Assuming interlaced means yuv output, below setting also
	132	* valid for mem_dc_sync. FG should have the same vmode as BG.
	133	*/
	134	if (fbi->var.vmode & FB_VMODE_INTERLACED) {
	135	params.mem_dp_bg_sync.interlaced = 1;
	136	params.mem_dp_bg_sync.out_pixel_fmt =
	137	IPU_PIX_FMT_YUV444;
	138	} else {
	139	if (mxc_fbi->ipu_di_pix_fmt) {
	140	params.mem_dp_bg_sync.out_pixel_fmt =
	141	mxc_fbi->ipu_di_pix_fmt;
	142	} else {
	143	params.mem_dp_bg_sync.out_pixel_fmt =
	144	IPU_PIX_FMT_RGB666;
	145	}
	146	}
	147	params.mem_dp_bg_sync.in_pixel_fmt = bpp_to_pixfmt(fbi);
	148	if (mxc_fbi->alpha_chan_en)
	149	params.mem_dp_bg_sync.alpha_chan_en = 1;
	150
	151	ipu_init_channel(mxc_fbi->ipu_ch, &params);
	152
	153	return 0;
	154	}
	155
	156	static int setup_disp_channel2(struct fb_info *fbi)
	157	{
	158	int retval = 0;
	159	struct mxcfb_info mxc_fbi = (struct mxcfb_info )fbi->par;
	160
	161	mxc_fbi->cur_ipu_buf = 1;
	162	if (mxc_fbi->alpha_chan_en)
	163	mxc_fbi->cur_ipu_alpha_buf = 1;
	164
	165	fbi->var.xoffset = fbi->var.yoffset = 0;
	166
	167	debug("%s: %x %d %d %d %lx %lx\n",
	168	__func__,
	169	mxc_fbi->ipu_ch,
	170	fbi->var.xres,
	171	fbi->var.yres,
	172	fbi->fix.line_length,
	173	fbi->fix.smem_start,
	174	fbi->fix.smem_start +
	175	(fbi->fix.line_length * fbi->var.yres));
	176
	177	retval = ipu_init_channel_buffer(mxc_fbi->ipu_ch, IPU_INPUT_BUFFER,
	178	bpp_to_pixfmt(fbi),
	179	fbi->var.xres, fbi->var.yres,
	180	fbi->fix.line_length,
	181	fbi->fix.smem_start +
	182	(fbi->fix.line_length * fbi->var.yres),
	183	fbi->fix.smem_start,
	184	0, 0);
185	if (retval)
186	printf("ipu_init_channel_buffer error %d\n", retval);
187
188	return retval;
189	}
190
191	/*
192	* Set framebuffer parameters and change the operating mode.
193	*
194	* @param info framebuffer information pointer
195	*/
196	static int mxcfb_set_par(struct fb_info *fbi)
197	{
198	int retval = 0;
199	u32 mem_len;
200	ipu_di_signal_cfg_t sig_cfg;
201	struct mxcfb_info mxc_fbi = (struct mxcfb_info )fbi->par;
202	uint32_t out_pixel_fmt;
203
204	ipu_disable_channel(mxc_fbi->ipu_ch);
205	ipu_uninit_channel(mxc_fbi->ipu_ch);
5dda7945 SB	206
	207	mem_len = fbi->var.yres_virtual * fbi->fix.line_length;
	208	if (!fbi->fix.smem_start \|\| (mem_len > fbi->fix.smem_len)) {
	209	if (fbi->fix.smem_start)
	210	mxcfb_unmap_video_memory(fbi);
	211
	212	if (mxcfb_map_video_memory(fbi) < 0)
	213	return -ENOMEM;
	214	}
	215
	216	setup_disp_channel1(fbi);
	217
	218	memset(&sig_cfg, 0, sizeof(sig_cfg));
	219	if (fbi->var.vmode & FB_VMODE_INTERLACED) {
	220	sig_cfg.interlaced = 1;
	221	out_pixel_fmt = IPU_PIX_FMT_YUV444;
	222	} else {
	223	if (mxc_fbi->ipu_di_pix_fmt)
	224	out_pixel_fmt = mxc_fbi->ipu_di_pix_fmt;
	225	else
	226	out_pixel_fmt = IPU_PIX_FMT_RGB666;
	227	}
	228	if (fbi->var.vmode & FB_VMODE_ODD_FLD_FIRST) /* PAL */
	229	sig_cfg.odd_field_first = 1;
	230	if ((fbi->var.sync & FB_SYNC_EXT) \|\| ext_clk_used)
	231	sig_cfg.ext_clk = 1;
	232	if (fbi->var.sync & FB_SYNC_HOR_HIGH_ACT)
	233	sig_cfg.Hsync_pol = 1;
	234	if (fbi->var.sync & FB_SYNC_VERT_HIGH_ACT)
	235	sig_cfg.Vsync_pol = 1;
	236	if (!(fbi->var.sync & FB_SYNC_CLK_LAT_FALL))
	237	sig_cfg.clk_pol = 1;
	238	if (fbi->var.sync & FB_SYNC_DATA_INVERT)
	239	sig_cfg.data_pol = 1;
	240	if (!(fbi->var.sync & FB_SYNC_OE_LOW_ACT))
	241	sig_cfg.enable_pol = 1;
	242	if (fbi->var.sync & FB_SYNC_CLK_IDLE_EN)
	243	sig_cfg.clkidle_en = 1;
	244
c1420328	245	debug("pixclock = %lu Hz\n", PICOS2KHZ(fbi->var.pixclock) * 1000UL);
5dda7945 SB	246
	247	if (ipu_init_sync_panel(mxc_fbi->ipu_di,
	248	(PICOS2KHZ(fbi->var.pixclock)) * 1000UL,
	249	fbi->var.xres, fbi->var.yres,
	250	out_pixel_fmt,
	251	fbi->var.left_margin,
	252	fbi->var.hsync_len,
	253	fbi->var.right_margin,
	254	fbi->var.upper_margin,
	255	fbi->var.vsync_len,
	256	fbi->var.lower_margin,
	257	0, sig_cfg) != 0) {
	258	puts("mxcfb: Error initializing panel.\n");
	259	return -EINVAL;
	260	}
	261
	262	retval = setup_disp_channel2(fbi);
	263	if (retval)
	264	return retval;
	265
	266	if (mxc_fbi->blank == FB_BLANK_UNBLANK)
	267	ipu_enable_channel(mxc_fbi->ipu_ch);
	268
	269	return retval;
	270	}
	271
	272	/*
	273	* Check framebuffer variable parameters and adjust to valid values.
	274	*
	275	* @param var framebuffer variable parameters
	276	*
	277	* @param info framebuffer information pointer
	278	*/
	279	static int mxcfb_check_var(struct fb_var_screeninfo var, struct fb_info info)
	280	{
	281	u32 vtotal;
	282	u32 htotal;
	283
	284	if (var->xres_virtual < var->xres)
	285	var->xres_virtual = var->xres;
	286	if (var->yres_virtual < var->yres)
	287	var->yres_virtual = var->yres;
	288
	289	if ((var->bits_per_pixel != 32) && (var->bits_per_pixel != 24) &&
	290	(var->bits_per_pixel != 16) && (var->bits_per_pixel != 8))
	291	var->bits_per_pixel = default_bpp;
	292
	293	switch (var->bits_per_pixel) {
	294	case 8:
	295	var->red.length = 3;
	296	var->red.offset = 5;
	297	var->red.msb_right = 0;
	298
	299	var->green.length = 3;
	300	var->green.offset = 2;
	301	var->green.msb_right = 0;
	302
	303	var->blue.length = 2;
	304	var->blue.offset = 0;
	305	var->blue.msb_right = 0;
	306
	307	var->transp.length = 0;
	308	var->transp.offset = 0;
	309	var->transp.msb_right = 0;
310	break;
311	case 16:
312	var->red.length = 5;
313	var->red.offset = 11;
314	var->red.msb_right = 0;
315
316	var->green.length = 6;
317	var->green.offset = 5;
318	var->green.msb_right = 0;
319
320	var->blue.length = 5;
321	var->blue.offset = 0;
322	var->blue.msb_right = 0;
323
324	var->transp.length = 0;
325	var->transp.offset = 0;
326	var->transp.msb_right = 0;
327	break;
328	case 24:
329	var->red.length = 8;
330	var->red.offset = 16;
331	var->red.msb_right = 0;
332
333	var->green.length = 8;
334	var->green.offset = 8;
335	var->green.msb_right = 0;
336
337	var->blue.length = 8;
338	var->blue.offset = 0;
339	var->blue.msb_right = 0;
340
341	var->transp.length = 0;
342	var->transp.offset = 0;
343	var->transp.msb_right = 0;
344	break;
345	case 32:
346	var->red.length = 8;
347	var->red.offset = 16;
348	var->red.msb_right = 0;
349
350	var->green.length = 8;
351	var->green.offset = 8;
352	var->green.msb_right = 0;
353
354	var->blue.length = 8;
355	var->blue.offset = 0;
356	var->blue.msb_right = 0;
357
358	var->transp.length = 8;
359	var->transp.offset = 24;
360	var->transp.msb_right = 0;
361	break;
362	}
363
364	if (var->pixclock < 1000) {
365	htotal = var->xres + var->right_margin + var->hsync_len +
366	var->left_margin;
367	vtotal = var->yres + var->lower_margin + var->vsync_len +
368	var->upper_margin;
369	var->pixclock = (vtotal * htotal * 6UL) / 100UL;
370	var->pixclock = KHZ2PICOS(var->pixclock);
371	printf("pixclock set for 60Hz refresh = %u ps\n",
372	var->pixclock);
373	}
374
375	var->height = -1;
376	var->width = -1;
377	var->grayscale = 0;
378
379	return 0;
380	}
381
382	static int mxcfb_map_video_memory(struct fb_info *fbi)
383	{
384	if (fbi->fix.smem_len < fbi->var.yres_virtual * fbi->fix.line_length) {
385	fbi->fix.smem_len = fbi->var.yres_virtual *
386	fbi->fix.line_length;
387	}
4acb4d39	388	fbi->fix.smem_len = roundup(fbi->fix.smem_len, ARCH_DMA_MINALIGN);
57f065fe	389
57f065fe	390	fbi->screen_base = (char *)gd->video_bottom;
57f065fe	391
e9934f0b	392	fbi->fix.smem_start = (unsigned long)fbi->screen_base;
5dda7945 SB	393	if (fbi->screen_base == 0) {
	394	puts("Unable to allocate framebuffer memory\n");
	395	fbi->fix.smem_len = 0;
	396	fbi->fix.smem_start = 0;
	397	return -EBUSY;
	398	}
	399
	400	debug("allocated fb @ paddr=0x%08X, size=%d.\n",
	401	(uint32_t) fbi->fix.smem_start, fbi->fix.smem_len);
	402
	403	fbi->screen_size = fbi->fix.smem_len;
a69214dc EN	404	gd->fb_base = fbi->fix.smem_start;
a69214dc EN	405
5dda7945 SB	406	/* Clear the screen */
	407	memset((char *)fbi->screen_base, 0, fbi->fix.smem_len);
	408
	409	return 0;
	410	}
	411
	412	static int mxcfb_unmap_video_memory(struct fb_info *fbi)
	413	{
	414	fbi->screen_base = 0;
	415	fbi->fix.smem_start = 0;
	416	fbi->fix.smem_len = 0;
	417	return 0;
	418	}
	419
	420	/*
	421	* Initializes the framebuffer information pointer. After allocating
	422	* sufficient memory for the framebuffer structure, the fields are
	423	* filled with custom information passed in from the configurable
	424	* structures. This includes information such as bits per pixel,
	425	* color maps, screen width/height and RGBA offsets.
	426	*
	427	* @return Framebuffer structure initialized with our information
	428	*/
	429	static struct fb_info *mxcfb_init_fbinfo(void)
	430	{
	431	#define BYTES_PER_LONG 4
	432	#define PADDING (BYTES_PER_LONG - (sizeof(struct fb_info) % BYTES_PER_LONG))
	433	struct fb_info *fbi;
	434	struct mxcfb_info *mxcfbi;
	435	char *p;
	436	int size = sizeof(struct mxcfb_info) + PADDING +
	437	sizeof(struct fb_info);
	438
	439	debug("%s: %d %d %d %d\n",
	440	__func__,
	441	PADDING,
	442	size,
	443	sizeof(struct mxcfb_info),
	444	sizeof(struct fb_info));
	445	/*
	446	* Allocate sufficient memory for the fb structure
	447	*/
	448
	449	p = malloc(size);
	450	if (!p)
	451	return NULL;
	452
	453	memset(p, 0, size);
	454
	455	fbi = (struct fb_info *)p;
	456	fbi->par = p + sizeof(struct fb_info) + PADDING;
	457
	458	mxcfbi = (struct mxcfb_info *)fbi->par;
	459	debug("Framebuffer structures at: fbi=0x%x mxcfbi=0x%x\n",
	460	(unsigned int)fbi, (unsigned int)mxcfbi);
	461
	462	fbi->var.activate = FB_ACTIVATE_NOW;
	463
	464	fbi->flags = FBINFO_FLAG_DEFAULT;
	465	fbi->pseudo_palette = mxcfbi->pseudo_palette;
	466
	467	return fbi;
	468	}
	469
db755b36 AG	470	extern struct clk *g_ipu_clk;
db755b36 AG	471
5dda7945 SB	472	/*
5dda7945 SB	473	* Probe routine for the framebuffer driver. It is called during the
c1420328	474	* driver binding process. The following functions are performed in
5dda7945 SB	475	* this routine: Framebuffer initialization, Memory allocation and
	476	* mapping, Framebuffer registration, IPU initialization.
	477	*
	478	* @return Appropriate error code to the kernel common code
	479	*/
02ae1a18	480	static int mxcfb_probe(u32 interface_pix_fmt, uint8_t disp,
09c8bb26	481	struct fb_videomode const *mode)
5dda7945 SB	482	{
	483	struct fb_info *fbi;
	484	struct mxcfb_info *mxcfbi;
5dda7945 SB	485
	486	/*
	487	* Initialize FB structures
	488	*/
	489	fbi = mxcfb_init_fbinfo();
db755b36 AG	490	if (!fbi)
	491	return -ENOMEM;
	492
5dda7945 SB	493	mxcfbi = (struct mxcfb_info *)fbi->par;
	494
	495	if (!g_dp_in_use) {
	496	mxcfbi->ipu_ch = MEM_BG_SYNC;
	497	mxcfbi->blank = FB_BLANK_UNBLANK;
	498	} else {
	499	mxcfbi->ipu_ch = MEM_DC_SYNC;
	500	mxcfbi->blank = FB_BLANK_POWERDOWN;
	501	}
	502
02ae1a18	503	mxcfbi->ipu_di = disp;
5dda7945	504
db755b36 AG	505	if (!ipu_clk_enabled())
	506	clk_enable(g_ipu_clk);
	507
5dda7945 SB	508	ipu_disp_set_global_alpha(mxcfbi->ipu_ch, 1, 0x80);
5dda7945 SB	509	ipu_disp_set_color_key(mxcfbi->ipu_ch, 0, 0);
5dda7945 SB	510
	511	g_dp_in_use = 1;
	512
	513	mxcfb_info[mxcfbi->ipu_di] = fbi;
	514
	515	/* Need dummy values until real panel is configured */
5dda7945 SB	516
	517	mxcfbi->ipu_di_pix_fmt = interface_pix_fmt;
	518	fb_videomode_to_var(&fbi->var, mode);
e9934f0b	519	fbi->var.bits_per_pixel = 16;
db755b36 AG	520	fbi->fix.line_length = fbi->var.xres_virtual *
db755b36 AG	521	(fbi->var.bits_per_pixel / 8);
e9934f0b	522	fbi->fix.smem_len = fbi->var.yres_virtual * fbi->fix.line_length;
5dda7945 SB	523
	524	mxcfb_check_var(&fbi->var, fbi);
	525
	526	/* Default Y virtual size is 2x panel size */
	527	fbi->var.yres_virtual = fbi->var.yres * 2;
	528
c1420328	529	/* allocate fb first */
5dda7945 SB	530	if (mxcfb_map_video_memory(fbi) < 0)
	531	return -ENOMEM;
	532
	533	mxcfb_set_par(fbi);
	534
db755b36	535	#ifdef DEBUG
5dda7945	536	ipu_dump_registers();
db755b36	537	#endif
5dda7945 SB	538
5dda7945 SB	539	return 0;
5dda7945 SB	540	}
5dda7945 SB	541
5f8e17ce EN	542	void ipuv3_fb_shutdown(void)
5f8e17ce EN	543	{
0d1ae97c	544	int i;
9493d05a	545	struct ipu_stat stat = (struct ipu_stat )IPU_STAT;
5f8e17ce	546
f8ba7f27 AG	547	if (!ipu_clk_enabled())
	548	return;
	549
5f8e17ce EN	550	for (i = 0; i < ARRAY_SIZE(mxcfb_info); i++) {
	551	struct fb_info *fbi = mxcfb_info[i];
	552	if (fbi) {
	553	struct mxcfb_info *mxc_fbi = fbi->par;
	554	ipu_disable_channel(mxc_fbi->ipu_ch);
	555	ipu_uninit_channel(mxc_fbi->ipu_ch);
	556	}
	557	}
	558	for (i = 0; i < ARRAY_SIZE(stat->int_stat); i++) {
	559	__raw_writel(__raw_readl(&stat->int_stat[i]),
	560	&stat->int_stat[i]);
	561	}
	562	}
	563
09c8bb26 EN	564	int ipuv3_fb_init(struct fb_videomode const *mode,
	565	uint8_t disp,
	566	uint32_t pixfmt)
e9934f0b SB	567	{
e9934f0b SB	568	gmode = mode;
02ae1a18 MV	569	gdisp = disp;
02ae1a18 MV	570	gpixfmt = pixfmt;
e9934f0b SB	571
e9934f0b SB	572	return 0;
5dda7945	573	}
57f065fe	574
57f065fe AG	575	enum {
	576	/* Maximum display size we support */
	577	LCD_MAX_WIDTH = 1920,
	578	LCD_MAX_HEIGHT = 1080,
	579	LCD_MAX_LOG2_BPP = VIDEO_BPP16,
	580	};
	581
	582	static int ipuv3_video_probe(struct udevice *dev)
	583	{
	584	struct video_uc_platdata *plat = dev_get_uclass_platdata(dev);
	585	struct video_priv *uc_priv = dev_get_uclass_priv(dev);
f4ec1ae0 HS	586	#if defined(CONFIG_DISPLAY)
	587	struct udevice *disp_dev;
	588	#endif
57f065fe AG	589	u32 fb_start, fb_end;
	590	int ret;
	591
	592	debug("%s() plat: base 0x%lx, size 0x%x\n",
	593	__func__, plat->base, plat->size);
	594
	595	ret = ipu_probe();
	596	if (ret)
	597	return ret;
	598
	599	ret = ipu_displays_init();
	600	if (ret < 0)
	601	return ret;
	602
	603	ret = mxcfb_probe(gpixfmt, gdisp, gmode);
	604	if (ret < 0)
	605	return ret;
	606
f4ec1ae0 HS	607	#if defined(CONFIG_DISPLAY)
	608	ret = uclass_first_device(UCLASS_DISPLAY, &disp_dev);
	609	if (disp_dev) {
	610	ret = display_enable(disp_dev, 16, NULL);
	611	if (ret < 0)
	612	return ret;
	613	}
	614	#endif
0b12f76f AG	615	if (CONFIG_IS_ENABLED(PANEL)) {
	616	struct udevice *panel_dev;
	617
	618	ret = uclass_get_device(UCLASS_PANEL, 0, &panel_dev);
	619	if (panel_dev)
	620	panel_enable_backlight(panel_dev);
	621	}
f4ec1ae0	622
57f065fe AG	623	uc_priv->xsize = gmode->xres;
	624	uc_priv->ysize = gmode->yres;
	625	uc_priv->bpix = LCD_MAX_LOG2_BPP;
	626
	627	/* Enable dcache for the frame buffer */
	628	fb_start = plat->base & ~(MMU_SECTION_SIZE - 1);
	629	fb_end = plat->base + plat->size;
	630	fb_end = ALIGN(fb_end, 1 << MMU_SECTION_SHIFT);
	631	mmu_set_region_dcache_behaviour(fb_start, fb_end - fb_start,
	632	DCACHE_WRITEBACK);
	633	video_set_flush_dcache(dev, true);
f03e56ad	634	gd->fb_base = fb_start;
57f065fe AG	635
	636	return 0;
	637	}
	638
	639	struct ipuv3_video_priv {
	640	ulong regs;
	641	};
	642
	643	static int ipuv3_video_bind(struct udevice *dev)
	644	{
	645	struct video_uc_platdata *plat = dev_get_uclass_platdata(dev);
	646
	647	plat->size = LCD_MAX_WIDTH * LCD_MAX_HEIGHT *
b5e1a82e	648	(1 << VIDEO_BPP32) / 8;
57f065fe AG	649
	650	return 0;
	651	}
	652
	653	static const struct udevice_id ipuv3_video_ids[] = {
db755b36	654	#ifdef CONFIG_ARCH_MX6
57f065fe	655	{ .compatible = "fsl,imx6q-ipu" },
db755b36 AG	656	#endif
db755b36 AG	657	#ifdef CONFIG_ARCH_MX5
01c9dd21	658	{ .compatible = "fsl,imx53-ipu" },
db755b36	659	#endif
57f065fe AG	660	{ }
	661	};
	662
	663	U_BOOT_DRIVER(ipuv3_video) = {
	664	.name = "ipuv3_video",
	665	.id = UCLASS_VIDEO,
	666	.of_match = ipuv3_video_ids,
	667	.bind = ipuv3_video_bind,
	668	.probe = ipuv3_video_probe,
	669	.priv_auto_alloc_size = sizeof(struct ipuv3_video_priv),
	670	.flags = DM_FLAG_PRE_RELOC,
	671	};