Peter Maydell [Mon, 4 Sep 2017 14:21:53 +0000 (15:21 +0100)]
target/arm: Create and use new function arm_v7m_is_handler_mode()
Add a utility function for testing whether the CPU is in Handler
mode; this is just a check whether v7m.exception is non-zero, but
we do it in several places and it makes the code a bit easier
to read to not have to mentally figure out what the test is testing.
Peter Maydell [Mon, 4 Sep 2017 14:21:53 +0000 (15:21 +0100)]
target/arm: Don't calculate lr in arm_v7m_cpu_do_interrupt() until needed
Move the code in arm_v7m_cpu_do_interrupt() that calculates the
magic LR value down to when we're actually going to use it.
Having the calculation and use so far apart makes the code
a little harder to understand than it needs to be.
Peter Maydell [Mon, 4 Sep 2017 14:21:52 +0000 (15:21 +0100)]
target/arm: Make arm_cpu_dump_state() handle the M-profile XPSR
Make the arm_cpu_dump_state() debug logging handle the M-profile XPSR
rather than assuming it's an A-profile CPSR. On M profile the PSR
line of a register dump will now look like this:
Peter Maydell [Mon, 4 Sep 2017 14:21:52 +0000 (15:21 +0100)]
target/arm: Don't use cpsr_write/cpsr_read to transfer M profile XPSR
For M profile the XPSR is a similar but not identical format to the
A profile CPSR/SPSR. (For instance the Thumb bit is in a different
place.) For guest accesses we make the M profile code go through
xpsr_read() and xpsr_write() which handle the different layout.
However for migration we use cpsr_read() and cpsr_write() to
marshal state into and out of the migration data stream. This
is pretty confusing and works more by luck than anything else.
Make M profile migration use xpsr_read() and xpsr_write() instead.
The most complicated part of this is handling the possibility
that the migration source is an older QEMU which hands us a
CPSR format value; helpfully we can always tell the two apart.
Peter Maydell [Mon, 4 Sep 2017 14:21:52 +0000 (15:21 +0100)]
target/arm: Don't store M profile PRIMASK and FAULTMASK in daif
We currently store the M profile CPU register state PRIMASK and
FAULTMASK in the daif field of the CPU state in its I and F
bits. This is a legacy from the original implementation, which
tried to share the cpu_exec_interrupt code between A profile
and M profile. We've since separated out the two cases because
they are significantly different, so now there is no common
code between M and A profile which looks at env->daif: all the
uses are either in A-only or M-only code paths. Sharing the state
fields now is just confusing, and will make things awkward
when we implement v8M, where the PRIMASK and FAULTMASK
registers are banked between security states.
Switch M profile over to using v7m.faultmask and v7m.primask
fields for these registers.
Peter Maydell [Mon, 4 Sep 2017 14:21:52 +0000 (15:21 +0100)]
target/arm: Define and use XPSR bit masks
The M profile XPSR is almost the same format as the A profile CPSR,
but not quite. Define some XPSR_* macros and use them where we
definitely dealing with an XPSR rather than reusing the CPSR ones.
Peter Maydell [Mon, 4 Sep 2017 14:21:52 +0000 (15:21 +0100)]
target/arm: Fix outdated comment about exception exit
When we switched our handling of exception exit to detect
the magic addresses at translate time rather than via
a do_unassigned_access hook, we forgot to update a
comment; correct the omission.
Peter Maydell [Mon, 4 Sep 2017 14:21:52 +0000 (15:21 +0100)]
target/arm: Remove incorrect comment about MPU_CTRL
Remove the comment that claims that some MPU_CTRL bits are stored
in sctlr_el[1]. This has never been true since MPU_CTRL was added
in commit 29c483a50607 -- the comment is a leftover from
Michael Davidsaver's original implementation, which I modified
not to use sctlr_el[1]; I forgot to delete the comment then.
Peter Maydell [Mon, 4 Sep 2017 14:21:52 +0000 (15:21 +0100)]
hw/intc/armv7m_nvic.c: Remove out of date comment
Remove an out of date comment which says there's only one
item in the NVIC container region -- we put systick into its
own device object a while back and so now there are two
things in the container.
Peter Maydell [Mon, 4 Sep 2017 14:21:51 +0000 (15:21 +0100)]
target/arm: Tighten up Thumb decode where new v8M insns will be
Tighten up the T32 decoder in the places where new v8M instructions
will be:
* TT/TTT/TTA/TTAT are in what was nominally LDREX/STREX r15, ...
which is UNPREDICTABLE:
make the UNPREDICTABLE behaviour be to UNDEF
* BXNS/BLXNS are distinguished from BX/BLX via the low 3 bits,
which in previous architectural versions are SBZ:
enforce the SBZ via UNDEF rather than ignoring it, and move
the "ARCH(5)" UNDEF case up so we don't leak a TCG temporary
* SG is in the encoding which would be LDRD/STRD with rn = r15;
this is UNPREDICTABLE and we currently UNDEF:
move this check further up the code so that we don't leak
TCG temporaries in the UNDEF case and have a better place
to put the SG decode.
This means that if a v8M binary is accidentally run on v7M
or if a test case hits something that we haven't implemented
yet the behaviour will be obvious (UNDEF) rather than obscure
(plough on treating it as a different instruction).
In the process, add some comments about the instruction patterns
at these points in the decode. Our Thumb and ARM decoders are
very difficult to understand currently, but gradually adding
comments like this should help to clarify what exactly has
been decoded when.
Peter Maydell [Mon, 4 Sep 2017 14:21:51 +0000 (15:21 +0100)]
target/arm: Consolidate PMSA handling in get_phys_addr()
Currently get_phys_addr() has PMSAv7 handling before the
"is translation disabled?" check, and then PMSAv5 after it.
Tidy this up by making the PMSAv5 code handle the "MPU disabled"
case itself, so that we have all the PMSA code in one place.
This will make adding the PMSAv8 code slightly cleaner, and
also means that pre-v7 PMSA cores benefit from the MPU lookup
logging that the PMSAv7 codepath had.
Peter Maydell [Mon, 4 Sep 2017 14:21:51 +0000 (15:21 +0100)]
target/arm: Don't trap WFI/WFE for M profile
M profile cores can never trap on WFI or WFE instructions. Check for
M profile in check_wfx_trap() to ensure this.
The existing code will do the right thing for v7M cores because
the hcr_el2 and scr_el3 registers will be all-zeroes and so we
won't attempt to trap, but when we start setting ARM_FEATURE_V8
for v8M cores the v8A handling of SCTLR.nTWE and .nTWI will not
give the right results.
* remotes/armbru/tags/pull-qapi-2017-09-01-v3: (47 commits)
qapi: drop the sentinel in enum array
qapi: Change data type of the FOO_lookup generated for enum FOO
qapi: Convert indirect uses of FOO_lookup[...] to qapi_enum_lookup()
qapi: Mechanically convert FOO_lookup[...] to FOO_str(...)
qapi: Generate FOO_str() macro for QAPI enum FOO
qapi: Avoid unnecessary use of enum lookup table's sentinel
qapi: Use qapi_enum_parse() in input_type_enum()
crypto: Use qapi_enum_parse() in qcrypto_block_luks_name_lookup()
quorum: Use qapi_enum_parse() in quorum_open()
block: Use qemu_enum_parse() in blkdebug_debug_breakpoint()
hmp: Use qapi_enum_parse() in hmp_migrate_set_parameter()
hmp: Use qapi_enum_parse() in hmp_migrate_set_capability()
tpm: Clean up model registration & lookup
tpm: Clean up driver registration & lookup
qapi: Drop superfluous qapi_enum_parse() parameter max
qapi: Update qapi-code-gen.txt examples to match current code
qapi-schema: Improve section headings
qapi-schema: Move queries from common.json to qapi-schema.json
qapi-schema: Make block-core.json self-contained
qapi-schema: Fold event.json back into qapi-schema.json
...
block: Use qemu_enum_parse() in blkdebug_debug_breakpoint()
The error message on invalid blkdebug events changes from
qemu-system-x86_64: LOCATION: Invalid event name "VALUE"
to
qemu-system-x86_64: LOCATION: invalid parameter value: VALUE
Slight degradation, but the message is sub-par even before the patch.
When complaining about a parameter value, both parameter name and
value should be mentioned, as the value may well not be unique. Left
for another day.
Also left is the error message's unhelpful location: it points to the
config=FILENAME rather than into that file.
We have a strict separation between enum TpmModel and tpm_models[]:
* TpmModel may have any number of members. It just happens to have one.
* tpm_register_model() uses the first empty slot in tpm_models[].
If you register more than tpm_models[] has space,
tpn_register_model() fails. Its caller silently ignores the
failure.
Register the same TpmModel more than once has no effect other than
wasting tpm_models[] slots: tpm_model_is_registered() is happy with
the first one it finds.
Since we only ever register one model, and tpm_models[] has space for
just that one, this contraption even works.
Turn tpm_models[] into a straight map from enum TpmType to bool. Much
simpler.
We have a strict separation between enum TpmType and be_drivers[]:
* TpmType may have any number of members. It just happens to have one.
* tpm_register_driver() uses the first empty slot in be_drivers[].
If you register more than tpm_models[] has space,
tpm_register_driver() fails. Its caller silently ignores the
failure.
If you register more than one with a given TpmType,
tpm_display_backend_drivers() will shows all of them, but
tpm_driver_find_by_type() and tpm_get_backend_driver() will find
only the one one that registered first.
Since we only ever register one driver, and be_drivers[] has space for
just that one, this contraption even works.
Turn be_drivers[] into a straight map from enum TpmType to driver.
Much simpler, and has a decent chance to actually work should we ever
acquire additional drivers.
While there, use qapi_enum_parse() in tpm_get_backend_driver().
The generated QEMU QMP reference is now structured as follows:
1.1 Introduction
1.2 Stability Considerations
1.3 Common data types
1.4 Socket data types
1.5 VM run state
1.6 Cryptography
1.7 Block devices
1.7.1 Block core (VM unrelated)
1.7.2 QAPI block definitions (vm unrelated)
1.8 Character devices
1.9 Net devices
1.10 Rocker switch device
1.11 TPM (trusted platform module) devices
1.12 Remote desktop
1.12.1 Spice
1.12.2 VNC
1.13 Input
1.14 Migration
1.15 Transactions
1.16 Tracing
1.17 QMP introspection
1.18 Miscellanea
Section "1.18 Miscellanea" is still too big: it documents 134 symbols.
Section "1.7.1 Block core (VM unrelated)" is also rather big: 128
symbols. All the others are of reasonable size.
Except for block-core.json, the sub-schemas are self-contained: if
they use a symbol defined in another sub-schema, they include that
sub-schema. To check, feed the sub-schema to qapi2texi (or any other
QAPI generator) along with the pragma from qapi-schema.json.
Fix up things to make block-core.json self-contained, too.
qapi-schema: Document how generated documentation is ordered
Documentation generated with qapi2texi.py is in source order, with
included sub-schemas inserted at the first include directive
(subsequent include directives have no effect). To get a sane and
stable order, it's best to include each sub-schema just once, or
include it first in qapi-schema.json. Document that.
qlit: rename compare_litqobj_to_qobj() to qlit_equal_qobject()
compare_litqobj_to_qobj() lacks a qlit_ prefix. Moreover, "compare"
suggests -1, 0, +1 for less than, equal and greater than. The
function actually returns non-zero for equal, zero for unequal.
Rename to qlit_equal_qobject().
Its return type will be cleaned up in the next patch.
The QLIT_QFOO() macros expand into compound literals. Sadly, gcc
doesn't recognizes these as constant expressions (clang does), which
makes the macros useless for initializing objects with static storage
duration.
There is a gcc bug about it:
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=71713
tests/qmp-test: Add generic, basic test of query commands
A command is a query if it has no side effect and yields a result.
Such commands are typically named query-FOO, but there are exceptions.
The basic idea is to find candidates with query-qmp-schema, filter out
the ones that aren't queries with an explicit blacklist, and test the
remaining ones against a QEMU with no special arguments.
The current blacklist is just add-fd.
The test can't do queries with arguments, because it knows nothing
about the arguments. No coverage for query-cpu-model-baseline,
query-cpu-model-comparison, query-cpu-model-expansion, query-rocker,
query-rocker-ports, query-rocker-of-dpa-flows, and
query-rocker-of-dpa-groups.
Most tested commands are expected to succeed. The test does not check
the return value then.
query-balloon and query-vm-generation-id are expected to fail because
they need a virtio-balloon / vmgenid device to succeed, and this test
is too dumb to set one up. Could be addressed later.
query-acpi-ospm-status and query-hotpluggable-cpus are expected to
fail because they require features provided only by special machine
types, and this test is too dumb to set that up. Could also be
addressed later.
Several commands may either be functional or stubs that always fail,
depending on build configuration. Ideally, the stubs shouldn't be in
query-qmp-schema, but that requires QAPI schema compile-time
configuration, which we don't have, yet. Until we do, we need to
figure out whether a command is a stub. When we have a suitable
CONFIG_FOO preprocessor symbol is available, use that. Else,
simply blacklist the command for now.
We get basic test coverage for the following commands, except as
noted:
qom-list-types
query-acpi-ospm-status (expected to fail)
query-balloon (expected to fail)
query-block
query-block-jobs
query-blockstats
query-chardev
query-chardev-backends
query-command-line-options
query-commands
query-cpu-definitions (blacklisted for now)
query-cpus
query-dump
query-dump-guest-memory-capability
query-events
query-fdsets
query-gic-capabilities (blacklisted for now)
query-hotpluggable-cpus (expected to fail)
query-iothreads
query-kvm
query-machines
query-memdev
query-memory-devices
query-mice
query-migrate
query-migrate-cache-size
query-migrate-capabilities
query-migrate-parameters
query-name
query-named-block-nodes
query-pci (blacklisted for now)
query-qmp-schema
query-rx-filter
query-spice
query-status
query-target
query-tpm
query-tpm-models
query-tpm-types
query-uuid
query-version
query-vm-generation-id (expected to fail)
query-vnc
query-vnc-servers
query-xen-replication-status
Peter Maydell [Fri, 1 Sep 2017 16:28:54 +0000 (17:28 +0100)]
Merge remote-tracking branch 'remotes/ehabkost/tags/x86-and-machine-pull-request' into staging
x86, cpu queue, 2017-09-01
CPU creation refactor plus x86 patches.
# gpg: Signature made Fri 01 Sep 2017 15:59:02 BST
# gpg: using RSA key 0x2807936F984DC5A6
# gpg: Good signature from "Eduardo Habkost <[email protected]>"
# Primary key fingerprint: 5A32 2FD5 ABC4 D3DB ACCF D1AA 2807 936F 984D C5A6
* remotes/ehabkost/tags/x86-and-machine-pull-request: (29 commits)
ppc: replace cpu_ppc_init() with cpu_generic_init()
unicore32: replace uc32_cpu_init() with cpu_generic_init()
openrisc: replace cpu_openrisc_init() with cpu_generic_init()
moxie: replace cpu_moxie_init() with cpu_generic_init()
lm32: replace cpu_lm32_init() with cpu_generic_init()
x86: replace cpu_x86_init() with cpu_generic_init()
cris: replace cpu_cris_init() with cpu_generic_init()
arm: replace cpu_arm_init() with cpu_generic_init()
sh4: replace cpu_sh4_init() with cpu_generic_init()
tricore: replace cpu_tricore_init() with cpu_generic_init()
xtensa: replace cpu_xtensa_init() with cpu_generic_init()
tilegx: replace cpu_tilegx_init() with cpu_generic_init()
nios2: replace cpu_nios2_init() with cpu_generic_init()
microblaze: replace cpu_mb_init() with cpu_generic_init()
m68k: replace cpu_m68k_init() with cpu_generic_init()
hppa: replace cpu_hppa_init() with cpu_generic_init()
alpha: replace cpu_alpha_init() with cpu_generic_init()
s390x: replace cpu_s390x_init() with cpu_generic_init()
sparc: replace cpu_sparc_init() with cpu_generic_init()
sparc: make cpu feature parsing property based
...
Igor Mammedov [Thu, 24 Aug 2017 16:31:38 +0000 (18:31 +0200)]
xtensa: replace cpu_xtensa_init() with cpu_generic_init()
call xtensa_irq_init() at realize time which makes
cpu_xtensa_init() like generic cpu creation function.
As result we can replace it with cpu_generic_init()
which does the same job, reducing code duplication a bit.
Igor Mammedov [Thu, 24 Aug 2017 16:31:37 +0000 (18:31 +0200)]
tilegx: replace cpu_tilegx_init() with cpu_generic_init()
cpu_tilegx_init() always falls back to TYPE_TILEGX_CPU object
regardless of cpu_model. Put fallback logic into
tilegx_cpu_class_by_name() which would translate any cpu_model
into TYPE_TILEGX_CPU class and replace cpu_tilegx_init()
with cpu_generic_init().
Igor Mammedov [Thu, 24 Aug 2017 16:31:36 +0000 (18:31 +0200)]
nios2: replace cpu_nios2_init() with cpu_generic_init()
cpu_nios2_init() always falls back to TYPE_NIOS2_CPU object
regardless of cpu_model. Put fallback logic into
nios2_cpu_class_by_name() which would translate any cpu_model
into TYPE_NIOS2_CPU class and replace cpu_nios2_init()
with cpu_generic_init()
Igor Mammedov [Thu, 24 Aug 2017 16:31:35 +0000 (18:31 +0200)]
microblaze: replace cpu_mb_init() with cpu_generic_init()
cpu_mb_init() always falls back to TYPE_MICROBLAZE_CPU object
regardless of cpu_model. Put fallback logic into
mb_cpu_class_by_name() which would translate any cpu_model
into TYPE_MICROBLAZE_CPU class and replace cpu_mb_init()
with cpu_generic_init().
Igor Mammedov [Thu, 24 Aug 2017 16:31:34 +0000 (18:31 +0200)]
m68k: replace cpu_m68k_init() with cpu_generic_init()
call register_m68k_insns() at realize time which makes
cpu_m68k_init() typical object creation function.
As result we can replace it with cpu_generic_init()
which does the same job, reducing code duplication a bit.
Igor Mammedov [Thu, 24 Aug 2017 16:31:33 +0000 (18:31 +0200)]
hppa: replace cpu_hppa_init() with cpu_generic_init()
drop custom cpu_hppa_init() in favor of cpu_generic_init(),
to make cpu_generic_init() work all we need is to provide
cc->class_by_name callback that would resolve any cpu_model
to the sole TYPE_HPPA_CPU to match current behaviour.
Igor Mammedov [Thu, 24 Aug 2017 16:31:32 +0000 (18:31 +0200)]
alpha: replace cpu_alpha_init() with cpu_generic_init()
cpu_alpha_init() used to provide default fallback if invalid
(i.e. non existent) cpu_model were provided.
dp264 machine provides its own default so sole user of fallback
is [bsd|linux]-user targets which specifies 'any' cpu model that
fallbacks to "ev67" in cpu_alpha_init(). Push fallback handling
into alpha_cpu_class_by_name() and replace cpu_alpha_init() with
cpu_generic_init().
Igor Mammedov [Thu, 31 Aug 2017 13:19:38 +0000 (15:19 +0200)]
s390x: replace cpu_s390x_init() with cpu_generic_init()
cpu_s390x_init() is used only *-user targets indirectly
via cpu_init() macro and has a hack to assign ids to created
cpus (I'm not sure if 'id' really matters to *-user emulation).
So to on safe side, instead of having custom wrapper to do numbering
replace it with cpu_generic_init() and use S390CPUClass::next_cpu_id
which could serve the same purpose as static variable and move cpu->id
initialization to s390_cpu_initfn for CONFIG_USER_ONLY use-case.
PS:
ifdef is ugly but it allows us to hide s390x detail that isn't
set by *-user targets and reuse generic cpu creation utility
for btoh machine and user emulation.
Igor Mammedov [Fri, 25 Aug 2017 14:47:40 +0000 (16:47 +0200)]
sparc: make cpu feature parsing property based
with features converted to properties we can use the same
approach as x86 for features parsing and drop legacy
approach that manipulated CPU instance directly.
New sparc_cpu_parse_features() will allow only +-feat
and explicitly disable feat=on|off syntax for now.
With that in place and sparc_cpu_parse_features() providing
generic CPUClass::parse_features callback, the cpu_sparc_init()
will do the same job as cpu_generic_init() so replace content
of cpu_sparc_init() with it.
Igor Mammedov [Thu, 24 Aug 2017 16:31:28 +0000 (18:31 +0200)]
sparc: move adhoc CPUSPARCState initialization to realize time
SPARCCPU::env was initialized from previously set properties
(with help of sparc_cpu_parse_features) in cpu_sparc_register().
However there is not reason to keep it there as this task is
typically done at realize time. So move post properties
initialization into sparc_cpu_realizefn, which brings
cpu_sparc_init() closer to cpu_generic_init().
Igor Mammedov [Thu, 24 Aug 2017 16:31:27 +0000 (18:31 +0200)]
sparc: convert cpu features to qdev properties
SPARC is the last target that uses legacy way of parsing
and initializing cpu features, drop legacy approach and
convert features to properties so that SPARC could as minimum
benefit from generic cpu_generic_init(), common with
x86 +-feat parser
PS:
the main purpose is to remove legacy way of cpu creation as
a blocker for unifying cpu creation code across targets.
Igor Mammedov [Thu, 24 Aug 2017 16:31:26 +0000 (18:31 +0200)]
sparc: embed sparc_def_t into CPUSPARCState
Make CPUSPARCState::def embedded so it would be allocated as part
of cpu instance and we won't have to worry about cleaning def pointer
up mannualy on cpu destruction.
Igor Mammedov [Thu, 24 Aug 2017 16:31:24 +0000 (18:31 +0200)]
qom: cpu: fix parsed feature string length
since commit ( 9262685b cpu: Factor out cpu_generic_init() )
features parsed by it were truncated only to the 1st feature
after CPU name due to fact that
would extract exactly one feature and parse_features() callback
would parse it and only it leaving the rest of features ignored.
Reuse approach from x86 custom impl. i.e. replace strtok() token
parsing with g_strsplit(), which would split feature string in
2 parts name and features list and pass the later to
parse_features() callback.
Yi Wang [Wed, 26 Jul 2017 06:18:37 +0000 (02:18 -0400)]
hmp: allow apic-id for "info lapic"
Add [apic-id] support for hmp command "info lapic", which is
useful when debugging ipi and so on. Current behavior is not
changed when the parameter isn't specified.
Eduardo Habkost [Tue, 29 Aug 2017 22:03:37 +0000 (19:03 -0300)]
qom: Remove unused errp parameter from can_be_deleted()
The errp argument is ignored by all implementations of the
method, and user_creatable_del() would break if any
implementation set an error (because it calls error_setg(errp) if
the function returns false). Remove the unused parameter.
qapi: Fix error handling code on alternate conflict
The conflict check added by commit c0644771 ("qapi: Reject
alternates that can't work with keyval_parse()") doesn't work
with the following declaration:
Peter Maydell [Thu, 31 Aug 2017 14:52:43 +0000 (15:52 +0100)]
Merge remote-tracking branch 'remotes/elmarco/tags/tidy-pull-request' into staging
# gpg: Signature made Thu 31 Aug 2017 11:29:33 BST
# gpg: using RSA key 0xDAE8E10975969CE5
# gpg: Good signature from "Marc-André Lureau <[email protected]>"
# gpg: aka "Marc-André Lureau <[email protected]>"
# gpg: WARNING: This key is not certified with sufficiently trusted signatures!
# gpg: It is not certain that the signature belongs to the owner.
# Primary key fingerprint: 87A9 BD93 3F87 C606 D276 F62D DAE8 E109 7596 9CE5
* remotes/elmarco/tags/tidy-pull-request: (29 commits)
eepro100: replace g_malloc()+memcpy() with g_memdup()
test-iov: replace g_malloc()+memcpy() with g_memdup()
i386: replace g_malloc()+memcpy() with g_memdup()
i386: introduce ELF_NOTE_SIZE macro
decnumber: use DIV_ROUND_UP
kvm: use DIV_ROUND_UP
i386/dump: use DIV_ROUND_UP
ppc: use DIV_ROUND_UP
msix: use DIV_ROUND_UP
usb-hub: use DIV_ROUND_UP
q35: use DIV_ROUND_UP
piix: use DIV_ROUND_UP
virtio-serial: use DIV_ROUND_UP
console: use DIV_ROUND_UP
monitor: use DIV_ROUND_UP
virtio-gpu: use DIV_ROUND_UP
vga: use DIV_ROUND_UP
ui: use DIV_ROUND_UP
vnc: use DIV_ROUND_UP
vvfat: use DIV_ROUND_UP
...
Peter Maydell [Thu, 31 Aug 2017 13:33:54 +0000 (14:33 +0100)]
Merge remote-tracking branch 'remotes/stefanha/tags/block-pull-request' into staging
# gpg: Signature made Thu 31 Aug 2017 09:21:49 BST
# gpg: using RSA key 0x9CA4ABB381AB73C8
# gpg: Good signature from "Stefan Hajnoczi <[email protected]>"
# gpg: aka "Stefan Hajnoczi <[email protected]>"
# Primary key fingerprint: 8695 A8BF D3F9 7CDA AC35 775A 9CA4 ABB3 81AB 73C8
* remotes/stefanha/tags/block-pull-request:
qcow2: allocate cluster_cache/cluster_data on demand
qemu-doc: Add UUID support in initiator name
tests: migration/guestperf Python 2.6 argparse compatibility
docker.py: Python 2.6 argparse compatibility
scripts: add argparse module for Python 2.6 compatibility
misc: Remove unused Error variables
oslib-posix: Print errors before aborting on qemu_alloc_stack()
throttle: Test the valid range of config values
throttle: Make burst_length 64bit and add range checks
throttle: Make LeakyBucket.avg and LeakyBucket.max integer types
throttle: Remove throttle_fix_bucket() / throttle_unfix_bucket()
throttle: Make throttle_is_valid() a bit less verbose
throttle: Update the throttle_fix_bucket() documentation
throttle: Fix wrong variable name in the header documentation
nvme: Fix get/set number of queues feature, again
Peter Maydell [Thu, 31 Aug 2017 12:51:40 +0000 (13:51 +0100)]
Merge remote-tracking branch 'remotes/ericb/tags/pull-nbd-2017-08-30' into staging
nbd patches for 2017-08-30
- Kashyap Chamarthy: qemu-iotests: Extend non-shared storage migration test (194)
- Stefan Hajnaczi: 0/3 nbd-client: enter read_reply_co during init to avoid crash
- Vladimir Sementsov-Ogievskiy: portions of 0/17 nbd client refactoring and fixing
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* remotes/ericb/tags/pull-nbd-2017-08-30:
block/nbd-client: refactor request send/receive
block/nbd-client: rename nbd_recv_coroutines_enter_all
block/nbd-client: get rid of ssize_t
nbd/client: fix nbd_send_request to return int
nbd/client: refactor nbd_receive_reply
nbd/client: refactor nbd_read_eof
nbd/client: fix nbd_opt_go
qemu-iotests: test NBD over UNIX domain sockets in 083
qemu-iotests: improve nbd-fault-injector.py startup protocol
nbd-client: avoid read_reply_co entry if send failed
qemu-iotests: Extend non-shared storage migration test (194)
Peter Maydell [Thu, 31 Aug 2017 10:29:41 +0000 (11:29 +0100)]
Merge remote-tracking branch 'remotes/cohuck/tags/s390x-20170830' into staging
First batch of s390x patches:
- 2.11 compat machine
- support the new --s390-pgste linker option, making it possible to
avoid enabling the global vm.allocate_pgste systl if all pieces
are in place
- correctly identify some devices as not hotpluggable
- clean up some tests and enable them for s390x
- wire up the diag288 watchdog in tcg
- clean up dependencies on CONFIG_PCI, making it possible to disable
it by hand
- lots of cleanup in target/s390x/
- fix alignment of the ccw1 structure in the s390-ccw bios
- and some more bugfixes
* remotes/cohuck/tags/s390x-20170830: (44 commits)
s390x/pci: fixup trap_msix()
pc-bios/s390-ccw.img: update image
s390-ccw: Fix alignment for CCW1
s390x/s390-stattrib: Mark the storage attribute as not user_creatable
target/s390x: cleanup cpu.h
s390x/kvm: move KVM declarations and stubs to separate files
s390x: avoid calling kvm_ functions outside of target/s390x/
target/s390x: move a couple of functions to cpu.c
target/s390x: introduce internal.h
target/s390x: move get_per_in_range() to misc_helper.c
target/s390x: move s390_do_cpu_reset() to diag.c
target/s390x: move psw_key_valid() to mem_helper.c
target/s390x: move cpu_mmu_idx_to_asc() to excp_helper.c
target/s390x: move cc_name() to helper.c
target/s390x: move gtod_*() declarations to s390-virtio.h
s390x: drop inclusion of sysemu/kvm.h from some files
s390x/cpumodel: factor out determination of default model name
target/s390x: no need to pass kvm_state to savevm_gtod handlers
target/s390x: simplify gs_allowed()
target/s390x: simplify ri_allowed()
...