Andreas Färber [Sun, 17 Feb 2013 23:16:46 +0000 (23:16 +0000)]
target-ppc: Turn descriptive CPU family comments into device descriptions
This gets rid of some more overly long comments that have lost most of
their purpose now that in most cases there's only two functions left per
CPU family.
The class field is inherited by the actual CPU models, so override it.
Andreas Färber [Sun, 17 Feb 2013 23:16:44 +0000 (23:16 +0000)]
target-ppc: Register all types for TARGET_PPCEMB
Don't attempt to suppress registration of CPU types, since the criteria
is actually a property of the class and should thus become a field.
Since we can't check a field set in a class_init function before
registering the type that leads to execution of that function, guard the
-cpu class lookup instead and suppress exposing these classes in -cpu ?
and in QMP.
In case someone tries to hot-add an incompatible CPU via device_add,
error out in realize.
Andreas Färber [Sun, 17 Feb 2013 23:16:41 +0000 (23:16 +0000)]
target-ppc: Convert CPU definitions
Turn the array of model definitions into a set of self-registering QOM
types with their own class_init. Unique identifiers are obtained from
the combination of PVR, SVR and family identifiers; this requires all
alias #defines to be removed from the list. Possibly there are some more
left after this commit that are not currently being compiled.
Prepares for introducing abstract intermediate CPU types for families.
Keep the right-aligned macro line breaks within 78 chars to aid
three-way merges.
Andreas Färber [Sun, 17 Feb 2013 23:16:04 +0000 (23:16 +0000)]
target-ppc: Extract aliases from definitions list
Move definitions that were 100% identical except for the name into a
list of aliases so that we don't register duplicate CPU types.
Drop the accompanying comments since they don't really add value.
We need to support recursive lookup due to code names referencing a
generic name referencing a specific model revision.
David Gibson [Sun, 10 Feb 2013 18:59:02 +0000 (18:59 +0000)]
pseries: Add cleanup hook for PAPR virtual LAN device
Currently the spapr-vlan device does not supply a cleanup call for its
NetClientInfo structure. With current qemu versions, that leads to a SEGV
on exit, when net_cleanup() attempts to call the cleanup handlers on all
net clients.
Kuo-Jung Su [Tue, 5 Mar 2013 21:27:24 +0000 (21:27 +0000)]
hw/nand.c: correct the sense of the BUSY/READY status bit
The BIT6 of Status Register(SR):
SR[6] behaves the same as R/B# pin
SR[6] = 0 indicates the device is busy;
SR[6] = 1 means the device is ready
Some NAND flash controller (i.e. ftnandc021) relies on the SR[6]
to determine if the NAND flash erase/program is success or error timeout.
P.S:
The exmaple NAND flash datasheet could be found at following link:
http://www.mxic.com.tw/QuickPlace/hq/PageLibrary4825740B00298A3B.nsf/h_Index/8FEA549237D2F7674825795800104C26/$File/MX30LF1G08AA,%203V,%201Gb,%20v1.1.pdf
Aurelien Jarno [Tue, 5 Mar 2013 14:11:30 +0000 (15:11 +0100)]
Merge branch 'target-arm.next' of git://git.linaro.org/people/pmaydell/qemu-arm
* 'target-arm.next' of git://git.linaro.org/people/pmaydell/qemu-arm:
MAINTAINERS: add entry for ARM KVM guest cores
configure: Enable KVM on ARM
hw/kvm/arm_gic: Implement support for KVM in-kernel ARM GIC
target-arm: Use MemoryListener to identify GIC base address for KVM
hw/arm_gic: Convert ARM GIC classes to use init/realize
hw/arm_gic: Add presave/postload hooks
ARM KVM: save and load VFP registers from kernel
ARM: KVM: Add support for KVM on ARM architecture
target-arm: Drop CPUARMState* argument from bank_number()
linux-headers: resync from mainline to add ARM KVM headers
oslib-posix: Align to permit transparent hugepages on ARM Linux
target-arm: Don't decode RFE or SRS on M profile cores
target-arm: Factor out handling of SRS instruction
Deleting these first makes the next patch much easier to read.
This doesn't cause any sort of compilation failure because we
have not yet enabled n32/n64 compilation. This is dead code.
Peter Maydell [Tue, 5 Mar 2013 00:34:42 +0000 (00:34 +0000)]
target-arm: Use MemoryListener to identify GIC base address for KVM
When using an in-kernel GIC with KVM, we need to tell the kernel where
the GIC's memory mapped registers live. Do this by registering a
MemoryListener which tracks where the board model maps the A15's
private peripherals, so we can finish the GIC initialisation
when the GIC is actually mapped.
Peter Maydell [Tue, 5 Mar 2013 00:34:42 +0000 (00:34 +0000)]
hw/arm_gic: Convert ARM GIC classes to use init/realize
Convert the ARM GIC classes to use init/realize rather than
SysBusDevice::init. (We have to do them all in one patch to
avoid unconverted subclasses calling a nonexistent SysBusDevice
init function in the base class and crashing.)
Peter Maydell [Tue, 5 Mar 2013 00:34:41 +0000 (00:34 +0000)]
hw/arm_gic: Add presave/postload hooks
Add presave/postload hooks to the ARM GIC common base class.
These will be used by the KVM in-kernel GIC subclass to sync
state between kernel and userspace when migrating.
Peter Maydell [Tue, 5 Mar 2013 00:34:41 +0000 (00:34 +0000)]
ARM KVM: save and load VFP registers from kernel
Add support for saving and restoring VFP register state from the
kernel. This includes a check that the KVM-created CPU has full
VFP support (as the TCG Cortex-A15 model always does), since for
the moment ARM QEMU doesn't have any way to tweak optional features
on created CPUs.
Peter Maydell [Tue, 5 Mar 2013 00:34:40 +0000 (00:34 +0000)]
target-arm: Drop CPUARMState* argument from bank_number()
Drop the CPUARMState* argument from bank_number(), since we only
use it for passing to cpu_abort(). Use hw_error() instead.
This avoids propagating further interfaces using env pointers.
In the long term this function's callers need auditing to fix
problems where badly behaved guests can pass invalid bank numbers.
Peter Maydell [Tue, 5 Mar 2013 00:34:40 +0000 (00:34 +0000)]
linux-headers: resync from mainline to add ARM KVM headers
Resync QEMU's copy of the Linux kernel headers from
git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master
commit 2ef14f4. This adds the ARM KVM headers, since ARM KVM
support has just hit mainline via Russell's ARM tree.
This is not a pure sync -- I have removed by hand some changes
that would have reverted updates for s390x and ppc which have not
yet hit mainline.
Peter Maydell [Tue, 5 Mar 2013 00:31:17 +0000 (00:31 +0000)]
target-arm: Factor out handling of SRS instruction
Factor out the handling of the SRS instruction rather than
duplicating it between the Thumb and ARM decoders. This in
passing fixes two bugs in the Thumb decoder's SRS handling
which didn't exist in the ARM decoder:
* (LP:1079080) storing CPSR rather than SPSR (fixed in the
ARM decoder in commit c67b6b71 in 2009)
* failing to free the 'addr' TCG temp in the writeback case
target-mips: Fix accumulator selection for MIPS16 and microMIPS
Add accumulator arguments to gen_HILO and gen_muldiv, rather than
extracting the accumulator directly from ctx->opcode. The extraction
was only right for the standard encoding: MIPS16 doesn't have access
to the DSP registers, while microMIPS encodes the accumulator register
in a different field (bits 14 and 15).
Passing the accumulator register is probably an over-generalisation
for division and 64-bit multiplication, which never access anything
other than HI and LO, and which always pass 0 as the new argument.
Separating them felt a bit fussy though.
Meador Inge [Thu, 10 Jan 2013 22:50:22 +0000 (16:50 -0600)]
target-mips: Translate breaks and traps into the appropriate signal
GCC and GAS are capable of generating traps or breaks to check for
division by zero. Additionally, GAS is capable of generating traps
or breaks to check for overflow on certain division and multiplication
operations. The Linux kernel translates these traps and breaks into
signals. This patch implements the corresponding feature in QEMU.
Petar Jovanovic [Mon, 25 Feb 2013 15:45:40 +0000 (16:45 +0100)]
target-mips: fix DSP overflow macro and affected routines
The previous implementation incorrectly used same macro to detect overflow
for addition and subtraction. This patch makes distinction between these
two, and creates separate macros. The affected routines are changed
accordingly.
This change also includes additions to the existing tests for SUBQ_S_PH and
SUBQ_S_W that would trigger the fixed issue, and it removes dead code from
the test file. The last test case in subq_s_w.c is a bug found/reported/
isolated by Klaus Peichl from Dolby.
Anthony Liguori [Mon, 4 Mar 2013 14:22:48 +0000 (08:22 -0600)]
Merge remote-tracking branch 'stefanha/block' into staging
# By MORITA Kazutaka (5) and others
# Via Stefan Hajnoczi
* stefanha/block:
block: for HMP commit() operations on 'all', skip non-COW drives
sheepdog: add support for connecting to unix domain socket
sheepdog: use inet_connect to simplify connect code
sheepdog: accept URIs
move socket_set_nodelay to osdep.c
slirp/tcp_subr.c: fix coding style in tcp_connect
dataplane: remove EventPoll in favor of AioContext
virtio-blk: fix unplug + virsh reboot
ide/macio: Fix macio DMA initialisation.
Anthony Liguori [Mon, 4 Mar 2013 14:22:41 +0000 (08:22 -0600)]
Merge remote-tracking branch 'mst/tags/for_anthony' into staging
virtio,vhost,pci,e1000
Mostly bugfixes, but also some ICH work by Laszlo.
Signed-off-by: Michael S. Tsirkin <[email protected]>
# gpg: Signature made Thu 28 Feb 2013 07:13:56 AM CST using RSA key ID D28D5469
# gpg: Can't check signature: public key not found
# By Michael S. Tsirkin (2) and others
# Via Michael S. Tsirkin
* mst/tags/for_anthony:
Set virtio-serial device to have a default of 2 MSI vectors.
ICH9 LPC: Reset Control Register, basic implementation
Fix guest OS hang when 64bit PCI bar present
e1000: unbreak the guest network migration to 1.3
vhost: memory sync fixes
Anthony Liguori [Mon, 4 Mar 2013 14:20:06 +0000 (08:20 -0600)]
Merge remote-tracking branch 'stefanha/net' into staging
# By Jason Wang (2) and others
# Via Stefan Hajnoczi
* stefanha/net:
qmp: netdev_add is like -netdev, not -net, fix documentation
doc: document -netdev hubport
net: reduce the unnecessary memory allocation of multiqueue
tap: set IFF_ONE_QUEUE per default
tap: forbid creating multiqueue tap when hub is used
net: fix unbounded NetQueue
net: fix qemu_flush_queued_packets() in presence of a hub
Jeff Cody [Tue, 26 Feb 2013 14:55:48 +0000 (09:55 -0500)]
block: for HMP commit() operations on 'all', skip non-COW drives
During a commit of 'all' using the HMP non-live commit, the operation
is aborted and returns error on the first error enountered. When
non-COW drives are in use (e.g. ejected floppy, cdrom, or drives without
a backing parent), that means a commit all will return an error of either
-ENOMEDIUM or -ENOTSUP. This is not desirable, so for the 'all' commit
case, only attempt the commit if both bs->drv and bs->backing_hd are
present.
More succinctly: 'commit all' now means a commit on all COW drives.
This means an individual commit to a specific non-COW drive will still
return the appropriate error (-ENOMEDIUM if eject / not present, -ENOTSUP
if no backing file).
MORITA Kazutaka [Fri, 22 Feb 2013 03:39:53 +0000 (12:39 +0900)]
sheepdog: add support for connecting to unix domain socket
This patch adds support for a unix domain socket for a connection
between qemu and local sheepdog server. You can use the unix domain
socket with the following syntax:
Paolo Bonzini [Fri, 22 Feb 2013 09:40:34 +0000 (10:40 +0100)]
dataplane: remove EventPoll in favor of AioContext
During the review of the dataplane code, the EventPoll API morphed itself
(not concidentially) into something very very similar to an AioContext.
Thus, it is trivial to convert virtio-blk-dataplane to use AioContext,
and a first baby step towards letting dataplane talk directly to the
QEMU block layer.
The only interesting note is the value-copy of EventNotifiers. At least
in my opinion this is part of the EventNotifier API and is even portable
to Windows. Of course, in this case you should not close the notifier's
underlying file descriptors or handle with event_notifier_cleanup.
virtio-blk registers a vmstate change handler. Unfortunately this
handler is not unregistered on unplug, leading to some random
crashes if the system is restarted, e.g. via virsh reboot.
Lets unregister the vmstate change handler if the device is removed.
Mark Cave-Ayland [Sun, 24 Feb 2013 20:46:11 +0000 (20:46 +0000)]
ide/macio: Fix macio DMA initialisation.
Commit 07a7484e5d713f1eb7c1c37b18a8ab0d56d88875 accidentally introduced a bug
in the initialisation of the second macio DMA device which could cause some
DMA operations to segfault QEMU.
Peter Maydell [Fri, 22 Feb 2013 18:10:05 +0000 (18:10 +0000)]
gen-icount.h: Rename gen_icount_start/end to gen_tb_start/end
The gen_icount_start/end functions are now somewhat misnamed since they
are useful for generic "start/end of TB" code, used for more than just
icount. Rename them to gen_tb_start/end.
Peter Maydell [Fri, 22 Feb 2013 18:10:03 +0000 (18:10 +0000)]
Handle CPU interrupts by inline checking of a flag
Fix some of the nasty TCG race conditions and crashes by implementing
cpu_exit() as setting a flag which is checked at the start of each TB.
This avoids crashes if a thread or signal handler calls cpu_exit()
while the execution thread is itself modifying the TB graph (which
may happen in system emulation mode as well as in linux-user mode
with a multithreaded guest binary).
This fixes the crashes seen in LP:668799; however there are another
class of crashes described in LP:1098729 which stem from the fact
that in linux-user with a multithreaded guest all threads will
use and modify the same global TCG date structures (including the
generated code buffer) without any kind of locking. This means that
multithreaded guest binaries are still in the "unsupported"
category.
Peter Maydell [Fri, 22 Feb 2013 18:10:02 +0000 (18:10 +0000)]
cpu-exec: wrap tcg_qemu_tb_exec() in a fn to restore the PC
If tcg_qemu_tb_exec() returns a value whose low bits don't indicate a
link to an indexed next TB, this means that the TB execution never
started (eg because the instruction counter hit zero). In this case the
guest PC has to be reset to the address of the start of the TB.
Refactor the cpu-exec code to make all tcg_qemu_tb_exec() calls pass
through a wrapper function which does this restoration if necessary.
Note that the apparent change in cpu_exec_nocache() from calling
cpu_pc_from_tb() with the old TB to calling it with the TB returned by
do_tcg_qemu_tb_exec() is safe, because in the nocache case we can
guarantee that the TB we try to execute is not linked to any others,
so the only possible returned TB is the one we started at. That is,
we should arguably previously have included in cpu_exec_nocache() an
assert(next_tb & ~TB_EXIT_MASK) == tb), since the API requires restore
from next_tb but we were using tb.
Andreas Färber [Fri, 22 Feb 2013 18:10:01 +0000 (18:10 +0000)]
cpu: Introduce ENV_OFFSET macros
Introduce ENV_OFFSET macros which can be used in non-target-specific
code that needs to generate TCG instructions which reference CPUState
fields given the cpu_env register that TCG targets set up with a
pointer to the CPUArchState struct.
Peter Maydell [Fri, 22 Feb 2013 18:10:00 +0000 (18:10 +0000)]
tcg: Document tcg_qemu_tb_exec() and provide constants for low bit uses
Document tcg_qemu_tb_exec(). In particular, its return value is a
combination of a pointer to the next translation block and some
extra information in the low two bits. Provide some #defines for
the values passed in these bits to improve code clarity.
This doesn't happen in the real hardware. The Zynq TRM explicitly states that
this bit has no effect on the rx descriptor pointer ("The receive queue
pointer register is unaffected").
Bits in the ISR were continually mirroring their corresponding TX/RX SR bits.
This is incorrect. The ISR bits are only ever set at the time their
corresponding event occurs.
m25p80.c: Use QOM classes for part differentiation
Currently, M25P80 uses an object property to differentiate between flash parts.
Changed this over to use QOM sub-classes - the actual names of the different parts
are used to create a set of dynamic classes which passes the part info as class
data. The object no longer needs to search the known_devices table for itself,
instead it just gets its info from its own class.
Kept the intermediate class definition private to m25p80.c for the moment, as
the expectation is parts will only be added as new entries in the table. We can
factor out the TYPE_M25P80 abstraction into a header on a demand basis.
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