target-arm: Don't decode RFE or SRS on M profile cores

M profile cores do not have the RFE or SRS instructions, so
correctly UNDEF these insn patterns on those cores.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

diff --git a/target-arm/translate.c b/target-arm/translate.c
index e16c11334800cbd5d340b42ea2ee56edd7ccee88..35a21be931c85e4df04813ca87a2fa55cf8b6ffa 100644 (file)
--- a/target-arm/translate.c
+++ b/target-arm/translate.c
@@ -8180,9 +8180,10 @@ static int disas_thumb2_insn(CPUARMState *env, DisasContext *s, uint16_t insn_hw
         } else {
             /* Load/store multiple, RFE, SRS.  */
             if (((insn >> 23) & 1) == ((insn >> 24) & 1)) {
-                /* Not available in user mode.  */
-                if (IS_USER(s))
+                /* RFE, SRS: not available in user mode or on M profile */
+                if (IS_USER(s) || IS_M(env)) {
                     goto illegal_op;
+                }
                 if (insn & (1 << 20)) {
                     /* rfe */
                     addr = load_reg(s, rn);