cpu: Move the softmmu tlb to CPUNegativeOffsetState

We have for some time had code within the tcg backends to
handle large positive offsets from env.  This move makes
sure that need not happen.  Indeed, we are able to assert
at build time that simple offsets suffice for all hosts.

Reviewed-by: Alistair Francis <[email protected]>
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Richard Henderson <[email protected]>

cpu: Move icount_decr to CPUNegativeOffsetState

Amusingly, we had already ignored the comment to keep this value
at the end of CPUState.  This restores the minimum negative offset
from TCG_AREG0 for code generation.

For the couple of uses within qom/cpu.c, without NEED_CPU_H, add
a pointer from the CPUState object to the IcountDecr object within
CPUNegativeOffsetState.

Reviewed-by: Alistair Francis <[email protected]>
Signed-off-by: Richard Henderson <[email protected]>

cpu: Introduce CPUNegativeOffsetState

Nothing in there so far, but all of the plumbing done
within the target ArchCPU state.

Reviewed-by: Alistair Francis <[email protected]>
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Richard Henderson <[email protected]>

cpu: Introduce cpu_set_cpustate_pointers

Consolidate some boilerplate from foo_cpu_initfn.

Reviewed-by: Alistair Francis <[email protected]>
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Richard Henderson <[email protected]>

cpu: Move ENV_OFFSET to exec/gen-icount.h

Now that we have ArchCPU, we can define this generically,
in the one place that needs it.

Reviewed-by: Alistair Francis <[email protected]>
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Richard Henderson <[email protected]>

target/xtensa: Use env_cpu, env_archcpu

Cleanup in the boilerplate that each target must define.
Replace xtensa_env_get_cpu with env_archcpu.  The combination
CPU(xtensa_env_get_cpu) should have used ENV_GET_CPU to begin;
use env_cpu now.

Move cpu_get_tb_cpu_state below the include of "exec/cpu-all.h"
so that the definition of env_cpu is available.

Reviewed-by: Alistair Francis <[email protected]>
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Richard Henderson <[email protected]>

target/unicore32: Use env_cpu, env_archcpu

Cleanup in the boilerplate that each target must define.
Replace uc32_env_get_cpu with env_archcpu.  The combination
CPU(uc32_env_get_cpu) should have used ENV_GET_CPU to begin;
use env_cpu now.

Reviewed-by: Alistair Francis <[email protected]>
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Richard Henderson <[email protected]>

target/tricore: Use env_cpu

Cleanup in the boilerplate that each target must define.
Replace tricore_env_get_cpu with env_archcpu.  The combination
CPU(tricore_env_get_cpu) should have used ENV_GET_CPU to begin;
use env_cpu now.

Reviewed-by: Alistair Francis <[email protected]>
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Richard Henderson <[email protected]>

target/tilegx: Use env_cpu

Cleanup in the boilerplate that each target must define.
Replace tilegx_env_get_cpu with env_archcpu.  The combination
CPU(tilegx_env_get_cpu) should have used ENV_GET_CPU to begin;
use env_cpu now.

Reviewed-by: Alistair Francis <[email protected]>
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Richard Henderson <[email protected]>

target/sparc: Use env_cpu, env_archcpu

Cleanup in the boilerplate that each target must define.
Replace sparc_env_get_cpu with env_archcpu.  The combination
CPU(sparc_env_get_cpu) should have used ENV_GET_CPU to begin;
use env_cpu now.

Reviewed-by: Alistair Francis <[email protected]>
Reviewed-by: Philippe Mathieu-Daudé <[email protected]>
Signed-off-by: Richard Henderson <[email protected]>

target/sh4: Use env_cpu, env_archcpu

Cleanup in the boilerplate that each target must define.
Replace sh_env_get_cpu with env_archcpu.  The combination
CPU(sh_env_get_cpu) should have used ENV_GET_CPU to begin;
use env_cpu now.

Reviewed-by: Alistair Francis <[email protected]>
Reviewed-by: Philippe Mathieu-Daudé <[email protected]>
Signed-off-by: Richard Henderson <[email protected]>

target/s390x: Use env_cpu, env_archcpu

Cleanup in the boilerplate that each target must define.
Replace s390_env_get_cpu with env_archcpu.  The combination
CPU(s390_env_get_cpu) should have used ENV_GET_CPU to begin;
use env_cpu now.

Reviewed-by: Alistair Francis <[email protected]>
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Richard Henderson <[email protected]>

target/riscv: Use env_cpu, env_archcpu

Cleanup in the boilerplate that each target must define.
Replace riscv_env_get_cpu with env_archcpu.  The combination
CPU(riscv_env_get_cpu) should have used ENV_GET_CPU to begin;
use env_cpu now.

Reviewed-by: Alistair Francis <[email protected]>
Signed-off-by: Richard Henderson <[email protected]>

target/ppc: Use env_cpu, env_archcpu

Cleanup in the boilerplate that each target must define.
Replace ppc_env_get_cpu with env_archcpu.  The combination
CPU(ppc_env_get_cpu) should have used ENV_GET_CPU to begin;
use env_cpu now.

Reviewed-by: Alistair Francis <[email protected]>
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Richard Henderson <[email protected]>

target/openrisc: Use env_cpu, env_archcpu

Cleanup in the boilerplate that each target must define.
Replace openrisc_env_get_cpu with env_archcpu.  The combination
CPU(openrisc_env_get_cpu) should have used ENV_GET_CPU to begin;
use env_cpu now.

Reviewed-by: Alistair Francis <[email protected]>
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Richard Henderson <[email protected]>

target/nios2: Use env_cpu, env_archcpu

Cleanup in the boilerplate that each target must define.
Replace nios2_env_get_cpu with env_archcpu.  The combination
CPU(nios2_env_get_cpu) should have used ENV_GET_CPU to begin;
use env_cpu now.

Reviewed-by: Alistair Francis <[email protected]>
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Richard Henderson <[email protected]>

target/moxie: Use env_cpu, env_archcpu

Cleanup in the boilerplate that each target must define.
Replace moxie_env_get_cpu with env_archcpu.  The combination
CPU(moxie_env_get_cpu) should have used ENV_GET_CPU to begin;
use env_cpu now.

Reviewed-by: Alistair Francis <[email protected]>
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Richard Henderson <[email protected]>

target/mips: Use env_cpu, env_archcpu

Cleanup in the boilerplate that each target must define.
Replace mips_env_get_cpu with env_archcpu.  The combination
CPU(mips_env_get_cpu) should have used ENV_GET_CPU to begin;
use env_cpu now.

Reviewed-by: Philippe Mathieu-Daudé <[email protected]>
Signed-off-by: Richard Henderson <[email protected]>

target/microblaze: Use env_cpu, env_archcpu

Cleanup in the boilerplate that each target must define.
Replace mb_env_get_cpu with env_archcpu.  The combination
CPU(mb_env_get_cpu) should have used ENV_GET_CPU to begin;
use env_cpu now.

Move cpu_mmu_index below the include of "exec/cpu-all.h",
so that the definition of env_archcpu is available.

Reviewed-by: Alistair Francis <[email protected]>
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Richard Henderson <[email protected]>

target/m68k: Use env_cpu

Cleanup in the boilerplate that each target must define.
The combination CPU(m68k_env_get_cpu) should have used
ENV_GET_CPU to begin; use env_cpu now.

Acked-by: Laurent Vivier <[email protected]>
Reviewed-by: Alistair Francis <[email protected]>
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Richard Henderson <[email protected]>

target/lm32: Use env_cpu, env_archcpu

Cleanup in the boilerplate that each target must define.
Replace lm32_env_get_cpu with env_archcpu.  The combination
CPU(lm32_env_get_cpu) should have used ENV_GET_CPU to begin;
use env_cpu now.

Reviewed-by: Alistair Francis <[email protected]>
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Richard Henderson <[email protected]>

target/i386: Use env_cpu, env_archcpu

Cleanup in the boilerplate that each target must define.
Replace x86_env_get_cpu with env_archcpu.  The combination
CPU(x86_env_get_cpu) should have used ENV_GET_CPU to begin;
use env_cpu now.

Reviewed-by: Alistair Francis <[email protected]>
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Richard Henderson <[email protected]>

target/hppa: Use env_cpu, env_archcpu

Cleanup in the boilerplate that each target must define.
Replace hppa_env_get_cpu with env_archcpu.  The combination
CPU(hppa_env_get_cpu) should have used ENV_GET_CPU to begin;
use env_cpu now.

Reviewed-by: Alistair Francis <[email protected]>
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Richard Henderson <[email protected]>

target/cris: Use env_cpu, env_archcpu

Cleanup in the boilerplate that each target must define.
Replace cris_env_get_cpu with env_archcpu.  The combination
CPU(cris_env_get_cpu) should have used ENV_GET_CPU to begin;
use env_cpu now.

Reviewed-by: Alistair Francis <[email protected]>
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Richard Henderson <[email protected]>

target/cris: Reindent op_helper.c

Fix all of the coding style errors in this file at once.

Reviewed-by: Alistair Francis <[email protected]>
Reviewed-by: Philippe Mathieu-Daudé <[email protected]>
Signed-off-by: Richard Henderson <[email protected]>

target/cris: Reindent mmu.c

Fix all of the coding style errors in this file at once.

Reviewed-by: Alistair Francis <[email protected]>
Signed-off-by: Richard Henderson <[email protected]>

target/arm: Use env_cpu, env_archcpu

Cleanup in the boilerplate that each target must define.
Replace arm_env_get_cpu with env_archcpu.  The combination
CPU(arm_env_get_cpu) should have used ENV_GET_CPU to begin;
use env_cpu now.

Reviewed-by: Alistair Francis <[email protected]>
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Richard Henderson <[email protected]>

target/alpha: Use env_cpu, env_archcpu

Cleanup in the boilerplate that each target must define.
Replace alpha_env_get_cpu with env_archcpu.  The combination
CPU(alpha_env_get_cpu) should have used ENV_GET_CPU to begin;
use env_cpu now.

Reviewed-by: Alistair Francis <[email protected]>
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Richard Henderson <[email protected]>

cpu: Introduce env_archcpu

This will replace foo_env_get_cpu with a generic definition.
No changes to the target specific code so far.

Reviewed-by: Alistair Francis <[email protected]>
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Richard Henderson <[email protected]>

cpu: Replace ENV_GET_CPU with env_cpu

Now that we have both ArchCPU and CPUArchState, we can define
this generically instead of via macro in each target's cpu.h.

Reviewed-by: Peter Maydell <[email protected]>
Acked-by: Alistair Francis <[email protected]>
Signed-off-by: Richard Henderson <[email protected]>

cpu: Define ArchCPU

For all targets, do this just before including exec/cpu-all.h.

Reviewed-by: Peter Maydell <[email protected]>
Acked-by: Alistair Francis <[email protected]>
Signed-off-by: Richard Henderson <[email protected]>

cpu: Define CPUArchState with typedef

For all targets, do this just before including exec/cpu-all.h.

Reviewed-by: Peter Maydell <[email protected]>
Acked-by: Alistair Francis <[email protected]>
Signed-off-by: Richard Henderson <[email protected]>

tcg: Create struct CPUTLB

Move all softmmu tlb data into this structure.  Arrange the
members so that we are able to place mask+table together and
at a smaller absolute offset from ENV.

Reviewed-by: Peter Maydell <[email protected]>
Acked-by: Alistair Francis <[email protected]>
Signed-off-by: Richard Henderson <[email protected]>

tcg: Split out target/arch/cpu-param.h

For all targets, into this new file move TARGET_LONG_BITS,
TARGET_PAGE_BITS, TARGET_PHYS_ADDR_SPACE_BITS,
TARGET_VIRT_ADDR_SPACE_BITS, and NB_MMU_MODES.

Include this new file from exec/cpu-defs.h.

This now removes the somewhat odd requirement that target/arch/cpu.h
defines TARGET_LONG_BITS before including exec/cpu-defs.h, so push the
bulk of the includes within target/arch/cpu.h to the top.

Reviewed-by: Peter Maydell <[email protected]>
Acked-by: Alistair Francis <[email protected]>
Signed-off-by: Richard Henderson <[email protected]>

tcg: Fold CPUTLBWindow into CPUTLBDesc

Both structures are allocated once per mmu_idx.
There is no reason for them to be separate.

Reviewed-by: Alistair Francis <[email protected]>
Reviewed-by: Alex Bennée <[email protected]>
Signed-off-by: Richard Henderson <[email protected]>

Merge remote-tracking branch 'remotes/kraxel/tags/usb-20190607-pull-request' into staging

usb-mtp: refactor the flow of usb_mtp_write_data

# gpg: Signature made Fri 07 Jun 2019 17:56:31 BST
# gpg:                using RSA key 4CB6D8EED3E87138
# gpg: Good signature from "Gerd Hoffmann (work) <[email protected]>" [full]
# gpg:                 aka "Gerd Hoffmann <[email protected]>" [full]
# gpg:                 aka "Gerd Hoffmann (private) <[email protected]>" [full]
# Primary key fingerprint: A032 8CFF B93A 17A7 9901  FE7D 4CB6 D8EE D3E8 7138

* remotes/kraxel/tags/usb-20190607-pull-request:
  usb-mtp: refactor the flow of usb_mtp_write_data

Signed-off-by: Peter Maydell <[email protected]>

Merge remote-tracking branch 'remotes/ehabkost/tags/machine-next-pull-request' into staging

Machine Core queue, 2019-06-07

* Improve CPU hotplug error message
  (Laurent Vivier)
* Remove unused AccelClass::opt_name field
  (Wainer dos Santos Moschetta)

# gpg: Signature made Fri 07 Jun 2019 19:31:28 BST
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# gpg: Good signature from "Eduardo Habkost <[email protected]>" [full]
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* remotes/ehabkost/tags/machine-next-pull-request:
  accel: Remove unused AccelClass::opt_name attribute
  numa: improve cpu hotplug error message with a wrong node-id

Signed-off-by: Peter Maydell <[email protected]>

accel: Remove unused AccelClass::opt_name attribute

The AccelType type was converted to AccelClass QOM
object on b14a0b7469f, and the original data type had
a field to store the option name which in turn was
used to search an accelerator. The lookup method
(accel_find) changed too, making the option field
unnecessary but it became AccelClass::opt_name despite
that. Therefore, and given that none accelerator
implementation sets AccelClass::opt_name, let's
remove this attribute.

Signed-off-by: Wainer dos Santos Moschetta <[email protected]>
Message-Id: <20190531165334[email protected]>
Signed-off-by: Eduardo Habkost <[email protected]>

numa: improve cpu hotplug error message with a wrong node-id

On pseries, core-ids are strongly binded to a node-id by the command
line option. If an user tries to add a CPU to the wrong node, he has
an error but it is not really helpful:

  qemu-system-ppc64 ... -smp 1,maxcpus=64,cores=1,threads=1,sockets=1 \
                        -numa node,nodeid=0 -numa node,nodeid=1 ...

  (qemu) device_add power9_v2.0-spapr-cpu-core,core-id=30,node-id=1
  Error: node-id=1 must match numa node specified with -numa option

This patch improves this error message by giving to the user the good
node-id to use with the core-id he's providing

  Error: invalid node-id, must be 0

Signed-off-by: Laurent Vivier <[email protected]>
Message-Id: <20190529160747[email protected]>
Reviewed-by: Igor Mammedov <[email protected]>
Signed-off-by: Eduardo Habkost <[email protected]>

usb-mtp: refactor the flow of usb_mtp_write_data

There's no functional change but the flow is (hopefully)
more consistent for both file and folder object types.

Signed-off-by: Bandan Das <[email protected]>
Message-Id: <20190401211712[email protected]>
Signed-off-by: Gerd Hoffmann <[email protected]>

Merge remote-tracking branch 'remotes/cohuck/tags/s390x-20190607-2' into staging

s390x updates:
- tcg: finalize implementation for the vector facility and
  add it to the 'qemu' cpu model
- linux-user: properly generate ELF_HWCAP

# gpg: Signature made Fri 07 Jun 2019 15:14:42 BST
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# gpg:                 aka "Cornelia Huck <[email protected]>" [full]
# gpg:                 aka "Cornelia Huck <[email protected]>" [unknown]
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# Primary key fingerprint: C3D0 D66D C362 4FF6 A8C0  18CE DECF 6B93 C6F0 2FAF

* remotes/cohuck/tags/s390x-20190607-2: (34 commits)
  linux-user: elf: ELF_HWCAP for s390x
  s390x/tcg: Use tcg_gen_gvec_bitsel for VECTOR SELECT
  s390x: Bump the "qemu" CPU model up to a stripped-down z13
  s390x/tcg: We support the Vector Facility
  s390x/tcg: Allow linux-user to use vector instructions
  s390x/tcg: Implement VECTOR FP TEST DATA CLASS IMMEDIATE
  s390x/tcg: Implement VECTOR FP SUBTRACT
  s390x/tcg: Implement VECTOR FP SQUARE ROOT
  s390x/tcg: Implement VECTOR FP PERFORM SIGN OPERATION
  s390x/tcg: Implement VECTOR FP MULTIPLY AND (ADD|SUBTRACT)
  s390x/tcg: Implement VECTOR FP MULTIPLY
  s390x/tcg: Implement VECTOR LOAD ROUNDED
  s390x/tcg: Implement VECTOR LOAD LENGTHENED
  s390x/tcg: Implement VECTOR LOAD FP INTEGER
  s390x/tcg: Implement VECTOR FP DIVIDE
  s390x/tcg: Implement VECTOR FP CONVERT TO LOGICAL 64-BIT
  s390x/tcg: Implement VECTOR FP CONVERT TO FIXED 64-BIT
  s390x/tcg: Implement VECTOR FP CONVERT FROM LOGICAL 64-BIT
  s390x/tcg: Implement VECTOR FP CONVERT FROM FIXED 64-BIT
  s390x/tcg: Implement VECTOR FP COMPARE (EQUAL|HIGH|HIGH OR EQUAL)
  ...

Signed-off-by: Peter Maydell <[email protected]>

Merge tag 's390x-tcg-2019-06-07' into s390-next-staging

Finalize implementation of the "Vector Facility" for s390x TCG. Add it
to the QEMU CPU model, so it is enabled as default.
Also:
- One fix (and one workaround) for the STFLE instruction
- Fix the alignment of vector registers (and change the data type)
- Properly generate ELF_HWCAP for s390x for linux-user
- Use a gvec helper for VECTOR SELECT

# gpg: Signature made Fri 07 Jun 2019 02:58:01 PM CEST
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# gpg:                issuer "[email protected]"
# gpg: Good signature from "David Hildenbrand <[email protected]>" [full]
# gpg:                 aka "David Hildenbrand <[email protected]>" [full]

* tag 's390x-tcg-2019-06-07': (33 commits)
  linux-user: elf: ELF_HWCAP for s390x
  s390x/tcg: Use tcg_gen_gvec_bitsel for VECTOR SELECT
  s390x: Bump the "qemu" CPU model up to a stripped-down z13
  s390x/tcg: We support the Vector Facility
  s390x/tcg: Allow linux-user to use vector instructions
  s390x/tcg: Implement VECTOR FP TEST DATA CLASS IMMEDIATE
  s390x/tcg: Implement VECTOR FP SUBTRACT
  s390x/tcg: Implement VECTOR FP SQUARE ROOT
  s390x/tcg: Implement VECTOR FP PERFORM SIGN OPERATION
  s390x/tcg: Implement VECTOR FP MULTIPLY AND (ADD|SUBTRACT)
  s390x/tcg: Implement VECTOR FP MULTIPLY
  s390x/tcg: Implement VECTOR LOAD ROUNDED
  s390x/tcg: Implement VECTOR LOAD LENGTHENED
  s390x/tcg: Implement VECTOR LOAD FP INTEGER
  s390x/tcg: Implement VECTOR FP DIVIDE
  s390x/tcg: Implement VECTOR FP CONVERT TO LOGICAL 64-BIT
  s390x/tcg: Implement VECTOR FP CONVERT TO FIXED 64-BIT
  s390x/tcg: Implement VECTOR FP CONVERT FROM LOGICAL 64-BIT
  s390x/tcg: Implement VECTOR FP CONVERT FROM FIXED 64-BIT
  s390x/tcg: Implement VECTOR FP COMPARE (EQUAL|HIGH|HIGH OR EQUAL)
  ...

Signed-off-by: Cornelia Huck <[email protected]>

Merge remote-tracking branch 'remotes/kraxel/tags/ui-20190607-pull-request' into staging

curses: 32bit build fix.
egl: dmabuf modifier support.

# gpg: Signature made Fri 07 Jun 2019 14:18:41 BST
# gpg:                using RSA key 4CB6D8EED3E87138
# gpg: Good signature from "Gerd Hoffmann (work) <[email protected]>" [full]
# gpg:                 aka "Gerd Hoffmann <[email protected]>" [full]
# gpg:                 aka "Gerd Hoffmann (private) <[email protected]>" [full]
# Primary key fingerprint: A032 8CFF B93A 17A7 9901  FE7D 4CB6 D8EE D3E8 7138

* remotes/kraxel/tags/ui-20190607-pull-request:
  egl-helpers: add modifier support to egl_dmabuf_import_texture()
  egl-helpers: add modifier support to egl_get_fd_for_texture().
  vfio/display: set dmabuf modifier field
  console: add dmabuf modifier field.
  ui/curses: Fix build with -m32

Signed-off-by: Peter Maydell <[email protected]>

linux-user: elf: ELF_HWCAP for s390x

Let's add all HWCAPs that we can support under TCG right now, when the
respective CPU facilities are enabled.

Cc: Riku Voipio <[email protected]>
Cc: Laurent Vivier <[email protected]>
Cc: Cornelia Huck <[email protected]>
Cc: Laurent Vivier <[email protected]>
Cc: Richard Henderson <[email protected]>
Acked-by: Laurent Vivier <[email protected]>
Reviewed-by: Richard Henderson <[email protected]>
Signed-off-by: David Hildenbrand <[email protected]>

s390x/tcg: Use tcg_gen_gvec_bitsel for VECTOR SELECT

This replaces the target-specific implementations for VSEL.

Signed-off-by: Richard Henderson <[email protected]>
Signed-off-by: David Hildenbrand <[email protected]>

s390x: Bump the "qemu" CPU model up to a stripped-down z13

We don't care about the other two missing base features:
- S390_FEAT_DFP_PACKED_CONVERSION
- S390_FEAT_GROUP_GEN13_PTFF

Reviewed-by: Richard Henderson <[email protected]>
Signed-off-by: David Hildenbrand <[email protected]>

s390x/tcg: We support the Vector Facility

Let's add it to the max model, so we can enable it.

Reviewed-by: Richard Henderson <[email protected]>
Signed-off-by: David Hildenbrand <[email protected]>

s390x/tcg: Allow linux-user to use vector instructions

Once we unlock S390_FEAT_VECTOR for TCG, we want linux-user to be
able to make use of it.

Reviewed-by: Richard Henderson <[email protected]>
Reviewed-by: Laurent Vivier <[email protected]>
Signed-off-by: David Hildenbrand <[email protected]>

s390x/tcg: Implement VECTOR FP TEST DATA CLASS IMMEDIATE

We can reuse float64_dcmask().

Reviewed-by: Richard Henderson <[email protected]>
Signed-off-by: David Hildenbrand <[email protected]>

s390x/tcg: Implement VECTOR FP SUBTRACT

Similar to VECTOR FP ADD.

Reviewed-by: Richard Henderson <[email protected]>
Signed-off-by: David Hildenbrand <[email protected]>

s390x/tcg: Implement VECTOR FP SQUARE ROOT

Simulate XxC=0 and ERM=0 (current mode), so we can use the existing
helper function.

Reviewed-by: Richard Henderson <[email protected]>
Signed-off-by: David Hildenbrand <[email protected]>

s390x/tcg: Implement VECTOR FP PERFORM SIGN OPERATION

The only FP instruction we can implement without an helper.

Reviewed-by: Richard Henderson <[email protected]>
Signed-off-by: David Hildenbrand <[email protected]>

s390x/tcg: Implement VECTOR FP MULTIPLY AND (ADD|SUBTRACT)

Reviewed-by: Richard Henderson <[email protected]>
Signed-off-by: David Hildenbrand <[email protected]>

s390x/tcg: Implement VECTOR FP MULTIPLY

Very similar to VECTOR FP DIVIDE.

Reviewed-by: Richard Henderson <[email protected]>
Signed-off-by: David Hildenbrand <[email protected]>

s390x/tcg: Implement VECTOR LOAD ROUNDED

We can reuse some of the infrastructure introduced for
VECTOR FP CONVERT FROM FIXED 64-BIT and friends.

Reviewed-by: Richard Henderson <[email protected]>
Signed-off-by: David Hildenbrand <[email protected]>

s390x/tcg: Implement VECTOR LOAD LENGTHENED

Take care of reading/indicating the 32-bit elements.

Reviewed-by: Richard Henderson <[email protected]>
Signed-off-by: David Hildenbrand <[email protected]>

s390x/tcg: Implement VECTOR LOAD FP INTEGER

We can reuse most of the infrastructure introduced for
VECTOR FP CONVERT FROM FIXED 64-BIT and friends.

Reviewed-by: Richard Henderson <[email protected]>
Signed-off-by: David Hildenbrand <[email protected]>

s390x/tcg: Implement VECTOR FP DIVIDE

We can reuse most of the infrastructure added for VECTOR FP ADD.

Reviewed-by: Richard Henderson <[email protected]>
Signed-off-by: David Hildenbrand <[email protected]>

s390x/tcg: Implement VECTOR FP CONVERT TO LOGICAL 64-BIT

Reviewed-by: Richard Henderson <[email protected]>
Signed-off-by: David Hildenbrand <[email protected]>

s390x/tcg: Implement VECTOR FP CONVERT TO FIXED 64-BIT

Reviewed-by: Richard Henderson <[email protected]>
Signed-off-by: David Hildenbrand <[email protected]>

s390x/tcg: Implement VECTOR FP CONVERT FROM LOGICAL 64-BIT

Reviewed-by: Richard Henderson <[email protected]>
Signed-off-by: David Hildenbrand <[email protected]>

s390x/tcg: Implement VECTOR FP CONVERT FROM FIXED 64-BIT

1. We'll reuse op_vcdg() for similar instructions later, prepare for
   that.
2. We'll reuse vop64_2() later for other instructions.

We have to mangle the erm (effective rounding mode) and the m4 into
the simd_data(), and properly unmangle them again.

Make sure to restore the erm before triggering an exception.

Reviewed-by: Richard Henderson <[email protected]>
Signed-off-by: David Hildenbrand <[email protected]>

s390x/tcg: Implement VECTOR FP COMPARE (EQUAL|HIGH|HIGH OR EQUAL)

Provide for all three instructions all four combinations of cc bit and
s bit.

Reviewed-by: Richard Henderson <[email protected]>
Signed-off-by: David Hildenbrand <[email protected]>

s390x/tcg: Implement VECTOR FP COMPARE (AND SIGNAL) SCALAR

As far as I can see, there is only a tiny difference.

Reviewed-by: Richard Henderson <[email protected]>
Signed-off-by: David Hildenbrand <[email protected]>

s390x/tcg: Implement VECTOR FP ADD

1. We'll reuse op_vfa() for similar instructions later, prepare for
   that.
2. We'll reuse vop64_3() for other instructions later.
3. Take care of modifying the vector register only if no trap happened.
 - on traps, flags are not updated and no elements are modified
 - traps don't modify the fpc flags
 - without traps, all exceptions of all elements are merged
4. We'll reuse check_ieee_exc() later when we need the XxC flag.

We have to check for exceptions after processing each element.
Provide separate handlers for single/all element processing. We'll do
the same for all applicable FP instructions.

Reviewed-by: Richard Henderson <[email protected]>
Signed-off-by: David Hildenbrand <[email protected]>

s390x/tcg: Export float_comp_to_cc() and float(32|64|128)_dcmask()

Vector floating-point instructions will require these functions, so
allow to use them from other files.

Reviewed-by: Richard Henderson <[email protected]>
Signed-off-by: David Hildenbrand <[email protected]>

s390x/tcg: Introduce tcg_s390_vector_exception()

Handling is similar to data exceptions, however we can always store the
VXC into the lowore and the FPC:

z14 PoP, 6-20, "Vector-Exception Code"
    When a vector-processing exception causes a pro-
    gram interruption, a vector-exception code (VXC) is
    stored at location 147, and zeros are stored at loca-
    tions 144-146. The VXC is also placed in the DXC
    field of the floating-point-control (FPC) register if bit
    45 of control register 0 is one. When bit 45 of control
    register 0 is zero and bit 46 of control register 0 is
    one, the DXC field of the FPC register and the con-
    tents of storage at location 147 are unpredictable.

Signed-off-by: David Hildenbrand <[email protected]>

s390x/tcg: Store only the necessary amount of doublewords for STFLE

The PoP (z14, 7-382) says:
    Doublewords to the right of the doubleword in which the
    highest-numbered facility bit is assigned for a model
    may or may not be stored.

However, stack protection in certain binaries can't deal with that.
"gzip" example code:

f1b4:       a7 08 00 03             lhi     %r0,3
f1b8:       b2 b0 f0 a0             stfle   160(%r15)
f1bc:       e3 20 f0 b2 00 90       llgc    %r2,178(%r15)
f1c2:       c0 2b 00 00 00 01       nilf    %r2,1
f1c8:       b2 4f 00 10             ear     %r1,%a0
f1cc:       b9 14 00 22             lgfr    %r2,%r2
f1d0:       eb 11 00 20 00 0d       sllg    %r1,%r1,32
f1d6:       b2 4f 00 11             ear     %r1,%a1
f1da:       d5 07 f0 b8 10 28       clc     184(8,%r15),40(%r1)
f1e0:       a7 74 00 06             jne     f1ec <file_read@@Base+0x1bc>
f1e4:       eb ef f1 30 00 04       lmg     %r14,%r15,304(%r15)
f1ea:       07 fe                   br      %r14
f1ec:       c0 e5 ff ff 9d 6e       brasl   %r14,2cc8 <__stack_chk_fail@plt>

In QEMU, we currently have:
    max_bytes = 24
the code asks for (3 + 1) doublewords == 32 bytes.

If we write 32 bytes instead of only 24, and return "2 + 1" doublewords
("one less than the number of doulewords needed to contain all of the
 facility bits"), the example code detects a stack corruption.

In my opinion, the code is wrong. However, it seems to work fine on
real machines. So let's limit storing to the minimum of the requested
and the maximum doublewords.

Cc: Stefan Liebler <[email protected]>
Cc: Andreas Krebbel <[email protected]>
Reviewed-by: Richard Henderson <[email protected]>
Signed-off-by: David Hildenbrand <[email protected]>

s390x/tcg: Fix max_byte detection for stfle

used_stfl_bytes is 0, before initialized via prepare_stfl() on the
first invocation. We have to move the calculation of max_bytes after
prepare_stfl().

Reviewed-by: Richard Henderson <[email protected]>
Signed-off-by: David Hildenbrand <[email protected]>

s390x: Use uint64_t for vector registers

CPU_DoubleU is primarily used to reinterpret between integer and floats.
We don't really need this functionality. So let's just keep it simple
and use an uint64_t.

Reviewed-by: Richard Henderson <[email protected]>
Signed-off-by: David Hildenbrand <[email protected]>

s390x: Align vector registers to 16 bytes

11e2bfef7990 ("tcg/i386: Use MOVDQA for TCG_TYPE_V128 load/store")
revealed that the vregs are not aligned to 16 bytes. Align them to
16 bytes, to avoid segfault'ing on x86.

Reviewed-by: Richard Henderson <[email protected]>
Signed-off-by: David Hildenbrand <[email protected]>

s390x/tcg: Implement VECTOR STRING RANGE COMPARE

Unfortunately, there is no easy way to avoid looping over all elements
in v2. Provide specialized variants for !cc,!rt/!cc,rt/cc,!rt/cc,rt and
all element types. Especially for different values of rt, the compiler
might be able to optimize the code a lot.

Add s390_vec_write_element().

Reviewed-by: Richard Henderson <[email protected]>
Signed-off-by: David Hildenbrand <[email protected]>

s390x/tcg: Implement VECTOR ISOLATE STRING

Logic mostly courtesy of Richard H.

Reviewed-by: Richard Henderson <[email protected]>
Signed-off-by: David Hildenbrand <[email protected]>

s390x/tcg: Implement VECTOR FIND ELEMENT NOT EQUAL

Similar to VECTOR FIND ELEMENT EQUAL. Core logic courtesy of Richard H.

Add s390_vec_read_element() that can deal with element sizes.

Reviewed-by: Richard Henderson <[email protected]>
Signed-off-by: David Hildenbrand <[email protected]>

s390x/tcg: Implement VECTOR FIND ELEMENT EQUAL

Core logic courtesy of Richard H.

Reviewed-by: Richard Henderson <[email protected]>
Signed-off-by: David Hildenbrand <[email protected]>

s390x/tcg: Implement VECTOR FIND ANY ELEMENT EQUAL

Complicated stuff. Provide two different helpers for CC an !CC handling.
We might want to add more helpers later.

zero_search() and match_index() are courtesy of Richard H.

Reviewed-by: Richard Henderson <[email protected]>
Signed-off-by: David Hildenbrand <[email protected]>

MAINTAINERS: cover tests/migration/s390x/

The generic s390 section looks like the best resting place.

Message-Id: <20190529091243[email protected]>
Signed-off-by: Cornelia Huck <[email protected]>

Merge remote-tracking branch 'remotes/amarkovic/tags/mips-queue-jun-7-2019' into staging

MIPS Queue for June 7th, 2019

# gpg: Signature made Fri 07 Jun 2019 10:59:15 BST
# gpg:                using RSA key D4972A8967F75A65
# gpg: Good signature from "Aleksandar Markovic <[email protected]>" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 8526 FBF1 5DA3 811F 4A01  DD75 D497 2A89 67F7 5A65

* remotes/amarkovic/tags/mips-queue-jun-7-2019:
  tests/tcg: target/mips: Add README for MSA tests
  tests/tcg: target/mips: Add tests for MSA FP max/min instructions
  tests/tcg: target/mips: Add utility function reset_msa_registers()
  tests/tcg: target/mips: Move four tests to a better location
  tests/tcg: target/mips: Add tests for MSA shift instructions
  tests/tcg: target/mips: Amend and rearrange MSA wrappers
  target/mips: Unroll loops in helpers for MSA logic instructions
  target/mips: Outline places for future MSA helpers
  target/mips: Fix block-comment-related issues in msa_helper.c
  target/mips: Fix space-related format issues in msa_helper.c

Signed-off-by: Peter Maydell <[email protected]>

tests/tcg: target/mips: Add README for MSA tests

Add README for MSA tests. This is just to explain how to run tests even
without Makefile. Makefile will be provided later on.

Signed-off-by: Aleksandar Markovic <[email protected]>
Reviewed-by: Aleksandar Rikalo <[email protected]>
Message-Id: <1559838440[email protected]>

tests/tcg: target/mips: Add tests for MSA FP max/min instructions

Add tests for MSA FP max/min instructions. This includes following
instructions:

  * FMAX.W - float maximum (words)
  * FMAX.D - float maximum (doublewords)
  * FMAX_A.W - float maximum absolute (words)
  * FMAX_A.D - float maximum absolute (doublewords)
  * FMIN.W - float minimum (words)
  * FMIN.D - float minimum (doublewords)
  * FMIN_A.W - float minimum absolute (words)
  * FMIN_A.D - float minimum absolute (doublewords)

Signed-off-by: Aleksandar Markovic <[email protected]>
Reviewed-by: Aleksandar Rikalo <[email protected]>
Message-Id: <1559838440[email protected]>

tests/tcg: target/mips: Add utility function reset_msa_registers()

Add function reset_msa_registers() and utilize it in each MSA test.
This is needed to ensure independency of test results on the state of
MSA registers before test execution. This also allows for correction
of tests for VSHF* instructions, that are now independent on the
previous state of MSA registers.

Signed-off-by: Aleksandar Markovic <[email protected]>
Reviewed-by: Aleksandar Rikalo <[email protected]>
Message-Id: <1559838440[email protected]>

tests/tcg: target/mips: Move four tests to a better location

Move tests for <MUL|MULR>_Q.<H|B> from "integer multiply" directory
to "fixed-point multiply" directory, since they do not operate on
integers, but on fixed point numbers.

Signed-off-by: Aleksandar Markovic <[email protected]>
Reviewed-by: Aleksandar Rikalo <[email protected]>
Message-Id: <1559838440[email protected]>

tests/tcg: target/mips: Add tests for MSA shift instructions

Add tests for MSA shift instructions. This includes following
instructions:

  * SLL.B - shift left logical (bytes)
  * SLL.H - shift left logical (halfwords)
  * SLL.W - shift left logical (words)
  * SLL.D - shift left logical (doublewords)
  * SRA.B - shift right arithmetic (bytes)
  * SRA.H - shift right arithmetic (halfwords)
  * SRA.W - shift right arithmetic (words)
  * SRA.D - shift right arithmetic (doublewords)
  * SRAR.B - shift right arithmetic rounded (bytes)
  * SRAR.H - shift right arithmetic rounded (halfwords)
  * SRAR.W - shift right arithmetic rounded (words)
  * SRAR.D - shift right arithmetic rounded (doublewords)
  * SRL.B - shift right logical (bytes)
  * SRL.H - shift right logical (halfwords)
  * SRL.W - shift right logical (words)
  * SRL.D - shift right logical (doublewords)
  * SRLR.B - shift right logical rounded (bytes)
  * SRLR.H - shift right logical rounded (halfwords)
  * SRLR.W - shift right logical rounded (words)
  * SRLR.D - shift right logical rounded (doublewords)

Signed-off-by: Aleksandar Markovic <[email protected]>
Reviewed-by: Aleksandar Rikalo <[email protected]>
Message-Id: <1559838440[email protected]>

tests/tcg: target/mips: Amend and rearrange MSA wrappers

Amend and rearrange MSA wrappers to follow the same organization as
in MSA tests.

Signed-off-by: Aleksandar Markovic <[email protected]>
Reviewed-by: Aleksandar Rikalo <[email protected]>
Message-Id: <1559838440[email protected]>

target/mips: Unroll loops in helpers for MSA logic instructions

Unroll loops in helpers for MSA logic instructions for better
performance.

Signed-off-by: Aleksandar Markovic <[email protected]>
Reviewed-by: Aleksandar Rikalo <[email protected]>
Message-Id: <1559838440[email protected]>

target/mips: Outline places for future MSA helpers

Outline places for future MSA helpers to follow the same organization
as in MSA tests.

Signed-off-by: Aleksandar Markovic <[email protected]>
Reviewed-by: Aleksandar Rikalo <[email protected]>
Message-Id: <1559838440[email protected]>

egl-helpers: add modifier support to egl_dmabuf_import_texture()

Check and use QemuDmaBuf->modifier in egl_dmabuf_import_texture()
for dmabuf imports.

Signed-off-by: Gerd Hoffmann <[email protected]>
Message-id: 20190529072144[email protected]

egl-helpers: add modifier support to egl_get_fd_for_texture().

Add modifier parameter to egl_get_fd_for_texture(), to return the used
modifier on dmabuf exports.

Signed-off-by: Gerd Hoffmann <[email protected]>
Message-id: 20190529072144[email protected]

vfio/display: set dmabuf modifier field

Fill the new QemuDmaBuf->modifier field properly from plane info.

Signed-off-by: Gerd Hoffmann <[email protected]>
Reviewed-by: Marc-André Lureau <[email protected]>
Acked-by: Alex Williamson <[email protected]>
Message-id: 20190529072144[email protected]

console: add dmabuf modifier field.

dmabufs can have a format modifier (DRM_FORMAT_MOD_*) which is used for
tiled layouts for example.  Add a field to QemuDmaBuf so we can carry
around that information.

Signed-off-by: Gerd Hoffmann <[email protected]>
Reviewed-by: Marc-André Lureau <[email protected]>
Message-id: 20190529072144[email protected]

ui/curses: Fix build with -m32

wchar_t may resolve to be an unsigned long on 32-bit architectures.
Using the %x conversion specifier will then give a compiler warning:

ui/curses.c: In function ‘get_ucs’:
ui/curses.c:492:49: error: format ‘%x’ expects argument of type ‘unsigned int’, but argument 3 has type ‘wchar_t’ {aka ‘long int’} [-Werror=format=]
  492 |         fprintf(stderr, "Could not convert 0x%04x "
      |                                              ~~~^
      |                                                 |
      |                                                 unsigned int
      |                                              %04lx
  493 |                         "from wchar_t to a multibyte character: %s\n",
  494 |                         wch, strerror(errno));
      |                         ~~~
      |                         |
      |                         wchar_t {aka long int}
ui/curses.c:504:49: error: format ‘%x’ expects argument of type ‘unsigned int’, but argument 3 has type ‘wchar_t’ {aka ‘long int’} [-Werror=format=]
  504 |         fprintf(stderr, "Could not convert 0x%04x "
      |                                              ~~~^
      |                                                 |
      |                                                 unsigned int
      |                                              %04lx
  505 |                         "from a multibyte character to UCS-2 : %s\n",
  506 |                         wch, strerror(errno));
      |                         ~~~
      |                         |
      |                         wchar_t {aka long int}

Fix this by casting the wchar_t value to an unsigned long and using %lx
as the conversion specifier.

Fixes: b7b664a4fe9a955338f2e11a0f7433b29c8cbad0
Signed-off-by: Max Reitz <[email protected]>
Reviewed-by: Samuel Thibault <[email protected]>
Message-id: 20190527142540[email protected]
Signed-off-by: Gerd Hoffmann <[email protected]>

target/mips: Fix block-comment-related issues in msa_helper.c

Fix block-comment-related issues reported by checkpatch for file
msa_helper.c.

Signed-off-by: Aleksandar Markovic <[email protected]>
Reviewed-by: Aleksandar Rikalo <[email protected]>
Message-Id: <1559838440[email protected]>

target/mips: Fix space-related format issues in msa_helper.c

Fix space-related format issues reported by checkpatch in file
msa_helper.c.

Signed-off-by: Aleksandar Markovic <[email protected]>
Reviewed-by: Aleksandar Rikalo <[email protected]>
Message-Id: <1559838440[email protected]>

Merge remote-tracking branch 'remotes/vivier2/tags/trivial-branch-pull-request' into staging

Trivial fixes 06/06/2019

# gpg: Signature made Thu 06 Jun 2019 12:05:50 BST
# gpg:                using RSA key CD2F75DDC8E3A4DC2E4F5173F30C38BD3F2FBE3C
# gpg:                issuer "[email protected]"
# gpg: Good signature from "Laurent Vivier <[email protected]>" [full]
# gpg:                 aka "Laurent Vivier <[email protected]>" [full]
# gpg:                 aka "Laurent Vivier (Red Hat) <[email protected]>" [full]
# Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F  5173 F30C 38BD 3F2F BE3C

* remotes/vivier2/tags/trivial-branch-pull-request:
  hw/watchdog/wdt_i6300esb: Use DEVICE() macro to access DeviceState.qdev
  hw/scsi: Use the QOM BUS() macro to access BusState.qbus
  hw/sd: Use the QOM BUS() macro to access BusState.qbus
  hw/audio/ac97: Use the QOM DEVICE() macro to access DeviceState.qdev
  hw/vfio/pci: Use the QOM DEVICE() macro to access DeviceState.qdev
  hw/usb-storage: Use the QOM DEVICE() macro to access DeviceState.qdev
  hw/isa: Use the QOM DEVICE() macro to access DeviceState.qdev
  hw/s390x/event-facility: Use the QOM BUS() macro to access BusState.qbus
  hw/pci-bridge: Use the QOM BUS() macro to access BusState.qbus
  hw/scsi/vmw_pvscsi: Use qbus_reset_all() directly
  docs/devel/build-system: Update an example
  test: Fix make target check-report.tap
  util: Adjust qemu_guest_getrandom_nofail for Coverity
  vhost: fix incorrect print type
  migration: fix a typo
  hw/rdma: Delete unused headers inclusion

Signed-off-by: Peter Maydell <[email protected]>

Merge remote-tracking branch 'remotes/mst/tags/for_upstream' into staging

virtio, pci, pc: cleanups, features

stricter rules for acpi tables: we now fail
on any difference that isn't whitelisted.

vhost-scsi migration.

some cleanups all over the place

Signed-off-by: Michael S. Tsirkin <[email protected]>
# gpg: Signature made Wed 05 Jun 2019 20:55:04 BST
# gpg:                using RSA key 281F0DB8D28D5469
# gpg: Good signature from "Michael S. Tsirkin <[email protected]>" [full]
# gpg:                 aka "Michael S. Tsirkin <[email protected]>" [full]
# Primary key fingerprint: 0270 606B 6F3C DF3D 0B17  0970 C350 3912 AFBE 8E67
#      Subkey fingerprint: 5D09 FD08 71C8 F85B 94CA  8A0D 281F 0DB8 D28D 5469

* remotes/mst/tags/for_upstream:
  bios-tables-test: ignore identical binaries
  tests: acpi: add simple arm/virt testcase
  tests: add expected ACPI tables for arm/virt board
  bios-tables-test: list all tables that differ
  vhost-scsi: Allow user to enable migration
  vhost-scsi: Add VMState descriptor
  vhost-scsi: The vhost backend should be stopped when the VM is not running
  bios-tables-test: add diff allowed list
  vhost: fix memory leak in vhost_user_scsi_realize
  vhost: fix incorrect print type
  vhost: remove the dead code
  docs: smbios: remove family=x from type2 entry description
  pci: Fold pci_get_bus_devfn() into its sole caller
  pci: Make is_bridge a bool
  pcie: Simplify pci_adjust_config_limit()
  acpi: pci: use build_append_foo() API to construct MCFG
  hw/acpi: Consolidate build_mcfg to pci.c

Signed-off-by: Peter Maydell <[email protected]>

Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into staging

* Fix pr-manager-helper (Markus)

# gpg: Signature made Wed 05 Jun 2019 15:15:34 BST
# gpg:                using RSA key BFFBD25F78C7AE83
# gpg: Good signature from "Paolo Bonzini <[email protected]>" [full]
# gpg:                 aka "Paolo Bonzini <[email protected]>" [full]
# Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4  E2F7 7E15 100C CD36 69B1
#      Subkey fingerprint: F133 3857 4B66 2389 866C  7682 BFFB D25F 78C7 AE83

* remotes/bonzini/tags/for-upstream:
  vl: Document why objects are delayed
  vl: Fix -drive / -blockdev persistent reservation management

Signed-off-by: Peter Maydell <[email protected]>

hw/watchdog/wdt_i6300esb: Use DEVICE() macro to access DeviceState.qdev

Rather than looking inside the definition of a DeviceState with
"s->qdev", use the QOM prefered style: "DEVICE(s)".

This patch was generated using the following Coccinelle script:

    // Use DEVICE() macros to access DeviceState.qdev
    @use_device_macro_to_access_qdev@
    expression obj;
    identifier dev;
    @@
    -&obj->dev.qdev
    +DEVICE(obj)

Suggested-by: Peter Maydell <[email protected]>
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Laurent Vivier <[email protected]>
Message-Id: <20190528164020[email protected]>
Signed-off-by: Laurent Vivier <[email protected]>

hw/scsi: Use the QOM BUS() macro to access BusState.qbus

Rather than looking inside the definition of a BusState with "s->bus.qbus",
use the QOM prefered style: "BUS(&s->bus)".

This patch was generated using the following Coccinelle script:

    // Use BUS() macros to access BusState.qbus
    @use_bus_macro_to_access_qbus@
    expression obj;
    identifier bus;
    @@
    -&obj->bus.qbus
    +BUS(&obj->bus)

Suggested-by: Peter Maydell <[email protected]>
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Laurent Vivier <[email protected]>
Message-Id: <20190528164020[email protected]>
Signed-off-by: Laurent Vivier <[email protected]>

Merge remote-tracking branch 'remotes/juanquintela/tags/migration-pull-request' into staging

Migration Pull request

# gpg: Signature made Wed 05 Jun 2019 12:52:06 BST
# gpg:                using RSA key 1899FF8EDEBF58CCEE034B82F487EF185872D723
# gpg: Good signature from "Juan Quintela <[email protected]>" [full]
# gpg:                 aka "Juan Quintela <[email protected]>" [full]
# Primary key fingerprint: 1899 FF8E DEBF 58CC EE03  4B82 F487 EF18 5872 D723

* remotes/juanquintela/tags/migration-pull-request:
  migratioin/ram: leave RAMBlock->bmap blank on allocating
  migration-test: Add a test for fd protocol
  migration: Fix fd protocol for incoming defer
  migration/ram.c: multifd_send_state->count is not really used
  migration/ram.c: MultiFDSendParams.sem_sync is not really used

Signed-off-by: Peter Maydell <[email protected]>

hw/sd: Use the QOM BUS() macro to access BusState.qbus

Rather than looking inside the definition of a BusState with "s->bus.qbus",
use the QOM prefered style: "BUS(&s->bus)".

This patch was generated using the following Coccinelle script:

    // Use BUS() macros to access BusState.qbus
    @use_bus_macro_to_access_qbus@
    expression obj;
    identifier bus;
    @@
    -&obj->bus.qbus
    +BUS(&obj->bus)

Suggested-by: Peter Maydell <[email protected]>
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Peter Maydell <[email protected]>
Message-Id: <20190528164020[email protected]>
Signed-off-by: Laurent Vivier <[email protected]>