]> Git Repo - qemu.git/history - target/riscv
target/riscv: rvb: single-bit instructions
[qemu.git] / target / riscv /
2021-06-07 Frank Changtarget/riscv: rvb: single-bit instructions
2021-06-07 Frank Changtarget/riscv: add gen_shifti() and gen_shiftiw() helper...
2021-06-07 Kito Chengtarget/riscv: rvb: sign-extend instructions
2021-06-07 Kito Chengtarget/riscv: rvb: min/max instructions
2021-06-07 Kito Chengtarget/riscv: rvb: pack two words into one register
2021-06-07 Kito Chengtarget/riscv: rvb: logic-with-negate
2021-06-07 Frank Changtarget/riscv: rvb: count bits set
2021-06-07 Kito Chengtarget/riscv: rvb: count leading/trailing zeros
2021-06-07 Kito Chengtarget/riscv: reformat @sh format encoding for B-extension
2021-06-07 LIU Zhiweitarget/riscv: Pass the same value to oprsz and maxsz.
2021-06-07 Alistair Francistarget/riscv/pmp: Add assert for ePMP operations
2021-06-07 Changbin Dutarget/riscv: Dump CSR mscratch/sscratch/satp
2021-06-07 Bin Mengtarget/riscv: Remove unnecessary riscv_*_names[] declar...
2021-06-07 Philippe Mathieu... target/riscv: Do not include 'pmp.h' in user emulation
2021-06-07 Jose Martinstarget/riscv: fix wfi exception behavior
2021-06-04 Peter MaydellMerge remote-tracking branch 'remotes/jasowang/tags...
2021-05-30 Peter MaydellMerge remote-tracking branch 'remotes/kraxel/tags/usb...
2021-05-30 Peter MaydellMerge remote-tracking branch 'remotes/kraxel/tags/vga...
2021-05-28 Peter MaydellMerge remote-tracking branch 'remotes/jasowang/tags...
2021-05-28 Peter MaydellMerge remote-tracking branch 'remotes/rth-gitlab/tags...
2021-05-26 Richard Hendersonhw/core: Constify TCGCPUOps
2021-05-26 Philippe Mathieu... cpu: Move CPUClass::get_phys_page_debug to SysemuCPUOps
2021-05-26 Philippe Mathieu... cpu: Move CPUClass::write_elf* to SysemuCPUOps
2021-05-26 Philippe Mathieu... cpu: Move CPUClass::vmsd to SysemuCPUOps
2021-05-26 Philippe Mathieu... cpu: Introduce SysemuCPUOps structure
2021-05-26 Philippe Mathieu... cpu: Rename CPUClass vmsd -> legacy_vmsd
2021-05-21 Peter MaydellMerge remote-tracking branch 'remotes/vsementsov/tags...
2021-05-21 Peter MaydellMerge remote-tracking branch 'remotes/ericb/tags/pull...
2021-05-20 Peter MaydellMerge remote-tracking branch 'remotes/bsdimp/tags/pull...
2021-05-16 Peter MaydellMerge remote-tracking branch 'remotes/mst/tags/for_upst...
2021-05-14 Peter MaydellMerge remote-tracking branch 'remotes/cminyard/tags...
2021-05-13 Peter MaydellMerge remote-tracking branch 'remotes/armbru/tags/pull...
2021-05-13 Peter MaydellMerge remote-tracking branch 'remotes/philmd/tags/pflas...
2021-05-12 Peter MaydellMerge remote-tracking branch 'remotes/alistair/tags...
2021-05-11 Alistair Francistarget/riscv: Fix the RV64H decode comment
2021-05-11 Alistair Francistarget/riscv: Consolidate RV32/64 16-bit instructions
2021-05-11 Alistair Francistarget/riscv: Consolidate RV32/64 32-bit instructions
2021-05-11 Alistair Francistarget/riscv: Remove an unused CASE_OP_32_64 macro
2021-05-11 Alistair Francistarget/riscv: Remove the unused HSTATUS_WPRI macro
2021-05-11 Alistair Francistarget/riscv: Remove the hardcoded SATP_MODE macro
2021-05-11 Alistair Francistarget/riscv: Remove the hardcoded MSTATUS_SD macro
2021-05-11 Alistair Francistarget/riscv: Remove the hardcoded HGATP_MODE macro
2021-05-11 Alistair Francistarget/riscv: Remove the hardcoded SSTATUS_SD macro
2021-05-11 Alistair Francistarget/riscv: Remove the hardcoded RVXLEN macro
2021-05-11 Emmanuel Blottarget/riscv: fix a typo with interrupt names
2021-05-11 Emmanuel Blottarget/riscv: fix exception index on instruction access...
2021-05-11 Frank Changtarget/riscv: fix vrgather macro index variable type bug
2021-05-11 Alistair Francistarget/riscv: Add ePMP support for the Ibex CPU
2021-05-11 Alistair Francistarget/riscv/pmp: Remove outdated comment
2021-05-11 Hou Weiyingtarget/riscv: Add a config option for ePMP
2021-05-11 Hou Weiyingtarget/riscv: Implementation of enhanced PMP (ePMP)
2021-05-11 Hou Weiyingtarget/riscv: Add ePMP CSR access functions
2021-05-11 Alistair Francistarget/riscv: Add the ePMP feature
2021-05-11 Hou Weiyingtarget/riscv: Define ePMP mseccfg
2021-05-11 Alistair Francistarget/riscv: Fix the PMP is locked check when using TOR
2021-05-11 LIU Zhiweitarget/riscv: Fixup saturate subtract function
2021-05-11 Jade Finkriscv: don't look at SUM when accessing memory from...
2021-05-11 Alistair Francistarget/riscv: Use RISCVException enum for CSR access
2021-05-11 Alistair Francistarget/riscv: Use the RISCVException enum for CSR opera...
2021-05-11 Alistair Francistarget/riscv: Fix 32-bit HS mode access permissions
2021-05-11 Alistair Francistarget/riscv: Use the RISCVException enum for CSR predi...
2021-05-11 Alistair Francistarget/riscv: Convert the RISC-V exceptions to an enum
2021-05-11 Vijai Kumar Ktarget/riscv: Add Shakti C class CPU
2021-05-11 Dylan Jhongtarget/riscv: Align the data type of reset vector address
2021-05-11 Atish Patratarget/riscv: Remove privilege v1.9 specific CSR relate...
2021-05-10 Peter MaydellMerge remote-tracking branch 'remotes/kraxel/tags/usb...
2021-05-10 Peter MaydellMerge remote-tracking branch 'remotes/mcayland/tags...
2021-05-06 Peter MaydellMerge remote-tracking branch 'remotes/bonzini-gitlab...
2021-05-05 Peter MaydellMerge remote-tracking branch 'remotes/dg-gitlab/tags...
2021-05-05 Peter MaydellMerge remote-tracking branch 'remotes/vivier2/tags...
2021-05-02 Thomas Huthhw: Do not include qemu/log.h if it is not necessary
2021-03-23 Peter MaydellMerge remote-tracking branch 'remotes/kraxel/tags/ui...
2021-03-23 Peter MaydellMerge remote-tracking branch 'remotes/pmaydell/tags...
2021-03-23 Peter MaydellMerge remote-tracking branch 'remotes/aperard/tags...
2021-03-23 Peter MaydellMerge remote-tracking branch 'remotes/alistair/tags...
2021-03-23 Georg Kotheimertarget/riscv: Prevent lost illegal instruction exceptions
2021-03-23 Georg Kotheimertarget/riscv: Add proper two-stage lookup exception...
2021-03-23 Georg Kotheimertarget/riscv: Fix read and write accesses to vsip and...
2021-03-23 Georg Kotheimertarget/riscv: Use background registers also for MSTATUS_MPV
2021-03-23 Georg Kotheimertarget/riscv: Make VSTIP and VSEIP read-only in hip
2021-03-23 Georg Kotheimertarget/riscv: Adjust privilege level for HLV(X)/HSV...
2021-03-23 Jim Shutarget/riscv: flush TLB pages if PMP permission has...
2021-03-23 Jim Shutarget/riscv: add log of PMP permission checking
2021-03-23 Jim Shutarget/riscv: propagate PMP permission to TLB page
2021-03-23 Frank Changtarget/riscv: fix vs() to return proper error code
2021-03-14 Peter MaydellMerge remote-tracking branch 'remotes/thuth-gitlab...
2021-03-12 Peter MaydellMerge remote-tracking branch 'remotes/vivier/tags/m68k...
2021-03-12 Peter MaydellMerge remote-tracking branch 'remotes/kraxel/tags/ui...
2021-03-12 Peter MaydellMerge remote-tracking branch 'remotes/dg-gitlab/tags...
2021-03-11 Peter MaydellMerge remote-tracking branch 'remotes/vivier2/tags...
2021-03-11 Peter MaydellMerge remote-tracking branch 'remotes/stsquad/tags...
2021-03-10 Philippe Mathieu... semihosting: Move include/hw/semihosting/ -> include...
2021-03-09 Michael TokarevVarious spelling fixes
2021-03-08 Peter MaydellMerge remote-tracking branch 'remotes/bonzini-gitlab...
2021-03-05 Peter MaydellMerge remote-tracking branch 'remotes/cohuck-gitlab...
2021-03-05 Peter MaydellMerge remote-tracking branch 'remotes/armbru/tags/pull...
2021-03-05 Peter MaydellMerge remote-tracking branch 'remotes/alistair/tags...
2021-03-04 Yifei Jiangtarget-riscv: support QMP dump-guest-memory
2021-03-04 Bin Mengtarget/riscv: Declare csr_ops[] with a known size
2021-02-05 Peter MaydellMerge remote-tracking branch 'remotes/rth-gitlab/tags...
next
This page took 0.222208 seconds and 7 git commands to generate.