]> Git Repo - qemu.git/commitdiff
PPC: Enable hint bits for lwarx/ldarx
authorAlexander Graf <[email protected]>
Fri, 10 Sep 2010 15:08:33 +0000 (15:08 +0000)
committerEdgar E. Iglesias <[email protected]>
Wed, 15 Sep 2010 14:18:27 +0000 (16:18 +0200)
The lwarx and ldarx instructions have a bit to give some hint to the
CPU which is safe to ignore. We currently refuse to accept any instruction
with that bit set, as it used to be declared MBZ.

Let's remove the reserved bit and make the instruction work as expected.
This fixes Linux boot for ppc64.

Signed-off-by: Alexander Graf <[email protected]>
Reviewed-by: Andreas Färber <[email protected]>
Signed-off-by: Edgar E. Iglesias <[email protected]>
target-ppc/translate.c

index 95ab0a1d8087ddf67b6cb8651ab3829531c4ef97..fd0686182e3698841fbc55a20809349d0d3587fe 100644 (file)
@@ -8048,10 +8048,10 @@ GEN_HANDLER(stswi, 0x1F, 0x15, 0x16, 0x00000001, PPC_STRING),
 GEN_HANDLER(stswx, 0x1F, 0x15, 0x14, 0x00000001, PPC_STRING),
 GEN_HANDLER(eieio, 0x1F, 0x16, 0x1A, 0x03FFF801, PPC_MEM_EIEIO),
 GEN_HANDLER(isync, 0x13, 0x16, 0x04, 0x03FFF801, PPC_MEM),
-GEN_HANDLER(lwarx, 0x1F, 0x14, 0x00, 0x00000001, PPC_RES),
+GEN_HANDLER(lwarx, 0x1F, 0x14, 0x00, 0x00000000, PPC_RES),
 GEN_HANDLER2(stwcx_, "stwcx.", 0x1F, 0x16, 0x04, 0x00000000, PPC_RES),
 #if defined(TARGET_PPC64)
-GEN_HANDLER(ldarx, 0x1F, 0x14, 0x02, 0x00000001, PPC_64B),
+GEN_HANDLER(ldarx, 0x1F, 0x14, 0x02, 0x00000000, PPC_64B),
 GEN_HANDLER2(stdcx_, "stdcx.", 0x1F, 0x16, 0x06, 0x00000000, PPC_64B),
 #endif
 GEN_HANDLER(sync, 0x1F, 0x16, 0x12, 0x039FF801, PPC_MEM_SYNC),
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