target-sparc: Fix order of function parameters

The MinGW-w64 gcc complains about wrong parameters for
gen_helper_fpadd16_s and three other functions.

gen_helper_fpadd16_s is declared like this (hidden in lots of macros):

static inline void
 gen_helper_fpadd16s(TCGv_i32 retval, TCGv_ptr arg1,
                     TCGv_i32 arg2, TCGv_i32 arg3);

So it looks like cpu_env should be the 2nd parameter.

Please review this patch as I have no environment to test it
(maybe the 1st parameter should be cpu_dst?).

Cc: Blue Swirl <[email protected]>
Signed-off-by: Stefan Weil <[email protected]>
Signed-off-by: Blue Swirl <[email protected]>

diff --git a/target-sparc/translate.c b/target-sparc/translate.c
index 214252aeb4f5149f026f3290ac5cdc7b667dbcb1..528ca920de066979a0161a6b6c618affcd13167a 100644 (file)
--- a/target-sparc/translate.c
+++ b/target-sparc/translate.c
@@ -4017,7 +4017,7 @@ static void disas_sparc_insn(DisasContext * dc)
                     break;
                 case 0x051: /* VIS I fpadd16s */
                     CHECK_FPU_FEATURE(dc, VIS1);
-                    gen_helper_fpadd16s(cpu_env, cpu_fpr[rd],
+                    gen_helper_fpadd16s(cpu_fpr[rd], cpu_env,
                                         cpu_fpr[rs1], cpu_fpr[rs2]);
                     gen_update_fprs_dirty(rd);
                     break;
@@ -4031,7 +4031,7 @@ static void disas_sparc_insn(DisasContext * dc)
                     break;
                 case 0x053: /* VIS I fpadd32s */
                     CHECK_FPU_FEATURE(dc, VIS1);
-                    gen_helper_fpadd32s(cpu_env, cpu_fpr[rd],
+                    gen_helper_fpadd32s(cpu_fpr[rd], cpu_env,
                                         cpu_fpr[rs1], cpu_fpr[rs2]);
                     gen_update_fprs_dirty(rd);
                     break;
@@ -4045,7 +4045,7 @@ static void disas_sparc_insn(DisasContext * dc)
                     break;
                 case 0x055: /* VIS I fpsub16s */
                     CHECK_FPU_FEATURE(dc, VIS1);
-                    gen_helper_fpsub16s(cpu_env, cpu_fpr[rd],
+                    gen_helper_fpsub16s(cpu_fpr[rd], cpu_env,
                                         cpu_fpr[rs1], cpu_fpr[rs2]);
                     gen_update_fprs_dirty(rd);
                     break;
@@ -4059,7 +4059,7 @@ static void disas_sparc_insn(DisasContext * dc)
                     break;
                 case 0x057: /* VIS I fpsub32s */
                     CHECK_FPU_FEATURE(dc, VIS1);
-                    gen_helper_fpsub32s(cpu_env, cpu_fpr[rd],
+                    gen_helper_fpsub32s(cpu_fpr[rd], cpu_env,
                                         cpu_fpr[rs1], cpu_fpr[rs2]);
                     gen_update_fprs_dirty(rd);
                     break;