return (hiattr << 6) | (hihint << 4) | (loattr << 2) | lohint;
}
-ARMVAParameters aa64_va_parameters(CPUARMState *env, uint64_t va,
- ARMMMUIdx mmu_idx, bool data)
+ARMVAParameters aa64_va_parameters_both(CPUARMState *env, uint64_t va,
+ ARMMMUIdx mmu_idx)
{
uint64_t tcr = regime_tcr(env, mmu_idx)->raw_tcr;
uint32_t el = regime_el(env, mmu_idx);
};
}
+ARMVAParameters aa64_va_parameters(CPUARMState *env, uint64_t va,
+ ARMMMUIdx mmu_idx, bool data)
+{
+ return aa64_va_parameters_both(env, va, mmu_idx);
+}
+
static ARMVAParameters aa32_va_parameters(CPUARMState *env, uint32_t va,
ARMMMUIdx mmu_idx)
{
} ARMVAParameters;
#ifdef CONFIG_USER_ONLY
-static inline ARMVAParameters aa64_va_parameters(CPUARMState *env,
- uint64_t va,
- ARMMMUIdx mmu_idx, bool data)
+static inline ARMVAParameters aa64_va_parameters_both(CPUARMState *env,
+ uint64_t va,
+ ARMMMUIdx mmu_idx)
{
return (ARMVAParameters) {
/* 48-bit address space */
.tbi = false,
};
}
+
+static inline ARMVAParameters aa64_va_parameters(CPUARMState *env,
+ uint64_t va,
+ ARMMMUIdx mmu_idx, bool data)
+{
+ return aa64_va_parameters_both(env, va, mmu_idx);
+}
#else
+ARMVAParameters aa64_va_parameters_both(CPUARMState *env, uint64_t va,
+ ARMMMUIdx mmu_idx);
ARMVAParameters aa64_va_parameters(CPUARMState *env, uint64_t va,
ARMMMUIdx mmu_idx, bool data);
#endif