acpi: piix4: remove not needed GPE0 mask

Hardcoded GPE0 mask isn't really needed. Since GPE0_STS initialized
with all bits cleared and only QEMU itself can set bits there (i.e.
guest can only clear bits in it). So guest can't triger SCI
by setting _STS & _EN bits and there is not reason to mask out not
supported _STS bits since they shouldn't be set by QEMU in the first
place.

Signed-off-by: Igor Mammedov <[email protected]>
Signed-off-by: Michael S. Tsirkin <[email protected]>

diff --git a/hw/acpi/piix4.c b/hw/acpi/piix4.c
index 93849c8d369fddf0eeb07ae087699b5395c7847f..b4caeab1313524ea0a513c13187456085b47fd20 100644 (file)
--- a/hw/acpi/piix4.c
+++ b/hw/acpi/piix4.c
@@ -122,8 +122,7 @@ static void pm_update_sci(PIIX4PMState *s)
                    ACPI_BITMASK_POWER_BUTTON_ENABLE |
                    ACPI_BITMASK_GLOBAL_LOCK_ENABLE |
                    ACPI_BITMASK_TIMER_ENABLE)) != 0) ||
-        (((s->ar.gpe.sts[0] & s->ar.gpe.en[0]) &
-          (PIIX4_PCI_HOTPLUG_STATUS | PIIX4_CPU_HOTPLUG_STATUS)) != 0);
+        ((s->ar.gpe.sts[0] & s->ar.gpe.en[0]) != 0);
 
     qemu_set_irq(s->irq, sci_level);
     /* schedule a timer interruption if needed */