bool bsp;
bsp = cpu_is_bsp(s->cpu);
- s->apicbase = 0xfee00000 |
+ s->apicbase = APIC_DEFAULT_ADDRESS |
(bsp ? MSR_IA32_APICBASE_BSP : 0) | MSR_IA32_APICBASE_ENABLE;
s->vapic_paddr = 0;
#include "sysemu/kvm.h"
#include "hw/apic_internal.h"
-#define APIC_DEFAULT_ADDRESS 0xfee00000
-
#define VAPIC_IO_PORT 0x7e
#define VAPIC_CPU_SHIFT 7
}
}
-#define MSI_ADDR_BASE 0xfee00000
-
#ifndef CONFIG_USER_ONLY
static void x86_cpu_apic_init(X86CPU *cpu, Error **errp)
{
on the global memory bus. */
/* XXX: what if the base changes? */
sysbus_mmio_map_overlap(SYS_BUS_DEVICE(env->apic_state), 0,
- MSI_ADDR_BASE, 0x1000);
+ APIC_DEFAULT_ADDRESS, 0x1000);
apic_mapped = 1;
}
}
uint32_t x86_cpu_apic_id_from_index(unsigned int cpu_index);
void enable_compat_apic_id_mode(void);
+#define APIC_DEFAULT_ADDRESS 0xfee00000
+
#endif /* CPU_I386_H */