OABI arm used a software interrupt(0xef9f0001) for breakpoints.
Since 2005 gdb has used the break instruction(0xe7f001f0) for EABI.
Apparently Steel Bank Common Lisp still uses the swi instruction.
This is the kernel implementation:
http://lxr.free-electrons.com/source/arch/arm/kernel/traps.c#L598
Signed-off-by: Hunter Laux <[email protected]>
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Michael Tokarev <[email protected]>
#define ARM_THUMB_SYSCALL 0
#define ARM_NR_BASE 0xf0000
+#define ARM_NR_breakpoint (ARM_NR_BASE + 1)
#define ARM_NR_cacheflush (ARM_NR_BASE + 2)
#define ARM_NR_set_tls (ARM_NR_BASE + 5)
cpu_set_tls(env, env->regs[0]);
env->regs[0] = 0;
break;
+ case ARM_NR_breakpoint:
+ env->regs[15] -= env->thumb ? 2 : 4;
+ goto excp_debug;
default:
gemu_log("qemu: Unsupported ARM syscall: 0x%x\n",
n);
}
break;
case EXCP_DEBUG:
+ excp_debug:
{
int sig;