case AST2400_A0_SILICON_REV:
case AST2400_A1_SILICON_REV:
data &= ~ASPEED_SDMC_READONLY_MASK;
+ data |= s->fixed_conf;
break;
case AST2500_A0_SILICON_REV:
case AST2500_A1_SILICON_REV:
data &= ~ASPEED_SDMC_AST2500_READONLY_MASK;
+ data |= s->fixed_conf;
break;
default:
g_assert_not_reached();
memset(s->regs, 0, sizeof(s->regs));
/* Set ram size bit and defaults values */
- switch (s->silicon_rev) {
- case AST2400_A0_SILICON_REV:
- case AST2400_A1_SILICON_REV:
- s->regs[R_CONF] |=
- ASPEED_SDMC_VGA_COMPAT |
- ASPEED_SDMC_DRAM_SIZE(s->ram_bits);
- break;
-
- case AST2500_A0_SILICON_REV:
- case AST2500_A1_SILICON_REV:
- s->regs[R_CONF] |=
- ASPEED_SDMC_HW_VERSION(1) |
- ASPEED_SDMC_VGA_APERTURE(ASPEED_SDMC_VGA_64MB) |
- ASPEED_SDMC_DRAM_SIZE(s->ram_bits);
- break;
-
- default:
- g_assert_not_reached();
- }
+ s->regs[R_CONF] = s->fixed_conf;
}
static void aspeed_sdmc_realize(DeviceState *dev, Error **errp)
case AST2400_A0_SILICON_REV:
case AST2400_A1_SILICON_REV:
s->ram_bits = ast2400_rambits(s);
+ s->fixed_conf = ASPEED_SDMC_VGA_COMPAT |
+ ASPEED_SDMC_DRAM_SIZE(s->ram_bits);
break;
case AST2500_A0_SILICON_REV:
case AST2500_A1_SILICON_REV:
s->ram_bits = ast2500_rambits(s);
+ s->fixed_conf = ASPEED_SDMC_HW_VERSION(1) |
+ ASPEED_SDMC_VGA_APERTURE(ASPEED_SDMC_VGA_64MB) |
+ ASPEED_SDMC_DRAM_SIZE(s->ram_bits);
break;
default:
g_assert_not_reached();