microblaze: Make writes to MMU_ZPR flush the TLB.

Signed-off-by: Edgar E. Iglesias <[email protected]>

diff --git a/target-microblaze/mmu.c b/target-microblaze/mmu.c
index 72d318384a20e483f47c75e7df9d7cc9be1fd808..d14373ce42d30874c4803e0cc6471fe3f7b47a59 100644 (file)
--- a/target-microblaze/mmu.c
+++ b/target-microblaze/mmu.c
@@ -220,6 +220,13 @@ void mmu_write(CPUState *env, uint32_t rn, uint32_t v)
             D(qemu_log("%s ram[%d][%d]=%x\n", __func__, rn & 1, i, v));
             break;
         case MMU_R_ZPR:
+            /* Changes to the zone protection reg flush the QEMU TLB.
+               Fortunately, these are very uncommon.  */
+            if (v != env->mmu.regs[rn]) {
+                tlb_flush(env, 1);
+            }
+            env->mmu.regs[rn] = v;
+            break;
         case MMU_R_PID:
             if (v != env->mmu.regs[rn]) {
                 mmu_change_pid(env, v);