int cpu_exec(CPUArchState *env)
{
CPUState *cpu = ENV_GET_CPU(env);
-#if !(defined(CONFIG_USER_ONLY) && \
- (defined(TARGET_M68K) || defined(TARGET_PPC) || defined(TARGET_S390X)))
CPUClass *cc = CPU_GET_CLASS(cpu);
-#endif
#ifdef TARGET_I386
X86CPU *x86_cpu = X86_CPU(cpu);
#endif
#elif defined(TARGET_XTENSA)
#elif defined(TARGET_TRICORE)
/* XXXXX */
-#else
-#error unsupported target CPU
#endif
+ cc->cpu_exec_enter(cpu);
cpu->exception_index = -1;
/* Calculate difference between guest clock and host clock.
#elif defined(TARGET_S390X)
#elif defined(TARGET_XTENSA)
/* XXXXX */
-#else
-#error unsupported target CPU
#endif
+ cc->cpu_exec_exit(cpu);
/* fail safe : never use current_cpu outside cpu_exec() */
current_cpu = NULL;
* @vmsd: State description for migration.
* @gdb_num_core_regs: Number of core registers accessible to GDB.
* @gdb_core_xml_file: File name for core registers GDB XML description.
+ * @cpu_exec_enter: Callback for cpu_exec preparation.
+ * @cpu_exec_exit: Callback for cpu_exec cleanup.
*
* Represents a CPU family or model.
*/
const struct VMStateDescription *vmsd;
int gdb_num_core_regs;
const char *gdb_core_xml_file;
+
+ void (*cpu_exec_enter)(CPUState *cpu);
+ void (*cpu_exec_exit)(CPUState *cpu);
} CPUClass;
#ifdef HOST_WORDS_BIGENDIAN
return target_words_bigendian();
}
-static void cpu_common_debug_excp_handler(CPUState *cpu)
+static void cpu_common_noop(CPUState *cpu)
{
}
k->gdb_read_register = cpu_common_gdb_read_register;
k->gdb_write_register = cpu_common_gdb_write_register;
k->virtio_is_big_endian = cpu_common_virtio_is_big_endian;
- k->debug_excp_handler = cpu_common_debug_excp_handler;
+ k->debug_excp_handler = cpu_common_noop;
+ k->cpu_exec_enter = cpu_common_noop;
+ k->cpu_exec_exit = cpu_common_noop;
dc->realize = cpu_common_realizefn;
/*
* Reason: CPUs still need special care by board code: wiring up