target/sh4: implement tas.b using atomic helper

We only emulate UP SH4, however as the tas.b instruction is used in the GNU
libc, this improve linux-user emulation.

Reviewed-by: Richard Henderson <[email protected]>
Signed-off-by: Aurelien Jarno <[email protected]>

diff --git a/target/sh4/translate.c b/target/sh4/translate.c
index d61b176a7dcda1987721b7efba91c5a7afd5492a..baed19bdac4ce06fc65fbc3647d5bd4ca3f5241e 100644 (file)
--- a/target/sh4/translate.c
+++ b/target/sh4/translate.c
@@ -1634,19 +1634,14 @@ static void _decode_opc(DisasContext * ctx)
        tcg_gen_shri_i32(REG(B11_8), REG(B11_8), 16);
        return;
     case 0x401b:               /* tas.b @Rn */
-       {
-           TCGv addr, val;
-           addr = tcg_temp_local_new();
-           tcg_gen_mov_i32(addr, REG(B11_8));
-           val = tcg_temp_local_new();
-            tcg_gen_qemu_ld_i32(val, addr, ctx->memidx, MO_UB);
+        {
+            TCGv val = tcg_const_i32(0x80);
+            tcg_gen_atomic_fetch_or_i32(val, REG(B11_8), val,
+                                        ctx->memidx, MO_UB);
             tcg_gen_setcondi_i32(TCG_COND_EQ, cpu_sr_t, val, 0);
-           tcg_gen_ori_i32(val, val, 0x80);
-            tcg_gen_qemu_st_i32(val, addr, ctx->memidx, MO_UB);
-           tcg_temp_free(val);
-           tcg_temp_free(addr);
-       }
-       return;
+            tcg_temp_free(val);
+        }
+        return;
     case 0xf00d: /* fsts FPUL,FRn - FPSCR: Nothing */
        CHECK_FPU_ENABLED
        tcg_gen_mov_i32(cpu_fregs[FREG(B11_8)], cpu_fpul);