*.d
.pc
patches
+pc-bios/bios-pq/status
-- The PC BIOS comes from the Bochs project
- (http://bochs.sourceforge.net/). A patch from bios.diff was applied.
+- The PC BIOS comes from the Bochs project (http://bochs.sourceforge.net/).
+ The patches in bios-pq have been applied. The binary is based on the revision
+ in bios-pq/HEAD with the patches in bios-pq/series applied. The git repo
+ that HEAD refers to is located at http://repo.or.cz/w/bochs-mirror.git
- The VGA BIOS and the Cirrus VGA BIOS come from the LGPL VGA bios
project (http://www.nongnu.org/vgabios/).
--- /dev/null
+--- bochs-2.3.7.orig/bios/rombios.h
++++ bochs-2.3.7/bios/rombios.h
+@@ -19,7 +19,7 @@
+ // Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
+
+ /* define it to include QEMU specific code */
+-//#define BX_QEMU
++#define BX_QEMU
+
+ #ifndef LEGACY
+ # define BX_ROMBIOS32 1
--- /dev/null
+
+add support to memory above the pci hole
+
+the new memory region is mapped after address 0x100000000,
+the bios take the size of the memory after the 0x100000000 from
+three new cmos bytes.
+
+diff --git a/bios/rombios.c b/bios/rombios.c
+index 1be0816..b70f249 100644
+--- a/bios/rombios.c
++++ b/bios/rombios.c
+@@ -4442,22 +4442,25 @@ BX_DEBUG_INT15("case default:\n");
+ #endif // BX_USE_PS2_MOUSE
+
+
+-void set_e820_range(ES, DI, start, end, type)
++void set_e820_range(ES, DI, start, end, extra_start, extra_end, type)
+ Bit16u ES;
+ Bit16u DI;
+ Bit32u start;
+ Bit32u end;
++ Bit8u extra_start;
++ Bit8u extra_end;
+ Bit16u type;
+ {
+ write_word(ES, DI, start);
+ write_word(ES, DI+2, start >> 16);
+- write_word(ES, DI+4, 0x00);
++ write_word(ES, DI+4, extra_start);
+ write_word(ES, DI+6, 0x00);
+
+ end -= start;
++ extra_end -= extra_start;
+ write_word(ES, DI+8, end);
+ write_word(ES, DI+10, end >> 16);
+- write_word(ES, DI+12, 0x0000);
++ write_word(ES, DI+12, extra_end);
+ write_word(ES, DI+14, 0x0000);
+
+ write_word(ES, DI+16, type);
+@@ -4470,7 +4473,9 @@ int15_function32(regs, ES, DS, FLAGS)
+ Bit16u ES, DS, FLAGS;
+ {
+ Bit32u extended_memory_size=0; // 64bits long
++ Bit32u extra_lowbits_memory_size=0;
+ Bit16u CX,DX;
++ Bit8u extra_highbits_memory_size=0;
+
+ BX_DEBUG_INT15("int15 AX=%04x\n",regs.u.r16.ax);
+
+@@ -4544,11 +4549,18 @@ ASM_END
+ extended_memory_size += (1L * 1024 * 1024);
+ }
+
++ extra_lowbits_memory_size = inb_cmos(0x5c);
++ extra_lowbits_memory_size <<= 8;
++ extra_lowbits_memory_size |= inb_cmos(0x5b);
++ extra_lowbits_memory_size *= 64;
++ extra_lowbits_memory_size *= 1024;
++ extra_highbits_memory_size = inb_cmos(0x5d);
++
+ switch(regs.u.r16.bx)
+ {
+ case 0:
+ set_e820_range(ES, regs.u.r16.di,
+- 0x0000000L, 0x0009f000L, 1);
++ 0x0000000L, 0x0009f000L, 0, 0, 1);
+ regs.u.r32.ebx = 1;
+ regs.u.r32.eax = 0x534D4150;
+ regs.u.r32.ecx = 0x14;
+@@ -4557,7 +4569,7 @@ ASM_END
+ break;
+ case 1:
+ set_e820_range(ES, regs.u.r16.di,
+- 0x0009f000L, 0x000a0000L, 2);
++ 0x0009f000L, 0x000a0000L, 0, 0, 2);
+ regs.u.r32.ebx = 2;
+ regs.u.r32.eax = 0x534D4150;
+ regs.u.r32.ecx = 0x14;
+@@ -4566,7 +4578,7 @@ ASM_END
+ break;
+ case 2:
+ set_e820_range(ES, regs.u.r16.di,
+- 0x000e8000L, 0x00100000L, 2);
++ 0x000e8000L, 0x00100000L, 0, 0, 2);
+ regs.u.r32.ebx = 3;
+ regs.u.r32.eax = 0x534D4150;
+ regs.u.r32.ecx = 0x14;
+@@ -4577,7 +4589,7 @@ ASM_END
+ #if BX_ROMBIOS32
+ set_e820_range(ES, regs.u.r16.di,
+ 0x00100000L,
+- extended_memory_size - ACPI_DATA_SIZE, 1);
++ extended_memory_size - ACPI_DATA_SIZE ,0, 0, 1);
+ regs.u.r32.ebx = 4;
+ #else
+ set_e820_range(ES, regs.u.r16.di,
+@@ -4593,7 +4605,7 @@ ASM_END
+ case 4:
+ set_e820_range(ES, regs.u.r16.di,
+ extended_memory_size - ACPI_DATA_SIZE,
+- extended_memory_size, 3); // ACPI RAM
++ extended_memory_size ,0, 0, 3); // ACPI RAM
+ regs.u.r32.ebx = 5;
+ regs.u.r32.eax = 0x534D4150;
+ regs.u.r32.ecx = 0x14;
+@@ -4603,7 +4615,20 @@ ASM_END
+ case 5:
+ /* 256KB BIOS area at the end of 4 GB */
+ set_e820_range(ES, regs.u.r16.di,
+- 0xfffc0000L, 0x00000000L, 2);
++ 0xfffc0000L, 0x00000000L ,0, 0, 2);
++ if (extra_highbits_memory_size || extra_lowbits_memory_size)
++ regs.u.r32.ebx = 6;
++ else
++ regs.u.r32.ebx = 0;
++ regs.u.r32.eax = 0x534D4150;
++ regs.u.r32.ecx = 0x14;
++ CLEAR_CF();
++ return;
++ case 6:
++ /* Maping of memory above 4 GB */
++ set_e820_range(ES, regs.u.r16.di, 0x00000000L,
++ extra_lowbits_memory_size, 1, extra_highbits_memory_size
++ + 1, 1);
+ regs.u.r32.ebx = 0;
+ regs.u.r32.eax = 0x534D4150;
+ regs.u.r32.ecx = 0x14;
--- /dev/null
+
+instead of timing out, wait until all cpus are up
+
+diff --git a/bios/rombios32.c b/bios/rombios32.c
+index ef98a41..05ba40d 100644
+--- a/bios/rombios32.c
++++ b/bios/rombios32.c
+@@ -512,7 +512,12 @@ void smp_probe(void)
+ sipi_vector = AP_BOOT_ADDR >> 12;
+ writel(APIC_BASE + APIC_ICR_LOW, 0x000C4600 | sipi_vector);
+
++#ifndef BX_QEMU
+ delay_ms(10);
++#else
++ while (cmos_readb(0x5f) + 1 != readw(&smp_cpus))
++ ;
++#endif
+ }
+ BX_INFO("Found %d cpu(s)\n", readw(&smp_cpus));
+ }
--- /dev/null
+Disable stack protector for BIOS
+
+Some distro GCCs (like Ubuntu) enable stack protection by default. Since the
+BIOS doesn't link against libgcc, this results in undefined references unless
+the stack protector is disabled.
+
+
+diff --git a/bios/Makefile.in b/bios/Makefile.in
+index af674b4..5c7bd4f 100644
+--- a/bios/Makefile.in
++++ b/bios/Makefile.in
+@@ -41,7 +41,7 @@ RANLIB = @RANLIB@
+
+ BCC = bcc
+ GCC = gcc
+-GCC32 = gcc -m32
++GCC32 = gcc -m32 -fno-stack-protector
+ AS86 = as86
+
+ BX_INCDIRS = -I.. -I$(srcdir)/.. -I../iodev -I$(srcdir)/../iodev
--- /dev/null
+8d4e158f0ea5fa00fa0276f487ff21609fbb0894
--- /dev/null
+0001_bx-qemu.patch
+0002_e820-high-mem.patch
+0003_smp-startup-poll.patch
+0004_no-stack-protector.patch
+++ /dev/null
---- bochs-2.3.7.orig/bios/rombios.h
-+++ bochs-2.3.7/bios/rombios.h
-@@ -19,7 +19,7 @@
- // Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
-
- /* define it to include QEMU specific code */
--//#define BX_QEMU
-+#define BX_QEMU
-
- #ifndef LEGACY
- # define BX_ROMBIOS32 1
---- bochs-2.3.7.orig/bios/rombios.c
-+++ bochs-2.3.7/bios/rombios.c
-@@ -4404,22 +4404,25 @@
- #endif // BX_USE_PS2_MOUSE
-
-
--void set_e820_range(ES, DI, start, end, type)
-+void set_e820_range(ES, DI, start, end, extra_start, extra_end, type)
- Bit16u ES;
- Bit16u DI;
- Bit32u start;
- Bit32u end;
-+ Bit8u extra_start;
-+ Bit8u extra_end;
- Bit16u type;
- {
- write_word(ES, DI, start);
- write_word(ES, DI+2, start >> 16);
-- write_word(ES, DI+4, 0x00);
-+ write_word(ES, DI+4, extra_start);
- write_word(ES, DI+6, 0x00);
-
- end -= start;
-+ extra_end -= extra_start;
- write_word(ES, DI+8, end);
- write_word(ES, DI+10, end >> 16);
-- write_word(ES, DI+12, 0x0000);
-+ write_word(ES, DI+12, extra_end);
- write_word(ES, DI+14, 0x0000);
-
- write_word(ES, DI+16, type);
-@@ -4432,7 +4435,9 @@
- Bit16u ES, DS, FLAGS;
- {
- Bit32u extended_memory_size=0; // 64bits long
-+ Bit32u extra_lowbits_memory_size=0;
- Bit16u CX,DX;
-+ Bit8u extra_highbits_memory_size=0;
-
- BX_DEBUG_INT15("int15 AX=%04x\n",regs.u.r16.ax);
-
-@@ -4506,11 +4511,18 @@
- extended_memory_size += (1L * 1024 * 1024);
- }
-
-+ extra_lowbits_memory_size = inb_cmos(0x5c);
-+ extra_lowbits_memory_size <<= 8;
-+ extra_lowbits_memory_size |= inb_cmos(0x5b);
-+ extra_lowbits_memory_size *= 64;
-+ extra_lowbits_memory_size *= 1024;
-+ extra_highbits_memory_size = inb_cmos(0x5d);
-+
- switch(regs.u.r16.bx)
- {
- case 0:
- set_e820_range(ES, regs.u.r16.di,
-- 0x0000000L, 0x0009fc00L, 1);
-+ 0x0000000L, 0x0009fc00L, 0, 0, 1);
- regs.u.r32.ebx = 1;
- regs.u.r32.eax = 0x534D4150;
- regs.u.r32.ecx = 0x14;
-@@ -4519,7 +4531,7 @@
- break;
- case 1:
- set_e820_range(ES, regs.u.r16.di,
-- 0x0009fc00L, 0x000a0000L, 2);
-+ 0x0009fc00L, 0x000a0000L, 0, 0, 2);
- regs.u.r32.ebx = 2;
- regs.u.r32.eax = 0x534D4150;
- regs.u.r32.ecx = 0x14;
-@@ -4528,7 +4540,7 @@
- break;
- case 2:
- set_e820_range(ES, regs.u.r16.di,
-- 0x000e8000L, 0x00100000L, 2);
-+ 0x000e8000L, 0x00100000L, 0, 0, 2);
- regs.u.r32.ebx = 3;
- regs.u.r32.eax = 0x534D4150;
- regs.u.r32.ecx = 0x14;
-@@ -4539,7 +4551,7 @@
- #if BX_ROMBIOS32
- set_e820_range(ES, regs.u.r16.di,
- 0x00100000L,
-- extended_memory_size - ACPI_DATA_SIZE, 1);
-+ extended_memory_size - ACPI_DATA_SIZE ,0, 0, 1);
- regs.u.r32.ebx = 4;
- #else
- set_e820_range(ES, regs.u.r16.di,
-@@ -4555,7 +4567,7 @@
- case 4:
- set_e820_range(ES, regs.u.r16.di,
- extended_memory_size - ACPI_DATA_SIZE,
-- extended_memory_size, 3); // ACPI RAM
-+ extended_memory_size ,0, 0, 3); // ACPI RAM
- regs.u.r32.ebx = 5;
- regs.u.r32.eax = 0x534D4150;
- regs.u.r32.ecx = 0x14;
-@@ -4565,7 +4577,20 @@
- case 5:
- /* 256KB BIOS area at the end of 4 GB */
- set_e820_range(ES, regs.u.r16.di,
-- 0xfffc0000L, 0x00000000L, 2);
-+ 0xfffc0000L, 0x00000000L ,0, 0, 2);
-+ if (extra_highbits_memory_size || extra_lowbits_memory_size)
-+ regs.u.r32.ebx = 6;
-+ else
-+ regs.u.r32.ebx = 0;
-+ regs.u.r32.eax = 0x534D4150;
-+ regs.u.r32.ecx = 0x14;
-+ CLEAR_CF();
-+ return;
-+ case 6:
-+ /* Maping of memory above 4 GB */
-+ set_e820_range(ES, regs.u.r16.di, 0x00000000L,
-+ extra_lowbits_memory_size, 1, extra_highbits_memory_size
-+ + 1, 1);
- regs.u.r32.ebx = 0;
- regs.u.r32.eax = 0x534D4150;
- regs.u.r32.ecx = 0x14;
---- bochs-2.3.7.orig/bios/rombios32.c
-+++ bochs-2.3.7/bios/rombios32.c
-@@ -479,7 +479,12 @@
- sipi_vector = AP_BOOT_ADDR >> 12;
- writel(APIC_BASE + APIC_ICR_LOW, 0x000C4600 | sipi_vector);
-
-+#ifndef BX_QEMU
- delay_ms(10);
-+#else
-+ while (cmos_readb(0x5f) + 1 != readw((void *)CPU_COUNT_ADDR))
-+ ;
-+#endif
-
- smp_cpus = readw((void *)CPU_COUNT_ADDR);
- }
projects / qemu.git / commitdiff