target/openrisc: Merge disas_openrisc_insn

Acked-by: Stafford Horne <[email protected]>
Signed-off-by: Richard Henderson <[email protected]>

diff --git a/target/openrisc/translate.c b/target/openrisc/translate.c
index 1f87ad6b2e765bb507e471a2186dd0dec769e9bd..e7c96ca990ad4241b46c5b712d7415334659d0e4 100644 (file)
--- a/target/openrisc/translate.c
+++ b/target/openrisc/translate.c
@@ -1373,14 +1373,6 @@ static bool trans_lf_sfle_s(DisasContext *dc, arg_ab *a, uint32_t insn)
     return true;
 }
 
-static void disas_openrisc_insn(DisasContext *dc, OpenRISCCPU *cpu)
-{
-    uint32_t insn = cpu_ldl_code(&cpu->env, dc->base.pc_next);
-    if (!decode(dc, insn)) {
-        gen_illegal_exception(dc);
-    }
-}
-
 static void openrisc_tr_init_disas_context(DisasContextBase *dcb, CPUState *cs)
 {
     DisasContext *dc = container_of(dcb, DisasContext, base);
@@ -1435,8 +1427,11 @@ static void openrisc_tr_translate_insn(DisasContextBase *dcbase, CPUState *cs)
 {
     DisasContext *dc = container_of(dcbase, DisasContext, base);
     OpenRISCCPU *cpu = OPENRISC_CPU(cs);
+    uint32_t insn = cpu_ldl_code(&cpu->env, dc->base.pc_next);
 
-    disas_openrisc_insn(dc, cpu);
+    if (!decode(dc, insn)) {
+        gen_illegal_exception(dc);
+    }
     dc->base.pc_next += 4;
 
     /* delay slot */