[ Taking latest isapc changes into account. ]
In case the PIC IRQ gets de-asserted on an isapc machine, we also have
to reset CPU_INTERRUPT_HARD. This is what older qemu (before the
routing-through-APIC changes) used to do as well.
Signed-off-by: Jan Kiszka <[email protected]>
Signed-off-by: Aurelien Jarno <[email protected]>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5040
c046a42c-6fe2-441c-8c8c-
71466251a162
{
CPUState *env = first_cpu;
- if (!level)
- return;
-
if (env->apic_state) {
+ if (!level)
+ return;
while (env) {
if (apic_accept_pic_intr(env))
apic_local_deliver(env, APIC_LINT0);
env = env->next_cpu;
}
} else {
- cpu_interrupt(env, CPU_INTERRUPT_HARD);
+ if (level)
+ cpu_interrupt(env, CPU_INTERRUPT_HARD);
+ else
+ cpu_reset_interrupt(env, CPU_INTERRUPT_HARD);
}
}