]> Git Repo - qemu.git/commitdiff
target/mips: Rename 128-bit upper halve GPR registers
authorPhilippe Mathieu-Daudé <[email protected]>
Sun, 14 Feb 2021 17:58:35 +0000 (18:58 +0100)
committerPhilippe Mathieu-Daudé <[email protected]>
Sun, 21 Feb 2021 18:42:34 +0000 (19:42 +0100)
TCG displays the upper halve registers with the same name
as their lower halves. Rename the upper halves with the
'[hi]' suffix.

Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Richard Henderson <[email protected]>
Message-Id: <20210214175912[email protected]>
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
target/mips/translate.c

index 2df76592470d30bb8d5e4027e1a2ad9a8e98e50f..5228e040842c2b26758550866317ec57cb8b9e33 100644 (file)
@@ -29289,10 +29289,12 @@ void mips_tcg_init(void)
     cpu_gpr_hi[0] = NULL;
 
     for (unsigned i = 1; i < 32; i++) {
+        g_autofree char *rname = g_strdup_printf("%s[hi]", regnames[i]);
+
         cpu_gpr_hi[i] = tcg_global_mem_new_i64(cpu_env,
                                                offsetof(CPUMIPSState,
                                                         active_tc.gpr_hi[i]),
-                                               regnames[i]);
+                                               rname);
     }
 #endif /* !TARGET_MIPS64 */
     for (i = 0; i < 32; i++) {
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