obj-y = $(block-obj-y)
obj-y += readline.o console.o
-obj-y += irq.o ptimer.o
+obj-y += irq.o ptimer.o ioport.o
obj-y += i2c.o smbus.o smbus_eeprom.o max7310.o max111x.o wm8750.o
obj-y += ssd0303.o ssd0323.o ads7846.o stellaris_input.o twl92230.o
obj-y += tmp105.o lm832x.o eeprom93xx.o tsc2005.o
ifdef CONFIG_SOFTMMU
obj-y = vl.o monitor.o pci.o isa_mmio.o machine.o \
- gdbstub.o gdbstub-xml.o ioport.o
+ gdbstub.o gdbstub-xml.o
# virtio has to be here due to weird dependency between PCI and virtio-net.
# need to fix this properly
obj-y += virtio-blk.o virtio-balloon.o virtio-net.o virtio-console.o virtio-pci.o
static void pci_apb_iowriteb (void *opaque, target_phys_addr_t addr,
uint32_t val)
{
- cpu_outb(NULL, addr & IOPORTS_MASK, val);
+ cpu_outb(addr & IOPORTS_MASK, val);
}
static void pci_apb_iowritew (void *opaque, target_phys_addr_t addr,
uint32_t val)
{
- cpu_outw(NULL, addr & IOPORTS_MASK, val);
+ cpu_outw(addr & IOPORTS_MASK, val);
}
static void pci_apb_iowritel (void *opaque, target_phys_addr_t addr,
uint32_t val)
{
- cpu_outl(NULL, addr & IOPORTS_MASK, val);
+ cpu_outl(addr & IOPORTS_MASK, val);
}
static uint32_t pci_apb_ioreadb (void *opaque, target_phys_addr_t addr)
{
uint32_t val;
- val = cpu_inb(NULL, addr & IOPORTS_MASK);
+ val = cpu_inb(addr & IOPORTS_MASK);
return val;
}
{
uint32_t val;
- val = cpu_inw(NULL, addr & IOPORTS_MASK);
+ val = cpu_inw(addr & IOPORTS_MASK);
return val;
}
{
uint32_t val;
- val = cpu_inl(NULL, addr & IOPORTS_MASK);
+ val = cpu_inl(addr & IOPORTS_MASK);
return val;
}
static void isa_mmio_writeb (void *opaque, target_phys_addr_t addr,
uint32_t val)
{
- cpu_outb(NULL, addr & IOPORTS_MASK, val);
+ cpu_outb(addr & IOPORTS_MASK, val);
}
static void isa_mmio_writew (void *opaque, target_phys_addr_t addr,
#ifdef TARGET_WORDS_BIGENDIAN
val = bswap16(val);
#endif
- cpu_outw(NULL, addr & IOPORTS_MASK, val);
+ cpu_outw(addr & IOPORTS_MASK, val);
}
static void isa_mmio_writel (void *opaque, target_phys_addr_t addr,
#ifdef TARGET_WORDS_BIGENDIAN
val = bswap32(val);
#endif
- cpu_outl(NULL, addr & IOPORTS_MASK, val);
+ cpu_outl(addr & IOPORTS_MASK, val);
}
static uint32_t isa_mmio_readb (void *opaque, target_phys_addr_t addr)
{
uint32_t val;
- val = cpu_inb(NULL, addr & IOPORTS_MASK);
+ val = cpu_inb(addr & IOPORTS_MASK);
return val;
}
{
uint32_t val;
- val = cpu_inw(NULL, addr & IOPORTS_MASK);
+ val = cpu_inw(addr & IOPORTS_MASK);
#ifdef TARGET_WORDS_BIGENDIAN
val = bswap16(val);
#endif
{
uint32_t val;
- val = cpu_inl(NULL, addr & IOPORTS_MASK);
+ val = cpu_inl(addr & IOPORTS_MASK);
#ifdef TARGET_WORDS_BIGENDIAN
val = bswap32(val);
#endif
static uint32_t rtc_readb(void *opaque, target_phys_addr_t addr)
{
- CPUState *env = opaque;
- return cpu_inw(env, 0x71);
+ return cpu_inw(0x71);
}
static void rtc_writeb(void *opaque, target_phys_addr_t addr, uint32_t val)
{
- CPUState *env = opaque;
- cpu_outw(env, 0x71, val & 0xff);
+ cpu_outw(0x71, val & 0xff);
}
static CPUReadMemoryFunc * const rtc_read[3] = {
/* Real time clock */
rtc_init(1980);
- s_rtc = cpu_register_io_memory(rtc_read, rtc_write, env);
+ s_rtc = cpu_register_io_memory(rtc_read, rtc_write, NULL);
cpu_register_physical_memory(0x80004000, 0x00001000, s_rtc);
/* Keyboard (i8042) */
sysctrl_t *sysctrl = opaque;
addr = prep_IO_address(sysctrl, addr);
- cpu_outb(NULL, addr, value);
+ cpu_outb(addr, value);
}
static uint32_t PPC_prep_io_readb (void *opaque, target_phys_addr_t addr)
uint32_t ret;
addr = prep_IO_address(sysctrl, addr);
- ret = cpu_inb(NULL, addr);
+ ret = cpu_inb(addr);
return ret;
}
value = bswap16(value);
#endif
PPC_IO_DPRINTF("0x" TARGET_FMT_plx " => 0x%08" PRIx32 "\n", addr, value);
- cpu_outw(NULL, addr, value);
+ cpu_outw(addr, value);
}
static uint32_t PPC_prep_io_readw (void *opaque, target_phys_addr_t addr)
uint32_t ret;
addr = prep_IO_address(sysctrl, addr);
- ret = cpu_inw(NULL, addr);
+ ret = cpu_inw(addr);
#ifdef TARGET_WORDS_BIGENDIAN
ret = bswap16(ret);
#endif
value = bswap32(value);
#endif
PPC_IO_DPRINTF("0x" TARGET_FMT_plx " => 0x%08" PRIx32 "\n", addr, value);
- cpu_outl(NULL, addr, value);
+ cpu_outl(addr, value);
}
static uint32_t PPC_prep_io_readl (void *opaque, target_phys_addr_t addr)
uint32_t ret;
addr = prep_IO_address(sysctrl, addr);
- ret = cpu_inl(NULL, addr);
+ ret = cpu_inl(addr);
#ifdef TARGET_WORDS_BIGENDIAN
ret = bswap32(ret);
#endif
static void sh_pci_outb (void *p, target_phys_addr_t addr, uint32_t val)
{
- cpu_outb(NULL, sh_pci_addr2port(p, addr), val);
+ cpu_outb(sh_pci_addr2port(p, addr), val);
}
static void sh_pci_outw (void *p, target_phys_addr_t addr, uint32_t val)
{
- cpu_outw(NULL, sh_pci_addr2port(p, addr), val);
+ cpu_outw(sh_pci_addr2port(p, addr), val);
}
static void sh_pci_outl (void *p, target_phys_addr_t addr, uint32_t val)
{
- cpu_outl(NULL, sh_pci_addr2port(p, addr), val);
+ cpu_outl(sh_pci_addr2port(p, addr), val);
}
static uint32_t sh_pci_inb (void *p, target_phys_addr_t addr)
{
- return cpu_inb(NULL, sh_pci_addr2port(p, addr));
+ return cpu_inb(sh_pci_addr2port(p, addr));
}
static uint32_t sh_pci_inw (void *p, target_phys_addr_t addr)
{
- return cpu_inw(NULL, sh_pci_addr2port(p, addr));
+ return cpu_inw(sh_pci_addr2port(p, addr));
}
static uint32_t sh_pci_inl (void *p, target_phys_addr_t addr)
{
- return cpu_inl(NULL, sh_pci_addr2port(p, addr));
+ return cpu_inl(sh_pci_addr2port(p, addr));
}
typedef struct {
#include "qemu-common.h"
#include "ioport.h"
-void cpu_outb(CPUState *env, pio_addr_t addr, uint8_t val)
+void cpu_outb(pio_addr_t addr, uint8_t val)
{
fprintf(stderr, "outb: port=0x%04"FMT_pioaddr", data=%02"PRIx8"\n",
addr, val);
}
-void cpu_outw(CPUState *env, pio_addr_t addr, uint16_t val)
+void cpu_outw(pio_addr_t addr, uint16_t val)
{
fprintf(stderr, "outw: port=0x%04"FMT_pioaddr", data=%04"PRIx16"\n",
addr, val);
}
-void cpu_outl(CPUState *env, pio_addr_t addr, uint32_t val)
+void cpu_outl(pio_addr_t addr, uint32_t val)
{
fprintf(stderr, "outl: port=0x%04"FMT_pioaddr", data=%08"PRIx32"\n",
addr, val);
}
-uint8_t cpu_inb(CPUState *env, pio_addr_t addr)
+uint8_t cpu_inb(pio_addr_t addr)
{
fprintf(stderr, "inb: port=0x%04"FMT_pioaddr"\n", addr);
return 0;
}
-uint16_t cpu_inw(CPUState *env, pio_addr_t addr)
+uint16_t cpu_inw(pio_addr_t addr)
{
fprintf(stderr, "inw: port=0x%04"FMT_pioaddr"\n", addr);
return 0;
}
-uint32_t cpu_inl(CPUState *env, pio_addr_t addr)
+uint32_t cpu_inl(pio_addr_t addr)
{
fprintf(stderr, "inl: port=0x%04"FMT_pioaddr"\n", addr);
return 0;
/***********************************************************/
-void cpu_outb(CPUState *env, pio_addr_t addr, uint8_t val)
+void cpu_outb(pio_addr_t addr, uint8_t val)
{
LOG_IOPORT("outb: %04"FMT_pioaddr" %02"PRIx8"\n", addr, val);
ioport_write(0, addr, val);
}
-void cpu_outw(CPUState *env, pio_addr_t addr, uint16_t val)
+void cpu_outw(pio_addr_t addr, uint16_t val)
{
LOG_IOPORT("outw: %04"FMT_pioaddr" %04"PRIx16"\n", addr, val);
ioport_write(1, addr, val);
}
-void cpu_outl(CPUState *env, pio_addr_t addr, uint32_t val)
+void cpu_outl(pio_addr_t addr, uint32_t val)
{
LOG_IOPORT("outl: %04"FMT_pioaddr" %08"PRIx32"\n", addr, val);
ioport_write(2, addr, val);
}
-uint8_t cpu_inb(CPUState *env, pio_addr_t addr)
+uint8_t cpu_inb(pio_addr_t addr)
{
uint8_t val;
val = ioport_read(0, addr);
return val;
}
-uint16_t cpu_inw(CPUState *env, pio_addr_t addr)
+uint16_t cpu_inw(pio_addr_t addr)
{
uint16_t val;
val = ioport_read(1, addr);
return val;
}
-uint32_t cpu_inl(CPUState *env, pio_addr_t addr)
+uint32_t cpu_inl(pio_addr_t addr)
{
uint32_t val;
val = ioport_read(2, addr);
void isa_unassign_ioport(pio_addr_t start, int length);
-/* NOTE: as these functions may be even used when there is an isa
- brige on non x86 targets, we always defined them */
-#if !defined(NO_CPU_IO_DEFS) && defined(NEED_CPU_H)
-void cpu_outb(CPUState *env, pio_addr_t addr, uint8_t val);
-void cpu_outw(CPUState *env, pio_addr_t addr, uint16_t val);
-void cpu_outl(CPUState *env, pio_addr_t addr, uint32_t val);
-uint8_t cpu_inb(CPUState *env, pio_addr_t addr);
-uint16_t cpu_inw(CPUState *env, pio_addr_t addr);
-uint32_t cpu_inl(CPUState *env, pio_addr_t addr);
-#endif
+void cpu_outb(pio_addr_t addr, uint8_t val);
+void cpu_outw(pio_addr_t addr, uint16_t val);
+void cpu_outl(pio_addr_t addr, uint32_t val);
+uint8_t cpu_inb(pio_addr_t addr);
+uint16_t cpu_inw(pio_addr_t addr);
+uint32_t cpu_inl(pio_addr_t addr);
#endif /* IOPORT_H */
return ret;
}
-static int kvm_handle_io(CPUState *env, uint16_t port, void *data,
- int direction, int size, uint32_t count)
+static int kvm_handle_io(uint16_t port, void *data, int direction, int size,
+ uint32_t count)
{
int i;
uint8_t *ptr = data;
if (direction == KVM_EXIT_IO_IN) {
switch (size) {
case 1:
- stb_p(ptr, cpu_inb(env, port));
+ stb_p(ptr, cpu_inb(port));
break;
case 2:
- stw_p(ptr, cpu_inw(env, port));
+ stw_p(ptr, cpu_inw(port));
break;
case 4:
- stl_p(ptr, cpu_inl(env, port));
+ stl_p(ptr, cpu_inl(port));
break;
}
} else {
switch (size) {
case 1:
- cpu_outb(env, port, ldub_p(ptr));
+ cpu_outb(port, ldub_p(ptr));
break;
case 2:
- cpu_outw(env, port, lduw_p(ptr));
+ cpu_outw(port, lduw_p(ptr));
break;
case 4:
- cpu_outl(env, port, ldl_p(ptr));
+ cpu_outl(port, ldl_p(ptr));
break;
}
}
switch (run->exit_reason) {
case KVM_EXIT_IO:
dprintf("handle_io\n");
- ret = kvm_handle_io(env, run->io.port,
+ ret = kvm_handle_io(run->io.port,
(uint8_t *)run + run->io.data_offset,
run->io.direction,
run->io.size,
if (has_index) {
int index = qdict_get_int(qdict, "index");
- cpu_outb(NULL, addr & IOPORTS_MASK, index & 0xff);
+ cpu_outb(addr & IOPORTS_MASK, index & 0xff);
addr++;
}
addr &= 0xffff;
switch(size) {
default:
case 1:
- val = cpu_inb(NULL, addr);
+ val = cpu_inb(addr);
suffix = 'b';
break;
case 2:
- val = cpu_inw(NULL, addr);
+ val = cpu_inw(addr);
suffix = 'w';
break;
case 4:
- val = cpu_inl(NULL, addr);
+ val = cpu_inl(addr);
suffix = 'l';
break;
}
switch (size) {
default:
case 1:
- cpu_outb(NULL, addr, val);
+ cpu_outb(addr, val);
break;
case 2:
- cpu_outw(NULL, addr, val);
+ cpu_outw(addr, val);
break;
case 4:
- cpu_outl(NULL, addr, val);
+ cpu_outl(addr, val);
break;
}
}
void helper_outb(uint32_t port, uint32_t data)
{
- cpu_outb(env, port, data & 0xff);
+ cpu_outb(port, data & 0xff);
}
target_ulong helper_inb(uint32_t port)
{
- return cpu_inb(env, port);
+ return cpu_inb(port);
}
void helper_outw(uint32_t port, uint32_t data)
{
- cpu_outw(env, port, data & 0xffff);
+ cpu_outw(port, data & 0xffff);
}
target_ulong helper_inw(uint32_t port)
{
- return cpu_inw(env, port);
+ return cpu_inw(port);
}
void helper_outl(uint32_t port, uint32_t data)
{
- cpu_outl(env, port, data);
+ cpu_outl(port, data);
}
target_ulong helper_inl(uint32_t port)
{
- return cpu_inl(env, port);
+ return cpu_inl(port);
}
static inline unsigned int get_sp_mask(unsigned int e2)