return dmalen;
}
-static void set_pdma(ESPState *s, enum pdma_origin_id origin,
- uint32_t index, uint32_t len)
+static void set_pdma(ESPState *s, enum pdma_origin_id origin, uint32_t len)
{
s->pdma_origin = origin;
- s->pdma_cur = index;
s->pdma_len = len;
}
switch (s->pdma_origin) {
case TI:
- val = s->ti_buf[s->pdma_cur++];
+ val = s->ti_buf[s->ti_rptr++];
break;
case CMD:
val = s->cmdbuf[s->cmdlen++];
- s->pdma_cur++;
break;
case ASYNC:
val = s->async_buf[0];
s->async_len--;
s->async_buf++;
}
- s->pdma_cur++;
break;
default:
g_assert_not_reached();
switch (s->pdma_origin) {
case TI:
- s->ti_buf[s->pdma_cur++] = val;
+ s->ti_buf[s->ti_wptr++] = val;
break;
case CMD:
s->cmdbuf[s->cmdlen++] = val;
- s->pdma_cur++;
break;
case ASYNC:
s->async_buf[0] = val;
s->async_len--;
s->async_buf++;
}
- s->pdma_cur++;
break;
default:
g_assert_not_reached();
if (s->dma_memory_read) {
s->dma_memory_read(s->dma_opaque, buf, dmalen);
} else {
- set_pdma(s, CMD, 0, dmalen);
+ set_pdma(s, CMD, dmalen);
esp_raise_drq(s);
return 0;
}
s->rregs[ESP_RINTR] = INTR_BS | INTR_FC;
s->rregs[ESP_RSEQ] = SEQ_CD;
} else {
- set_pdma(s, TI, 0, 2);
+ set_pdma(s, TI, 2);
s->pdma_cb = write_response_pdma_cb;
esp_raise_drq(s);
return;
if (s->dma_memory_read) {
s->dma_memory_read(s->dma_opaque, &s->cmdbuf[s->cmdlen], len);
} else {
- set_pdma(s, CMD, s->cmdlen, len);
+ set_pdma(s, CMD, len);
s->pdma_cb = do_dma_pdma_cb;
esp_raise_drq(s);
return;
if (s->dma_memory_read) {
s->dma_memory_read(s->dma_opaque, s->async_buf, len);
} else {
- set_pdma(s, ASYNC, 0, len);
+ set_pdma(s, ASYNC, len);
s->pdma_cb = do_dma_pdma_cb;
esp_raise_drq(s);
return;
if (s->dma_memory_write) {
s->dma_memory_write(s->dma_opaque, s->async_buf, len);
} else {
- set_pdma(s, ASYNC, 0, len);
+ set_pdma(s, ASYNC, len);
s->pdma_cb = do_dma_pdma_cb;
esp_raise_drq(s);
return;
.fields = (VMStateField[]) {
VMSTATE_INT32(pdma_origin, ESPState),
VMSTATE_UINT32(pdma_len, ESPState),
- VMSTATE_UINT32(pdma_cur, ESPState),
VMSTATE_END_OF_LIST()
}
};