]> Git Repo - qemu.git/commitdiff
mips: inline serial_init()
authorMarc-André Lureau <[email protected]>
Wed, 23 Oct 2019 13:29:55 +0000 (15:29 +0200)
committerMarc-André Lureau <[email protected]>
Tue, 7 Jan 2020 13:24:29 +0000 (17:24 +0400)
The function is specific to mipssim, let's inline it.

(when inlining, we use a DeviceState variable instead of SerialIO, as
it is the most common type used, and avoids having too many casts)

Signed-off-by: Marc-André Lureau <[email protected]>
Reviewed-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Aleksandar Markovic <[email protected]>
hw/char/serial.c
hw/mips/mips_mipssim.c
include/hw/char/serial.h

index 3bcb7a626848f72fcc177bcb24fea4ff9764fa3b..7746dfcee8050dada71a9c3b4ba523810180ea74 100644 (file)
@@ -1028,22 +1028,6 @@ static const TypeInfo serial_io_info = {
     .class_init = serial_io_class_init,
 };
 
-SerialIO *serial_init(int base, qemu_irq irq, int baudbase,
-                         Chardev *chr, MemoryRegion *system_io)
-{
-    SerialIO *sio = SERIAL_IO(qdev_create(NULL, TYPE_SERIAL_IO));
-
-    qdev_prop_set_uint32(DEVICE(sio), "baudbase", baudbase);
-    qdev_prop_set_chr(DEVICE(sio), "chardev", chr);
-    qdev_set_legacy_instance_id(DEVICE(sio), base, 2);
-    qdev_init_nofail(DEVICE(sio));
-
-    sysbus_connect_irq(SYS_BUS_DEVICE(sio), 0, irq);
-    memory_region_add_subregion(system_io, base, &sio->serial.io);
-
-    return sio;
-}
-
 static Property serial_properties[] = {
     DEFINE_PROP_CHR("chardev", SerialState, chr),
     DEFINE_PROP_UINT32("baudbase", SerialState, baudbase, 115200),
index 282bbecb24eb9082913482f51c1e6eb42ab0c49f..5ee26108f5f35b9d80ac8237b0e034171b133f17 100644 (file)
@@ -40,6 +40,7 @@
 #include "hw/loader.h"
 #include "elf.h"
 #include "hw/sysbus.h"
+#include "hw/qdev-properties.h"
 #include "exec/address-spaces.h"
 #include "qemu/error-report.h"
 #include "sysemu/qtest.h"
@@ -219,9 +220,17 @@ mips_mipssim_init(MachineState *machine)
      * A single 16450 sits at offset 0x3f8. It is attached to
      * MIPS CPU INT2, which is interrupt 4.
      */
-    if (serial_hd(0))
-        serial_init(0x3f8, env->irq[4], 115200, serial_hd(0),
-                    get_system_io());
+    if (serial_hd(0)) {
+        DeviceState *dev = qdev_create(NULL, TYPE_SERIAL_IO);
+
+        qdev_prop_set_uint32(dev, "baudbase", 115200);
+        qdev_prop_set_chr(dev, "chardev", serial_hd(0));
+        qdev_set_legacy_instance_id(dev, 0x3f8, 2);
+        qdev_init_nofail(dev);
+        sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, env->irq[4]);
+        memory_region_add_subregion(get_system_io(), 0x3f8,
+                                    &SERIAL_IO(dev)->serial.io);
+    }
 
     if (nd_table[0].used)
         /* MIPSnet uses the MIPS CPU INT0, which is interrupt 2. */
index d356ba838c23aca7e3cbc4fb125a7010a823fa91..535fa23a2b847f401a94c12dde49fbd62beed3ba 100644 (file)
@@ -108,8 +108,6 @@ void serial_set_frequency(SerialState *s, uint32_t frequency);
 #define TYPE_SERIAL_IO "serial-io"
 #define SERIAL_IO(s) OBJECT_CHECK(SerialIO, (s), TYPE_SERIAL_IO)
 
-SerialIO *serial_init(int base, qemu_irq irq, int baudbase,
-                      Chardev *chr, MemoryRegion *system_io);
 SerialMM *serial_mm_init(MemoryRegion *address_space,
                          hwaddr base, int regshift,
                          qemu_irq irq, int baudbase,
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