target/i386: [tcg] Port to insn_start

Incrementally paves the way towards using the generic instruction translation
loop.

Signed-off-by: Lluís Vilanova <[email protected]>
Reviewed-by: Emilio G. Cota <[email protected]>
Reviewed-by: Richard Henderson <[email protected]>
Reviewed-by: Alex Benneé <[email protected]>
Message-Id: <150002146647.22386.13380064201042141261[email protected]>
Signed-off-by: Richard Henderson <[email protected]>

diff --git a/target/i386/translate.c b/target/i386/translate.c
index 4281e9bc56a44af420d15f3e6f49a68530bd6463..b7e585451384e7ea8a4f0d73c0e5956ac3ce8b20 100644 (file)
--- a/target/i386/translate.c
+++ b/target/i386/translate.c
@@ -8449,6 +8449,13 @@ static int i386_tr_init_disas_context(DisasContextBase *dcbase, CPUState *cpu,
     return max_insns;
 }
 
+static void i386_tr_insn_start(DisasContextBase *dcbase, CPUState *cpu)
+{
+    DisasContext *dc = container_of(dcbase, DisasContext, base);
+
+    tcg_gen_insn_start(dc->base.pc_next, dc->cc_op);
+}
+
 /* generate intermediate code for basic block 'tb'.  */
 void gen_intermediate_code(CPUState *cs, TranslationBlock *tb)
 {
@@ -8476,7 +8483,7 @@ void gen_intermediate_code(CPUState *cs, TranslationBlock *tb)
     num_insns = 0;
     gen_tb_start(tb);
     for(;;) {
-        tcg_gen_insn_start(dc->base.pc_next, dc->cc_op);
+        i386_tr_insn_start(&dc->base, cs);
         num_insns++;
 
         /* If RF is set, suppress an internally generated breakpoint.  */