//#define DEBUG_IRQ_LATENCY
//#define DEBUG_IRQ_COUNT
+typedef struct PicState PicState;
+
struct PicState {
ISADevice dev;
uint8_t last_irr; /* edge detection */
#ifdef DEBUG_IRQ_LATENCY
static int64_t irq_time[16];
#endif
-PicState *isa_pic;
+DeviceState *isa_pic;
static PicState *slave_pic;
/* return the highest priority found in mask (highest = smallest
pic_update_irq(s);
}
-int pic_read_irq(PicState *s)
+int pic_read_irq(DeviceState *d)
{
+ PicState *s = DO_UPCAST(PicState, dev.qdev, d);
int irq, irq2, intno;
irq = pic_get_irq(s);
static void pic_reset(DeviceState *dev)
{
- PicState *s = container_of(dev, PicState, dev.qdev);
+ PicState *s = DO_UPCAST(PicState, dev.qdev, dev);
pic_init_reset(s);
s->elcr = 0;
return ret;
}
-int pic_get_output(PicState *s)
+int pic_get_output(DeviceState *d)
{
+ PicState *s = DO_UPCAST(PicState, dev.qdev, d);
+
return (pic_get_irq(s) >= 0);
}
return;
}
for (i = 0; i < 2; i++) {
- s = i == 0 ? isa_pic : slave_pic;
+ s = i == 0 ? DO_UPCAST(PicState, dev.qdev, isa_pic) : slave_pic;
monitor_printf(mon, "pic%d: irr=%02x imr=%02x isr=%02x hprio=%d "
"irq_base=%02x rr_sel=%d elcr=%02x fnm=%d\n",
i, s->irr, s->imr, s->isr, s->priority_add,
irq_set[i] = qdev_get_gpio_in(&dev->qdev, i);
}
- isa_pic = DO_UPCAST(PicState, dev, dev);
+ isa_pic = &dev->qdev;
dev = isa_create(bus, "isa-i8259");
qdev_prop_set_uint32(&dev->qdev, "iobase", 0xa0);
/* i8259.c */
-typedef struct PicState PicState;
-extern PicState *isa_pic;
+extern DeviceState *isa_pic;
qemu_irq *i8259_init(ISABus *bus, qemu_irq parent_irq);
-int pic_read_irq(PicState *s);
-int pic_get_output(PicState *s);
+int pic_read_irq(DeviceState *d);
+int pic_get_output(DeviceState *d);
void pic_info(Monitor *mon);
void irq_info(Monitor *mon);