};
void pci_std_vga_mmio_region_init(VGACommonState *s,
+ Object *owner,
MemoryRegion *parent,
MemoryRegion *subs,
bool qext)
{
- memory_region_init_io(&subs[0], NULL, &pci_vga_ioport_ops, s,
+ memory_region_init_io(&subs[0], owner, &pci_vga_ioport_ops, s,
"vga ioports remapped", PCI_VGA_IOPORT_SIZE);
memory_region_add_subregion(parent, PCI_VGA_IOPORT_OFFSET,
&subs[0]);
- memory_region_init_io(&subs[1], NULL, &pci_vga_bochs_ops, s,
+ memory_region_init_io(&subs[1], owner, &pci_vga_bochs_ops, s,
"bochs dispi interface", PCI_VGA_BOCHS_SIZE);
memory_region_add_subregion(parent, PCI_VGA_BOCHS_OFFSET,
&subs[1]);
if (qext) {
- memory_region_init_io(&subs[2], NULL, &pci_vga_qext_ops, s,
+ memory_region_init_io(&subs[2], owner, &pci_vga_qext_ops, s,
"qemu extended regs", PCI_VGA_QEXT_SIZE);
memory_region_add_subregion(parent, PCI_VGA_QEXT_OFFSET,
&subs[2]);
qext = true;
pci_set_byte(&d->dev.config[PCI_REVISION_ID], 2);
}
- pci_std_vga_mmio_region_init(s, &d->mmio, d->mrs, qext);
+ pci_std_vga_mmio_region_init(s, OBJECT(dev), &d->mmio, d->mrs, qext);
pci_register_bar(&d->dev, 2, PCI_BASE_ADDRESS_SPACE_MEMORY, &d->mmio);
}
qext = true;
pci_set_byte(&d->dev.config[PCI_REVISION_ID], 2);
}
- pci_std_vga_mmio_region_init(s, &d->mmio, d->mrs, qext);
+ pci_std_vga_mmio_region_init(s, OBJECT(dev), &d->mmio, d->mrs, qext);
pci_register_bar(&d->dev, 0, PCI_BASE_ADDRESS_MEM_PREFETCH, &s->vram);
pci_register_bar(&d->dev, 2, PCI_BASE_ADDRESS_SPACE_MEMORY, &d->mmio);