#include "macros.inc"
+#define LSBIT(v) ((v) ^ ((v) & ((v) - 1)))
+
test_suite interrupt
.macro clear_interrupts
set_vector kernel, 1f
clear_interrupts
- movi a2, 0x80
+ movi a2, LSBIT(XCHAL_INTTYPE_MASK_SOFTWARE)
wsr a2, intset
esync
rsr a3, interrupt
+ movi a4, ~XCHAL_INTTYPE_MASK_TIMER
+ and a3, a3, a4
assert eq, a2, a3
wsr a2, intclear
esync
rsr a3, interrupt
+ and a3, a3, a4
assert eqi, a3, 0
j 2f
1:
set_vector kernel, 1f
clear_interrupts
- movi a2, 0x80
+ movi a2, LSBIT(XCHAL_INTTYPE_MASK_SOFTWARE)
wsr a2, intset
esync
rsr a3, interrupt
+ movi a4, ~XCHAL_INTTYPE_MASK_TIMER
+ and a3, a3, a4
assert eq, a2, a3
rsil a3, 0
wsr a2, intenable
set_vector kernel, 1f
clear_interrupts
- movi a2, 0x80
+ movi a2, LSBIT(XCHAL_INTTYPE_MASK_SOFTWARE)
wsr a2, intset
esync
rsr a3, interrupt
+ movi a4, ~XCHAL_INTTYPE_MASK_TIMER
+ and a3, a3, a4
assert eq, a2, a3
wsr a2, intenable
rsil a3, 0
set_vector kernel, 1f
clear_interrupts
- movi a2, 0x80
+ movi a2, LSBIT(XCHAL_INTTYPE_MASK_SOFTWARE)
wsr a2, intset
esync
rsr a3, interrupt
+ movi a4, ~XCHAL_INTTYPE_MASK_TIMER
+ and a3, a3, a4
assert eq, a2, a3
wsr a2, intenable
waiti 0
set_vector user, 2f
clear_interrupts
- movi a2, 0x80
+ movi a2, LSBIT(XCHAL_INTTYPE_MASK_SOFTWARE)
wsr a2, intset
esync
rsr a3, interrupt
+ movi a4, ~XCHAL_INTTYPE_MASK_TIMER
+ and a3, a3, a4
assert eq, a2, a3
wsr a2, intenable
set_vector level3, 2f
clear_interrupts
- movi a2, 0x880
+ movi a2, XCHAL_INTTYPE_MASK_SOFTWARE
wsr a2, intenable
rsil a3, 0
esync
clear_interrupts
reset_ps
- movi a2, 0x880
+ movi a2, XCHAL_INTTYPE_MASK_SOFTWARE
wsr a2, intenable
rsil a3, 0
rsr a3, ps