#ifdef TARGET_NR_pipe2
{ TARGET_NR_pipe2, "pipe2", NULL, NULL, NULL },
#endif
+#ifdef TARGET_NR_atomic_cmpxchg_32
+{ TARGET_NR_atomic_cmpxchg_32, "atomic_cmpxchg_32", NULL, NULL, NULL },
+#endif
+#ifdef TARGET_NR_atomic_barrier
+{ TARGET_NR_atomic_barrier, "atomic_barrier", NULL, NULL, NULL },
+#endif
}
break;
}
+#endif
+#ifdef TARGET_NR_atomic_cmpxchg_32
+ case TARGET_NR_atomic_cmpxchg_32:
+ {
+ /* should use start_exclusive from main.c */
+ abi_ulong mem_value;
+ if (get_user_u32(mem_value, arg6)) {
+ target_siginfo_t info;
+ info.si_signo = SIGSEGV;
+ info.si_errno = 0;
+ info.si_code = TARGET_SEGV_MAPERR;
+ info._sifields._sigfault._addr = arg6;
+ queue_signal((CPUArchState *)cpu_env, info.si_signo, &info);
+ ret = 0xdeadbeef;
+
+ }
+ if (mem_value == arg2)
+ put_user_u32(arg1, arg6);
+ ret = mem_value;
+ break;
+ }
+#endif
+#ifdef TARGET_NR_atomic_barrier
+ case TARGET_NR_atomic_barrier:
+ {
+ /* Like the kernel implementation and the qemu arm barrier, no-op this? */
+ break;
+ }
#endif
default:
unimplemented: