char/cadence_uart: Fix reset.

Don't reset the uart as an init step. Register the reset function as a
proper reset fn instead.

Signed-off-by: Peter Crosthwaite <[email protected]>
Message-id: d82cd2e65e5a6f8b6deeecb6cced61f0bf3f8c89.1388626249[email protected]
Signed-off-by: Peter Maydell <[email protected]>

diff --git a/hw/char/cadence_uart.c b/hw/char/cadence_uart.c
index fb9db89ee9ec562fe690d7347cedf17135d2a831..7edc1196f34ca3529338f5cfcf3d9501752ac4c8 100644 (file)
--- a/hw/char/cadence_uart.c
+++ b/hw/char/cadence_uart.c
@@ -431,8 +431,10 @@ static const MemoryRegionOps uart_ops = {
     .endianness = DEVICE_NATIVE_ENDIAN,
 };
 
-static void cadence_uart_reset(UartState *s)
+static void cadence_uart_reset(DeviceState *dev)
 {
+    UartState *s = CADENCE_UART(dev);
+
     s->r[R_CR] = 0x00000128;
     s->r[R_IMR] = 0;
     s->r[R_CISR] = 0;
@@ -465,8 +467,6 @@ static int cadence_uart_init(SysBusDevice *dev)
 
     s->chr = qemu_char_get_next_serial();
 
-    cadence_uart_reset(s);
-
     if (s->chr) {
         qemu_chr_add_handlers(s->chr, uart_can_receive, uart_receive,
                               uart_event, s);
@@ -508,6 +508,7 @@ static void cadence_uart_class_init(ObjectClass *klass, void *data)
 
     sdc->init = cadence_uart_init;
     dc->vmsd = &vmstate_cadence_uart;
+    dc->reset = cadence_uart_reset;
 }
 
 static const TypeInfo cadence_uart_info = {