net/cadence_gem: Don't rx packets when no rx buffer available

Return false from can_receive() when no valid buffer descriptor is
available. Ensures against mass packet droppage in some applications.

Signed-off-by: Peter Crosthwaite <[email protected]>
Message-id: cde00ef774e84e2586bf10fd37b542f75bf36cfb.1386136219[email protected]
Signed-off-by: Peter Maydell <[email protected]>

diff --git a/hw/net/cadence_gem.c b/hw/net/cadence_gem.c
index f6e38cacfc46c8f39147d46631adaa9b7bb40d3e..92dc2f21fa6262408535b8b542394cd4b767a96c 100644 (file)
--- a/hw/net/cadence_gem.c
+++ b/hw/net/cadence_gem.c
@@ -463,6 +463,15 @@ static int gem_can_receive(NetClientState *nc)
         return 0;
     }
 
         return 0;
     }
 

+    if (rx_desc_get_ownership(s->rx_desc) == 1) {
+        if (s->can_rx_state != 2) {
+            s->can_rx_state = 2;
+            DB_PRINT("can't receive - busy buffer descriptor 0x%x\n",
+                     s->rx_desc_addr);
+        }
+        return 0;
+    }
+

     if (s->can_rx_state != 0) {
         s->can_rx_state = 0;
         DB_PRINT("can receive 0x%x\n", s->rx_desc_addr);
     if (s->can_rx_state != 0) {
         s->can_rx_state = 0;
         DB_PRINT("can receive 0x%x\n", s->rx_desc_addr);


@@ -1142,7 +1151,7 @@ static void gem_write(void *opaque, hwaddr offset, uint64_t val,
             /* Reset to start of Q when transmit disabled. */
             s->tx_desc_addr = s->regs[GEM_TXQBASE];
         }
             /* Reset to start of Q when transmit disabled. */
             s->tx_desc_addr = s->regs[GEM_TXQBASE];
         }

-        if (val & GEM_NWCTRL_RXENA) {
+        if (gem_can_receive(qemu_get_queue(s->nic))) {

             qemu_flush_queued_packets(qemu_get_queue(s->nic));
         }
         break;
             qemu_flush_queued_packets(qemu_get_queue(s->nic));
         }
         break;