mos6522: only clear the shift register interrupt upon write

According to the 6522 datasheet the shift register (SR) interrupt flag is
cleared upon write with no mention of any other interrupt flags.

Signed-off-by: Mark Cave-Ayland <[email protected]>
Signed-off-by: David Gibson <[email protected]>

diff --git a/hw/misc/mos6522.c b/hw/misc/mos6522.c
index 44eb306cf1d3f34aee59c4122b10680cda79b96a..ad5041d8c041d2e18a2f6031b88d27d0f954a974 100644 (file)
--- a/hw/misc/mos6522.c
+++ b/hw/misc/mos6522.c
@@ -241,7 +241,7 @@ uint64_t mos6522_read(void *opaque, hwaddr addr, unsigned size)
         break;
     case VIA_REG_SR:
         val = s->sr;
-        s->ifr &= ~(SR_INT | CB1_INT | CB2_INT);
+        s->ifr &= ~SR_INT;
         mos6522_update_irq(s);
         break;
     case VIA_REG_ACR: