The recent changes on the XICS layer removed the XICSState object to
let the sPAPR machine handle the ICP and ICS directly. The reset of
these objects was previously handled by XICSState, which was a SysBus
device, and to keep the same behavior, the ICP and ICS were assigned
to SysbBus.
But that broke the 'info qtree' command in the monitor. 'qtree'
performs a loop on the children of a bus to print their properties and
SysBus devices are expected to be found under SysBus, which is not the
case anymore.
The fix for this problem is to register reset handlers for the ICP and
ICS objects and stop using SysBus for such devices.
Signed-off-by: Cédric Le Goater <[email protected]>
Reviewed-by: Thomas Huth <[email protected]>
Tested-by: Thomas Huth <[email protected]>
Signed-off-by: David Gibson <[email protected]>
},
};
-static void icp_reset(DeviceState *dev)
+static void icp_reset(void *dev)
{
ICPState *icp = ICP(dev);
}
icp->xics = XICS_FABRIC(obj);
+
+ qemu_register_reset(icp_reset, dev);
}
{
DeviceClass *dc = DEVICE_CLASS(klass);
- dc->reset = icp_reset;
dc->vmsd = &vmstate_icp_server;
dc->realize = icp_realize;
}
}
}
-static void ics_simple_reset(DeviceState *dev)
+static void ics_simple_reset(void *dev)
{
ICSState *ics = ICS_SIMPLE(dev);
int i;
}
ics->irqs = g_malloc0(ics->nr_irqs * sizeof(ICSIRQState));
ics->qirqs = qemu_allocate_irqs(ics_simple_set_irq, ics, ics->nr_irqs);
+
+ qemu_register_reset(ics_simple_reset, dev);
}
static Property ics_simple_properties[] = {
isc->realize = ics_simple_realize;
dc->props = ics_simple_properties;
dc->vmsd = &vmstate_ics_simple;
- dc->reset = ics_simple_reset;
isc->reject = ics_simple_reject;
isc->resend = ics_simple_resend;
isc->eoi = ics_simple_eoi;
return 0;
}
-static void icp_kvm_reset(DeviceState *dev)
+static void icp_kvm_reset(void *dev)
{
ICPState *icp = ICP(dev);
icp->cap_irq_xics_enabled = true;
}
+static void icp_kvm_realize(DeviceState *dev, Error **errp)
+{
+ qemu_register_reset(icp_kvm_reset, dev);
+}
+
static void icp_kvm_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
ICPStateClass *icpc = ICP_CLASS(klass);
- dc->reset = icp_kvm_reset;
+ dc->realize = icp_kvm_realize;
icpc->pre_save = icp_get_kvm_state;
icpc->post_load = icp_set_kvm_state;
icpc->cpu_setup = icp_kvm_cpu_setup;
}
}
-static void ics_kvm_reset(DeviceState *dev)
+static void ics_kvm_reset(void *dev)
{
ICSState *ics = ICS_SIMPLE(dev);
int i;
}
ics->irqs = g_malloc0(ics->nr_irqs * sizeof(ICSIRQState));
ics->qirqs = qemu_allocate_irqs(ics_kvm_set_irq, ics, ics->nr_irqs);
+
+ qemu_register_reset(ics_kvm_reset, dev);
}
static void ics_kvm_class_init(ObjectClass *klass, void *data)
{
- DeviceClass *dc = DEVICE_CLASS(klass);
ICSStateClass *icsc = ICS_BASE_CLASS(klass);
icsc->realize = ics_kvm_realize;
- dc->reset = ics_kvm_reset;
icsc->pre_save = ics_get_kvm_state;
icsc->post_load = ics_set_kvm_state;
}
int i;
ics = ICS_SIMPLE(object_new(type_ics));
- qdev_set_parent_bus(DEVICE(ics), sysbus_get_default());
object_property_add_child(OBJECT(spapr), "ics", OBJECT(ics), NULL);
object_property_set_int(OBJECT(ics), nr_irqs, "nr-irqs", &err);
object_property_add_const_link(OBJECT(ics), "xics", OBJECT(xi), NULL);
ICPState *icp = &spapr->icps[i];
object_initialize(icp, sizeof(*icp), type_icp);
- qdev_set_parent_bus(DEVICE(icp), sysbus_get_default());
object_property_add_child(OBJECT(spapr), "icp[*]", OBJECT(icp), NULL);
object_property_add_const_link(OBJECT(icp), "xics", OBJECT(xi), NULL);
object_property_set_bool(OBJECT(icp), true, "realized", &err);